DAC 2011: How to respond to ITRS SoC design cost slide

Rich Wawrzyniak, senior analyst, Semico

PHOENIX, USA: If there was one thing to take away from the Design Automation Conference in San Diego last week, it's that there is a growing dissatisfaction around the limited amount of data showing silicon and software design costs for SoCs.

In particular, many are questioning the validity of the data in a 'famous' ITRS SoC design cost slide. While the data is accurate, several people mentioned to me that it is based on the inputs of only one company and only depicts the design costs from a single design!

As most of you know this slide is shown frequently at conferences, in company presentations and even in books and literature about the semiconductor industry. It is used by many people and companies as a means to tell a particular story or make a specific point. It is generally used as is: namely, without stating any of the caveats that would normally accompany such a data point.

On the silicon design side of the equation the normal questions to ask of the data are:
Is it a first time effort at that process node?
Does it represent the most complex design at that process node?
Was every design parameter maxed out - biggest die, max number of transistors / gates, fastest clock speeds, number of CPU cores, etc.?
Does this data represent a mainstream part or a design for a niche application?
Do all the designs at a given node cost the same as shown by the data in the slide?

And finally:
From how many designs is this data derived?

This last point is key; because, while the data in the slide can be said to be accurate, just how many companies and designs is it accurate for? Semico does not believe the data from one design can be and applied to all other designs in the industry - especially when we see the cost curve this slide depicts spiraling out of sight for future nodes.

To say it is inaccurate is being very charitable at best!

The same could be said for the portion of the slide that shows software costs roughly equal or higher than the silicon design costs. Again, where are the caveats that put the data into context and provide perspective to the viewer?

On the Software design side some reasonable questions would be:
How many software designers does this design depict?
How long did the effort take to accomplish?

For software efforts, it is common to use many code developers to finish the design quickly. The more people used in the effort, the more costly it is. Where is this data and how does it relate to the design being shown? How does it relate to the rest of the industry?

How much code was reused from a previous effort? None? Some? Any?
How much of the depicted design cost was allocated for maintenance over the life of the product?

This last point is important since the companies writing their own applications programs probably do not use the same accounting rules that a software developer in the embedded software market uses. After all, most of these software applications are being written by semiconductor companies and not software development companies. Are there any differences between the two types of companies in how they account for development costs over time? Again, this data is not supplied with the slide.

This sort of data is becoming a critical part of the decision making process for many parts of the semiconductor supply chain.

When a SoC start-up goes out for funding, does the VC he interfaces with throw up this slide as an issue to be discussed? Is it a showstopper in the VC's mind?
When a company contemplates their next generation of silicon solution do they hesitate, thinking of this slide and the data it shows?
When an EDA company thinks about developing their next generation tool, do they wonder how big the customer base will be at the next process node given the increase in design costs shown by this data? Do they possibly delay their efforts until enough customers ask for new products?
Do the foundries look at the design cost data before they allocate their capex budget?
Do semiconductor companies hesitate before starting designs to enter new markets looking at how many parts they need to sell just to make back the design investment?

Is the choice of market to enter gated by the design cost data shown in this slide?
The answer to all these questions is probably yes to some degree. While it is true that larger companies may not be totally influenced by design cost data, it is entirely likely that smaller companies would definitely pay attention to data points like this.

If these numbers are so important and are used to make so many important decisions in the industry, why is better data not available for everyone to see?

Unfortunately, the answer is simple. Not many companies are willing to share this data since, in the wrong hands it would allow someone to calculate their competitors manufacturing costs with reasonable accuracy. Having that data would allow someone to know what their competitors bottom line threshold of pain would be in terms of how low they could go on a particular ASP price point. This would give a company a great advantage over their competition.

Not many people in the industry are willing to share their design cost data for these reasons.

This is an area that Semico is focusing on over the next month since it has implications that go throughout the industry. Stay tuned!

All in all, I can say that I thought this year's DAC was very well run and that it seemed like attendance was up over last year's conference. There was some blatant 'over-the-top' messages this year, but not more than in other years. If someone wanted to get the pulse of the EDA industry today, the DAC conference is definitely one place where that can be accomplished!