TSMC includes Apache’s power and noise solutions for Reference Flow 11.0 and AMS Reference Flow 1.0

SAN JOSE, USA: Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, announced that TSMC includes Apache’s PowerArtist, RedHawk, Totem, Sentinel, and PathFinder in both TSMC Reference Flow 11.0 and Analog/Mixed-Signal (AMS) Reference Flow 1.0.

TSMC Reference Flow 11.0
Reference Flow 11.0 includes Apache’s recently announced ESD integrity solution, PathFinder. In addition, Apache’s products for power and noise analysis were validated for Reference Flow 11.0 in the areas of System-in-Package (SiP), 3D-IC with Through Silicon Via (TSV), and RTL power estimation:

* PathFinder for full-chip ESD verification supporting human body model (HBM), machine model (MM), and charged device model (CDM).
* Chip Power Model (CPM) and Chip Thermal Model (CTM) for compact die modeling used in SiP and 3D-IC/TSV analysis.
* RedHawk’s native support for concurrent analysis of multiple dies with different process technologies.
* PowerArtist for RTL to gate–level power estimation and correlation.

Advanced process technologies result in smaller wire geometries and thinner gate oxides with lower breakdown voltages, creating ESD related reliability challenges for the designers. PathFinder, a layout-based ESD integrity solution provides full-chip placement and connectivity verification for ESD events such as HBM, MM, and CDM.

TSMC’s Reference Flow includes one of PathFinder’s capabilities to compute the impedance in the discharge path through distributed power/ground and package mesh, as well as the participating clamp cells. Its support includes various pads/bumps and clamp circuit configurations.

The drive to reduce power and increase performance demands advanced packaging technologies such as SiP and 3D-IC/TSV. However, these technologies pose major power, thermal, and stress challenges due to the coupling of power delivery network between digital and analog dies and their heat transfer properties.

RedHawk and Totem generate CPM and CTM as hand-off compact models representing the die power and thermal behaviors. In addition, RedHawk and Sentinel are extended to utilize CPM and CTM for multi-die chip-package analysis. For shared power/ground network with TSV structures, RedHawk is architected to handle concurrent simulation of multiple die with different process technologies. Its GUI enables probing across multiple dies to accurately analyze the impact of power supply noise.

The requirement for power reduction is driving the need for power estimation at early design stages, as well as accurate correlation between RTL and gate-level implementation. PowerArtist enables designers to uncover power bugs, which result in excessive wasted power in both stand-by and active modes.

PowerArtist provides accurate power calculation based on advanced capacitance estimation technology. In TSMC Reference Flow, the RTL power estimate is correlated with synthesized gate-level result. In addition, PowerArtist help guide RedHawk for early power analysis and CPM generation.

TSMC AMS Reference Flow 1.0
AMS Reference Flow 1.0 includes Apache’s Totem platform, a power, noise, and reliability solution for analog, mixed-signal, memory, and high-speed I/O designs. In the Reference Flow, Totem is selected for early power/ground (P/G) grid integrity check, static and dynamic IR drop signoff, electro-migration (EM) validation, and chip power model (CPM) generation of full custom designs.

“Advanced designs such as ultra low power and 3DIC/TSV are raising new challenges in the area of power and noise. Chip failures due to the noise margin reduction, ESD effects, and mixed-signal designs are having significant impact on silicon yield,” said Tom Quan, deputy director of design methodology and service marketing at TSMC.

“Our Reference Flows include Apache’s complete product line such as PathFinder for full-chip ESD signoff and Totem for analog/mixed-signal power integrity, thus enabling our customers to better manage their power and noise challenges and ensure design success.”

“Our advanced technology solutions require tighter relationships with our foundry partners. Products targeting emerging challenges such as ESD verification depend on manufacturing process and technology information,” said Dian Yang, senior vice president of product management at Apache. “Our close collaboration with TSMC enables us to deliver tools and methodologies for our customers that address the latest design challenges.”