Si2 announces member demos at DAC 2010

AUSTIN, USA: Five companies will be demonstrating significant progress advancing design flow interoperability in the Silicon Integration Initiative (Si2) Booth #502 at the Design Automation Conference on June 13-18, at the Anaheim Convention Center in Anaheim, CA.

These companies will be showing how Si2 standards developed by the OpenAccess Coalition, the Low Power Coalition, the Open Modeling Coalition and the Design for Manufacturability Coalition can provide innovative approaches to critical IC design flow issues. An introduction to the new OpenPDK Coalition will also be highlighted. Following are descriptions of each company’s demonstrations, as provided by them.

AnaGlobe Technology: Will demonstrate GOLF, a production-proven OpenAccess-based layout editor adopted by companies such as TSMC, UMC, VIS, AAT, WINTEK, etc. with more than 200 successful tape-out chips. GOLF features powerful layout editing functions, intuitive GUI, flexible customization and extension with TCL/Perl/Python. It provides a next generation interoperable PCell design environment that covers from PCell design, debugging, testing, to documentation.

Cadence Design Systems: Will demonstrate solutions using a number of widely-deployed Si2 standards: OpenAccess, Common Power Format (CPF) and Effective Current Source Modeling (ECSM) as well highlight how OpenPDK meets the industry need for an open standard for PDK development. Hear from experts how you can use these industry-leading solutions from Cadence to address your most challenging advanced-node design problems.

Magma Design Automation: Will provide an overview of the Talus low-power design flow, which provides the “Fastest Path to Silicon.” The Talus implementation system has enabled designers to meet the low-power specifications of some of the world’s most advanced handheld devices. With support for the Common Power Format (CPF) and a unified datamodel architecture, Talus allows designers to implement advanced low-power design techniques throughout the flow and to significantly reduce turnaround time.

Pulsic: Will be demonstrating UniRoute, the most advanced, production proven, shape based routing solution for extreme custom design automation on OpenAccess designs. See how UniRoute’s Spine and Stitch routing capability has been deployed to significantly increase productivity in custom layout compared to using legacy routers on leading edge OpenAccess based designs. Learn how to achieve successful tapeouts at advanced process nodes. See why UniRoute is the router of choice for extreme custom design automation with memory, FPGA, and analog/mixed signal customers at advanced process nodes of 45nm and below.

Synopsys: Will demonstrate Custom Designer -- learn about Custom Designer's enhanced custom IC layout capabilities, including SmartDRD technology for design-rule-driven layout with automated DRC violation repair, bus routing and schematic-driven layout (SDL). Custom Designer's seamless integration with IC Compiler, IC Validator and StarRC Custom will also be demonstrated.