SANTA CLARA, USA: Intel Corp. has announced that the acquisition of McAfee Inc. is complete.
McAfee will continue developing and selling security products and services under its own brand. Intel and McAfee plan to bring the first fruits of their strategic partnership to market later this year, with the intent of tackling security and the pervasive nature of computing threats in an entirely new way.
Intel and McAfee believe today's approach to security does not adequately address the billions of new Internet-ready devices, including PCs, mobile and wireless devices, TVs, cars, medical devices and ATM machines. With the surge in cyber threats, providing protection to a diverse online world requires a fundamentally new approach involving software, hardware and services. Together the two companies will work to help people more securely take full advantage of the potential of computing and connectivity.
As a wholly-owned subsidiary of Intel, McAfee reports into Intel's Software and Services Group. The group is managed by Renée James, Intel senior vice president, and general manager. McAfee's president, Dave DeWalt, will report to James.
"In the past, energy-efficient performance and Internet connectivity have defined computing requirements," said James. "Intel has added security as a third pillar of what people demand from their experiences with personal computers and other connected devices. Security challenges put the future potential of computing at risk. The acquisition of McAfee adds not only world-leading security products and technologies to Intel's computing portfolio, but also brings incredibly talented people focused on delivering products and services that help make connecting to the mobile Internet safer and more secure."
Monday, February 28, 2011
ISA welcomes government’s efforts to boost innovation and domestic manufacturing
BANGALORE, INDIA: The India Semiconductor Association (ISA) has commended the Indian government’s commitment to stimulate manufacturing and innovation in the country.
Salient features of the budget:
Manufacturing (electronics and semiconductors)
* FM’s decision to fully exempt raw materials used in manufacturing specified electronic components from basic customs duty is a good move and will result in higher value addition.
* The GoI’s plan to come out with National Manufacturing Policy and increase share of manufacturing in GDP from the present level of 16 percent to 25 percent over a period of 10 years is noteworthy.
* Reduction in basic customs for few more materials used in the manufacturing solar cells/modules to nil will correct the distortions in the duty structure and further strengthen solar PV manufacturing in India.
* Reduction in excise duty on LEDs to 5 percent and full exemption on special CVD will bring down the cost of manufacturing of LEDs and lead to faster adoption of LEDs in India
* Extension of concession available to parts, components and accessories for manufacture of mobile handsets till 31st March, 2012 and to include few more items in its ambit will further bring down manufacturing costs in India.
R&D
* The government’s decision to encourage innovation through National Innovation Council is a welcome step. Constitution of State and sector specific innovation councils are expected to lead to more IPs coming out of India
* Enhancing weighted deduction on payments made to National Laboratories, Universities and Institutes of Technology to 200 per cent will give a fillip to R&D activities
Skill development
* Connectivity to all 1,500 institutions of Higher Learning and Research through optical fiber backbone by March, 2012 will enhance quality and delivery of education and research.
* Allocation of Rs. 500 crore to National Skill Development Council’s will enable supply of skilled workforce
Others
* IT initiatives in governance and other projects would create opportunities for IT hardware and software industry.
* Creation of a cell on Transfer Pricing is a welcome step
* The government has provided an impetus to the renewable energy and clean energy industry. Launching of National Mission for hybrid and electric vehicle will lead to growth of the automotive electronics segment
Poornima Shenoy, ISA president, said: "ISA welcomes the Budget 2011 proposals which will stimulate manufacturing and innovation in India. The government’s plans to come out with a National Manufacturing Policy and promote domestic value addition by rationalization and reduction of duty structures is very commendable. The increase in weighted deduction of payments to National Laboratories, Universities and Institutes of Technology to 200 percent will give fillip to R&D activities.
"We can also expect creation of higher no of IPs through the Governments’ initiatives in setting up State and sector specific Innovation Councils. In addition, the efforts to strengthen the budgetary allocation to NSDC will produce skilled workforce which can be readily deployed in the industry."
Salient features of the budget:
Manufacturing (electronics and semiconductors)
* FM’s decision to fully exempt raw materials used in manufacturing specified electronic components from basic customs duty is a good move and will result in higher value addition.
* The GoI’s plan to come out with National Manufacturing Policy and increase share of manufacturing in GDP from the present level of 16 percent to 25 percent over a period of 10 years is noteworthy.
* Reduction in basic customs for few more materials used in the manufacturing solar cells/modules to nil will correct the distortions in the duty structure and further strengthen solar PV manufacturing in India.
* Reduction in excise duty on LEDs to 5 percent and full exemption on special CVD will bring down the cost of manufacturing of LEDs and lead to faster adoption of LEDs in India
* Extension of concession available to parts, components and accessories for manufacture of mobile handsets till 31st March, 2012 and to include few more items in its ambit will further bring down manufacturing costs in India.
R&D
* The government’s decision to encourage innovation through National Innovation Council is a welcome step. Constitution of State and sector specific innovation councils are expected to lead to more IPs coming out of India
* Enhancing weighted deduction on payments made to National Laboratories, Universities and Institutes of Technology to 200 per cent will give a fillip to R&D activities
Skill development
* Connectivity to all 1,500 institutions of Higher Learning and Research through optical fiber backbone by March, 2012 will enhance quality and delivery of education and research.
* Allocation of Rs. 500 crore to National Skill Development Council’s will enable supply of skilled workforce
Others
* IT initiatives in governance and other projects would create opportunities for IT hardware and software industry.
* Creation of a cell on Transfer Pricing is a welcome step
* The government has provided an impetus to the renewable energy and clean energy industry. Launching of National Mission for hybrid and electric vehicle will lead to growth of the automotive electronics segment
Poornima Shenoy, ISA president, said: "ISA welcomes the Budget 2011 proposals which will stimulate manufacturing and innovation in India. The government’s plans to come out with a National Manufacturing Policy and promote domestic value addition by rationalization and reduction of duty structures is very commendable. The increase in weighted deduction of payments to National Laboratories, Universities and Institutes of Technology to 200 percent will give fillip to R&D activities.
"We can also expect creation of higher no of IPs through the Governments’ initiatives in setting up State and sector specific Innovation Councils. In addition, the efforts to strengthen the budgetary allocation to NSDC will produce skilled workforce which can be readily deployed in the industry."
Industry reactions on the union budget 2011
Here are a few comments on the Union budget by leading industry figures.
Jaswinder Ahuja, corporate VP and MD, Cadence Design Systems, India
"We commend Union Minister Pranab Mukherjee for delivering a balanced budget that aims to correct the imbalance between urban and rural growth. Measures to encourage growth in rural areas through broadband and telephone connectivity as well as banking initiatives will ensure that development is inclusive.
"The plan to introduce an amendment in this session of Parliament to bring forth a clear and concise Goods and Service Tax (GST) policy is much appreciated and we look forward to seeing that come to fruition. On the solar energy segment, the cancellation of customs duty for some of the inputs used in the production of solar modules/cells will encourage the build-up of the budding industry in India.
"However, we are disappointed that the budget did not address issues critical to the growth of the semiconductor industry in India. We were keenly looking forward to schemes that will give a boost to the country’s semiconductor ecosystem, which are necessary for its growth."
Ashok Chandak, senior director, Global Sales and Marketing, NXP Semiconductors India.
“The support for green and energy initiatives, especially in the areas of automotive and solar, is worth noting in this year’s budget. Reduction in duty on LEDs will help boost growth of this technology and energy efficiency, since cost is one of the chief inhibitors for adoption of new energy efficient products.
"Additionally, sops for production of electric and hybrid cars, as well as encouragement for solar lighting will also benefit industry. Unfortunately, the budget does not offer anything major for the Electronics and semiconductor industry in specific. We hope the government will address some of the issues to boost the local electronics manufacturing very soon as the Electronics Import bill is increasing at a rapid pace year after year.”
Manish Sharma, director - marketing, Panasonic India
"The budget 2011 has exceeded expectations in terms of rural development, education and agriculture. It is commendable that the economy has seen a growth rate of over 9 percent. This budget will provide an impetus to inflation control.
"On the whole, it is extremely favorable towards the agricultural community. The various reform measures announced moves at improving the health and the farming sector in the country. This would also result in the upliftment of the economy as steps have been taken towards improving the life of the farmers. This would further create additional markets, which is an encouraging sign.
"Specific to Panasonic India, there will not be any major changes in terms of product pricing as there have been no changes in duties. We welcome the reduction in excise duties on LEDs.
"However, for a manufacturer, as we are exposed to open competition with the various ASEAN countries, some relief on raw materials and intermediate goods would have made our industry competitive globally.
Overall, I foresee an improvement in the macro-economic condition of the country, as this Union Budget proposes to boost agriculture and health industry."
Jaswinder Ahuja, corporate VP and MD, Cadence Design Systems, India
"We commend Union Minister Pranab Mukherjee for delivering a balanced budget that aims to correct the imbalance between urban and rural growth. Measures to encourage growth in rural areas through broadband and telephone connectivity as well as banking initiatives will ensure that development is inclusive.
"The plan to introduce an amendment in this session of Parliament to bring forth a clear and concise Goods and Service Tax (GST) policy is much appreciated and we look forward to seeing that come to fruition. On the solar energy segment, the cancellation of customs duty for some of the inputs used in the production of solar modules/cells will encourage the build-up of the budding industry in India.
"However, we are disappointed that the budget did not address issues critical to the growth of the semiconductor industry in India. We were keenly looking forward to schemes that will give a boost to the country’s semiconductor ecosystem, which are necessary for its growth."
Ashok Chandak, senior director, Global Sales and Marketing, NXP Semiconductors India.
“The support for green and energy initiatives, especially in the areas of automotive and solar, is worth noting in this year’s budget. Reduction in duty on LEDs will help boost growth of this technology and energy efficiency, since cost is one of the chief inhibitors for adoption of new energy efficient products. "Additionally, sops for production of electric and hybrid cars, as well as encouragement for solar lighting will also benefit industry. Unfortunately, the budget does not offer anything major for the Electronics and semiconductor industry in specific. We hope the government will address some of the issues to boost the local electronics manufacturing very soon as the Electronics Import bill is increasing at a rapid pace year after year.”
Manish Sharma, director - marketing, Panasonic India
"The budget 2011 has exceeded expectations in terms of rural development, education and agriculture. It is commendable that the economy has seen a growth rate of over 9 percent. This budget will provide an impetus to inflation control.
"On the whole, it is extremely favorable towards the agricultural community. The various reform measures announced moves at improving the health and the farming sector in the country. This would also result in the upliftment of the economy as steps have been taken towards improving the life of the farmers. This would further create additional markets, which is an encouraging sign.
"Specific to Panasonic India, there will not be any major changes in terms of product pricing as there have been no changes in duties. We welcome the reduction in excise duties on LEDs.
"However, for a manufacturer, as we are exposed to open competition with the various ASEAN countries, some relief on raw materials and intermediate goods would have made our industry competitive globally.
Overall, I foresee an improvement in the macro-economic condition of the country, as this Union Budget proposes to boost agriculture and health industry."
ARM Cortex-M3 reference platform running Micrium μC/OS II released on OVP
THAME, ENGLAND: Imperas earlier this month released a reference virtual platform based on the ARM Cortex-M3 processor, using the Micrium μC/OS II RTOS.
This reference platform will benefit embedded system designers by providing open source models of the virtual platform, enabling a quicker start to software development and testing with the virtual platform. In addition, Imperas now has expanded its Multiprocessor/Multicore Software Development Kit (M*SDK) to include CPU-aware support for the Cortex-M3 processor model, and OS-aware support for the μC/OS II RTOS.
The reference virtual platform models, including the processor model for the Cortex-M3 processor, are now available from Open Virtual Platforms (OVP). The μC/OS II RTOS is available from the Micrium website. M*SDK is available from Imperas.
“ARM regards virtual platforms as a key component of any embedded software development methodology,” said Ian Johnson, Third Party Relations Manager, ARM. “Imperas’ support of this type of methodology with both their OVP and M*SDK tools and their work with Micrium to provide a more complete solution is a good example of the high level of support the industry expects from ARM Connected Community members.”
The reference virtual platform, including processor model and peripheral models, as well as models of other ARM processors and other example platforms, are available at www.OVPworld.org/ARM. The models of the ARM Cortex processors, as well as models of the other ARM processors, including the ARM7, ARM9, ARM10 and ARM11 processor families, work with the Imperas and OVP simulators, and have shown exceptionally fast performance of hundreds of millions of instructions per second.
“Application software and the use of a real-time operating system (RTOS) are key to the success of many embedded systems,” said Jean Labrosse, president of Micrium. “Virtual platforms are gaining ground by allowing developers to code and test a fair portion of their systems prior to running on actual hardware. Our μC/OS family of products, when combined with solutions from Imperas, can significantly help developers reduce time to market.”
All OVP models are instruction accurate, and very fast, enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle.
Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The OVP simulator also has integration into the Eclipse IDE, enabling easy use for software developers.
In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, M*SDK, which includes tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code coverage analysis.
“Whether systems are based on high-end microcontrollers like the ARM Cortex-M3 processor, or more complex multicore processors, embedded software today requires state of the art software development tools,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP, with ultrafast simulation, accelerates the development cycle and makes debug and test easier for software engineers. And M*SDK provides a more sophisticated set of tools addressing bleeding edge embedded software development issues.”
This reference platform will benefit embedded system designers by providing open source models of the virtual platform, enabling a quicker start to software development and testing with the virtual platform. In addition, Imperas now has expanded its Multiprocessor/Multicore Software Development Kit (M*SDK) to include CPU-aware support for the Cortex-M3 processor model, and OS-aware support for the μC/OS II RTOS.
The reference virtual platform models, including the processor model for the Cortex-M3 processor, are now available from Open Virtual Platforms (OVP). The μC/OS II RTOS is available from the Micrium website. M*SDK is available from Imperas.
“ARM regards virtual platforms as a key component of any embedded software development methodology,” said Ian Johnson, Third Party Relations Manager, ARM. “Imperas’ support of this type of methodology with both their OVP and M*SDK tools and their work with Micrium to provide a more complete solution is a good example of the high level of support the industry expects from ARM Connected Community members.”
The reference virtual platform, including processor model and peripheral models, as well as models of other ARM processors and other example platforms, are available at www.OVPworld.org/ARM. The models of the ARM Cortex processors, as well as models of the other ARM processors, including the ARM7, ARM9, ARM10 and ARM11 processor families, work with the Imperas and OVP simulators, and have shown exceptionally fast performance of hundreds of millions of instructions per second.
“Application software and the use of a real-time operating system (RTOS) are key to the success of many embedded systems,” said Jean Labrosse, president of Micrium. “Virtual platforms are gaining ground by allowing developers to code and test a fair portion of their systems prior to running on actual hardware. Our μC/OS family of products, when combined with solutions from Imperas, can significantly help developers reduce time to market.”
All OVP models are instruction accurate, and very fast, enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle.
Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The OVP simulator also has integration into the Eclipse IDE, enabling easy use for software developers.
In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, M*SDK, which includes tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code coverage analysis.
“Whether systems are based on high-end microcontrollers like the ARM Cortex-M3 processor, or more complex multicore processors, embedded software today requires state of the art software development tools,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “OVP, with ultrafast simulation, accelerates the development cycle and makes debug and test easier for software engineers. And M*SDK provides a more sophisticated set of tools addressing bleeding edge embedded software development issues.”
Freescale offers new i.MX53 multimedia products and development solutions
AUSTIN, USA: Freescale Semiconductor is expanding its i.MX53 high-performance applications processor portfolio with two advanced development platforms and new consumer and industrial devices.
“Freescale’s newest i.MX53 products and development resources demonstrate our uncompromising commitment to deliver the technology and support our customers need to differentiate and win in highly competitive markets,” said Ken Obuszewski, product marketing director for Freescale’s Multimedia Applications Division. “Ease-of-use is a hallmark of Freescale’s i.MX products, and our latest i.MX53 development solutions and market-specific products underscore this distinction.”
With more than 100 million units shipped to date, Freescale’s applications processors are a top architectural choice for OEMs and systems designers requiring rich feature sets, high performance and best-in-class power efficiency. The company’s i.MX processor portfolio has been broadly adopted across a wide range of applications, including many of today’s fastest growing product categories.
Quick Start development platform
To help customers more quickly and easily create innovative products for a variety of markets, Freescale is offering a Quick Start development platform based on i.MX53 technology with a manufacturer’s suggested resale price of $149 (USD). Designed for an optimal out-of-box experience, the platform includes a 1GHz i.MX53 applications processor with 1 GB of DDR3 memory and an extensive set of peripherals.
Also included are drivers, hardware, software-optimized multimedia codecs and other critical components. The Quick Start solution runs on an optimized Linux OS distribution supported by a large and vibrant community of open source developers at imxcommunity.org.
SABRE platform for tablets
Freescale is also introducing a new reference design in its Smart Application Blueprint for Rapid Engineering (SABRE) series. The SABRE platform for tablets, based on i.MX53 technology, offers market-specific connectivity and user interfaces to help speed system-level development of next-generation tablets and mobile devices.
Engineered to help developers and manufacturers provide compelling user experiences on a near-production-ready device, the SABRE platform includes an i.MX53 applications processor built on a 1GHz ARM Cortex-A8 core capable of running the Android, Linux and Microsoft Windows Embedded Compact 7 operating systems. The reference design features a 10-inch, high-resolution LCD display and an array of market-critical features, functionality and technologies. The design also includes the Freescale MMA8451Q 3-axis accelerometer, MAG3112 magnetic sensor, MC1323x transceiver and SGTL5000 audio codec.
New i.MX537 and i.MX538 devices
Freescale is expanding the i.MX53 product family with the i.MX537 derivative for industrial applications and the i.MX538 derivative for consumer applications. Based on Freescale’s latest implementation of the advanced ARM Cortex-A8 core, these new processors deliver ultra-fast processing for applications including tablets, smartphones, automotive infotainment systems, patient monitoring equipment and industrial devices with human-machine interfaces.
The products’ low power consumption qualifies them for the Freescale Energy-Efficient Solutions mark, which designates Freescale products whose implementation of energy or power management technologies and/or performance within a specified energy budget over the life of the application is truly optimal and/or best in class. Merging outstanding performance with 1080p HD video, high-end 2D/3D graphics hardware acceleration and industry-leading input/output flexibility on a single system-on-a-chip (SoC), the newest i.MX53 products are expected to be deployed across a broad range of industries.
The i.MX537 processor incorporates an 800 MHz ARM Cortex-A8 core and provides key environmental differentiators for the industrial market. These include 3.3V I/O support, a 0.8 mm pitch package to reduce PCB and manufacturing costs, extended temperature coverage of -40 C to +85 C for harsh environments, industrial qualification for extended reliability, and a strong ecosystem of module manufacturers, software integrators and development tools providers. In addition, the i.MX537 device is part of the Freescale Product Longevity program, with a minimum of 15 years of assured supply.
Freescale’s new i.MX538 processor for consumer markets is delivered in 12mm x 12mm package-on–package (PoP) housing, built on a 1 GHz ARM Cortex-A8 core and supports LPDDR2 with optional MMC/SD flash memories. The processor’s PoP technology allows vertical layering of logic and memory ball grid array packages, resulting in a small footprint ideal for consumer applications.
The Quick Start board is available now for a manufacturer’s suggested resale price of $149. The SABRE platform for tablets is expected to be offered in March 2011 at a manufacturer’s suggested resale price of $1,499. The i.MX537 and i.MX538 applications processors are available now in sample quantities for select customers, with general sampling anticipated in June 2011.
“Freescale’s newest i.MX53 products and development resources demonstrate our uncompromising commitment to deliver the technology and support our customers need to differentiate and win in highly competitive markets,” said Ken Obuszewski, product marketing director for Freescale’s Multimedia Applications Division. “Ease-of-use is a hallmark of Freescale’s i.MX products, and our latest i.MX53 development solutions and market-specific products underscore this distinction.”
With more than 100 million units shipped to date, Freescale’s applications processors are a top architectural choice for OEMs and systems designers requiring rich feature sets, high performance and best-in-class power efficiency. The company’s i.MX processor portfolio has been broadly adopted across a wide range of applications, including many of today’s fastest growing product categories.
Quick Start development platform
To help customers more quickly and easily create innovative products for a variety of markets, Freescale is offering a Quick Start development platform based on i.MX53 technology with a manufacturer’s suggested resale price of $149 (USD). Designed for an optimal out-of-box experience, the platform includes a 1GHz i.MX53 applications processor with 1 GB of DDR3 memory and an extensive set of peripherals.
Also included are drivers, hardware, software-optimized multimedia codecs and other critical components. The Quick Start solution runs on an optimized Linux OS distribution supported by a large and vibrant community of open source developers at imxcommunity.org.
SABRE platform for tablets
Freescale is also introducing a new reference design in its Smart Application Blueprint for Rapid Engineering (SABRE) series. The SABRE platform for tablets, based on i.MX53 technology, offers market-specific connectivity and user interfaces to help speed system-level development of next-generation tablets and mobile devices.
Engineered to help developers and manufacturers provide compelling user experiences on a near-production-ready device, the SABRE platform includes an i.MX53 applications processor built on a 1GHz ARM Cortex-A8 core capable of running the Android, Linux and Microsoft Windows Embedded Compact 7 operating systems. The reference design features a 10-inch, high-resolution LCD display and an array of market-critical features, functionality and technologies. The design also includes the Freescale MMA8451Q 3-axis accelerometer, MAG3112 magnetic sensor, MC1323x transceiver and SGTL5000 audio codec.
New i.MX537 and i.MX538 devices
Freescale is expanding the i.MX53 product family with the i.MX537 derivative for industrial applications and the i.MX538 derivative for consumer applications. Based on Freescale’s latest implementation of the advanced ARM Cortex-A8 core, these new processors deliver ultra-fast processing for applications including tablets, smartphones, automotive infotainment systems, patient monitoring equipment and industrial devices with human-machine interfaces.
The products’ low power consumption qualifies them for the Freescale Energy-Efficient Solutions mark, which designates Freescale products whose implementation of energy or power management technologies and/or performance within a specified energy budget over the life of the application is truly optimal and/or best in class. Merging outstanding performance with 1080p HD video, high-end 2D/3D graphics hardware acceleration and industry-leading input/output flexibility on a single system-on-a-chip (SoC), the newest i.MX53 products are expected to be deployed across a broad range of industries.
The i.MX537 processor incorporates an 800 MHz ARM Cortex-A8 core and provides key environmental differentiators for the industrial market. These include 3.3V I/O support, a 0.8 mm pitch package to reduce PCB and manufacturing costs, extended temperature coverage of -40 C to +85 C for harsh environments, industrial qualification for extended reliability, and a strong ecosystem of module manufacturers, software integrators and development tools providers. In addition, the i.MX537 device is part of the Freescale Product Longevity program, with a minimum of 15 years of assured supply.
Freescale’s new i.MX538 processor for consumer markets is delivered in 12mm x 12mm package-on–package (PoP) housing, built on a 1 GHz ARM Cortex-A8 core and supports LPDDR2 with optional MMC/SD flash memories. The processor’s PoP technology allows vertical layering of logic and memory ball grid array packages, resulting in a small footprint ideal for consumer applications.
The Quick Start board is available now for a manufacturer’s suggested resale price of $149. The SABRE platform for tablets is expected to be offered in March 2011 at a manufacturer’s suggested resale price of $1,499. The i.MX537 and i.MX538 applications processors are available now in sample quantities for select customers, with general sampling anticipated in June 2011.
Everspin’s automotive-temperature MRAM meets harsh environment demands in BMW S 1000 RR racing bike
CHANDLER, USA: Automotive-temperature MRAM technology from Everspin Technologies is helping optimize performance of the BMW S 1000 RR Motorrad Motorsport Super Bike that made its international competition debut in 2009.
Having passed the extreme environment test with BMW, Everspin is also introducing a family of AEC-Q100 fully qualified MRAM products for a variety of automotive-related applications.
Everspin’s 4Mb MR2A16AMYS35 MRAM provides a robust memory solution for the BMW Motorrad Motorsport engine control unit (ECU) called RSM5, storing important calibration data that controls the motorcycle during a race. Prior to each competition, the bike’s computer is fine-tuned for peak performance and optimized for the individual rider, specific track and exact race conditions.
The MRAM chip stores adjustable engine parameters such as data related to a racing bike’s fuel injection, ignition, braking and acceleration. Always non-volatile, power loss after writes to MRAM does not affect data integrity.
“We are extremely pleased with the advantages that Everspin’s MRAM brings to our bike on race day,” said Ralf Schmidt, electronic development leader, BMW Motorrad Motorsport. “We selected MRAM to store critical data for our Superbike due to MRAM’s excellent temperature performance and inherent reliability.”
Having passed the extreme environment test with BMW, Everspin is also introducing a family of AEC-Q100 fully qualified MRAM products for a variety of automotive-related applications.
Everspin’s 4Mb MR2A16AMYS35 MRAM provides a robust memory solution for the BMW Motorrad Motorsport engine control unit (ECU) called RSM5, storing important calibration data that controls the motorcycle during a race. Prior to each competition, the bike’s computer is fine-tuned for peak performance and optimized for the individual rider, specific track and exact race conditions.
The MRAM chip stores adjustable engine parameters such as data related to a racing bike’s fuel injection, ignition, braking and acceleration. Always non-volatile, power loss after writes to MRAM does not affect data integrity.
“We are extremely pleased with the advantages that Everspin’s MRAM brings to our bike on race day,” said Ralf Schmidt, electronic development leader, BMW Motorrad Motorsport. “We selected MRAM to store critical data for our Superbike due to MRAM’s excellent temperature performance and inherent reliability.”
Synopsys DesignWare IP first to support final release of PCI Express 3.0 spec
MOUNTAIN VIEW, USA: Synopsys Inc. announced that it is the first IP provider to support the final version of the PCI Express (PCIe) 3.0 base specification (version 1.0), recently released by the PCI Special Interest Group (PCI-SIG).
In addition, Synopsys has enhanced its DesignWare® digital controllers for PCI Express with new features including support for the latest PIPE 3.0 specification (v0.9), PCI-SIG Engineering Change Notifications (ECNs), 256-bit datapath and embedded DMA engine, all of which provide performance improvements for the PCIe interface.
The DesignWare IP for PCI Express 3.0 (Gen 3) is currently being used by leading semiconductor companies developing high-performance enterprise computing system-on-chips (SoC) designs. The DesignWare portfolio of silicon-proven digital controllers for PCI Express 3.0 includes Endpoint, Root Complex, Switch and Dual Mode cores, enabling designers to easily integrate the 8.0 GT/s PCI Express 3.0 interface into their SoC designs with less risk and improved time-to-market.
The Newest PCI Express features will be demonstrated at the IP Summit at SNUG San Jose, March 30th at the Santa Clara Convention Center.
In addition to supporting the final release of the PCIe 3.0 base specification (version 1.0), the DesignWare digital controllers have been enhanced to support several PCI-SIG ECNs, a 256-bit datapath option and an embedded DMA engine:
* The optional ECN's supported by the DesignWare digital controllers enable power reduction and increased performance for specific applications. Supported ECNs include: TLP Processing Hints, ID Based Ordering, Atomic Operations, BAR Resizing, Extended TAGs, Latency Tolerance Reporting (LTR) and Optimized Buffer Flush/Fill (OBFF).
* The new 256-bit datapath targets SoCs for the enterprise computing market that require a 16 lane (x16) PCIe 3.0 interface. The DesignWare digital controllers for PCI Express with 256-bit datapath are designed to handle multiple packets arriving in a single clock cycle, which provides a performance advantage over other solutions that simply scale the data bus of a 64-or 128-bit controller.
* The embedded DMA engine offloads the main SoC processor when moving large amounts of data between the PCIe interface and the rest of the system, thereby improving system performance and latency. The embedded DMA engine supports the native application interface or ARM AMBA AHB and AXI3 bridges, while also supporting advanced features such as multiple channels, interleaving, linked list and full duplex operation.
"LeCroy has worked closely with Synopsys to continuously conduct interoperability testing between our products as the PCI Express 3.0 specification evolved, resulting in proven products that have been demonstrated with hardware platforms at industry events," said Joe Mendolia, vice president at LeCroy. "Our collaboration through the years has provided designers with PCI Express IP, test equipment and software tools that help lower the risk of incorporating the PCI Express interface into their designs."
"As a leading provider of PCI Express IP, Synopsys continues to make technology advancements that give designers access to high-quality IP solutions that are interoperable and compliant to the latest standards," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "By supporting the final PCI Express 3.0 specification and adding the new 256-bit controller and embedded DMA engine, Synopsys helps designers meet the high-performance PCI Express 3.0 interface requirements of their designs for the enterprise computing market."
The DesignWare IP for PCI Express 3.0 is available now.
In addition, Synopsys has enhanced its DesignWare® digital controllers for PCI Express with new features including support for the latest PIPE 3.0 specification (v0.9), PCI-SIG Engineering Change Notifications (ECNs), 256-bit datapath and embedded DMA engine, all of which provide performance improvements for the PCIe interface.
The DesignWare IP for PCI Express 3.0 (Gen 3) is currently being used by leading semiconductor companies developing high-performance enterprise computing system-on-chips (SoC) designs. The DesignWare portfolio of silicon-proven digital controllers for PCI Express 3.0 includes Endpoint, Root Complex, Switch and Dual Mode cores, enabling designers to easily integrate the 8.0 GT/s PCI Express 3.0 interface into their SoC designs with less risk and improved time-to-market.
The Newest PCI Express features will be demonstrated at the IP Summit at SNUG San Jose, March 30th at the Santa Clara Convention Center.
In addition to supporting the final release of the PCIe 3.0 base specification (version 1.0), the DesignWare digital controllers have been enhanced to support several PCI-SIG ECNs, a 256-bit datapath option and an embedded DMA engine:
* The optional ECN's supported by the DesignWare digital controllers enable power reduction and increased performance for specific applications. Supported ECNs include: TLP Processing Hints, ID Based Ordering, Atomic Operations, BAR Resizing, Extended TAGs, Latency Tolerance Reporting (LTR) and Optimized Buffer Flush/Fill (OBFF).
* The new 256-bit datapath targets SoCs for the enterprise computing market that require a 16 lane (x16) PCIe 3.0 interface. The DesignWare digital controllers for PCI Express with 256-bit datapath are designed to handle multiple packets arriving in a single clock cycle, which provides a performance advantage over other solutions that simply scale the data bus of a 64-or 128-bit controller.
* The embedded DMA engine offloads the main SoC processor when moving large amounts of data between the PCIe interface and the rest of the system, thereby improving system performance and latency. The embedded DMA engine supports the native application interface or ARM AMBA AHB and AXI3 bridges, while also supporting advanced features such as multiple channels, interleaving, linked list and full duplex operation.
"LeCroy has worked closely with Synopsys to continuously conduct interoperability testing between our products as the PCI Express 3.0 specification evolved, resulting in proven products that have been demonstrated with hardware platforms at industry events," said Joe Mendolia, vice president at LeCroy. "Our collaboration through the years has provided designers with PCI Express IP, test equipment and software tools that help lower the risk of incorporating the PCI Express interface into their designs."
"As a leading provider of PCI Express IP, Synopsys continues to make technology advancements that give designers access to high-quality IP solutions that are interoperable and compliant to the latest standards," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "By supporting the final PCI Express 3.0 specification and adding the new 256-bit controller and embedded DMA engine, Synopsys helps designers meet the high-performance PCI Express 3.0 interface requirements of their designs for the enterprise computing market."
The DesignWare IP for PCI Express 3.0 is available now.
Samsung selects Veeco MOCVD system for advanced GaN-based power electronics research
PLAINVIEW, USA: Veeco Instruments Inc. announced that Samsung Advanced Institute of Technology (SAIT) in Korea has selected Veeco’s TurboDisc K465i Gallium Nitride (GaN) Metal Organic Chemical Vapor Deposition (MOCVD) System for advanced GaN on Si research for power electronics.
William J. Miller, executive VP of Veeco’s Compound Semiconductor Business, said: “Being selected as a research partner for GaN on Si by SAIT is an important strategic R&D win for Veeco. We look forward to continuing to work with SAIT to commercialize this technology for high volume manufacturing of GaN-based power electronic devices.”
“The GaN power electronics market is expected to grow significantly in coming years, with potential applications in energy-efficient power conversion devices,” according to Jim Jenson, VP of Marketing for Veeco’s Compound Semiconductor Business. Veeco’s MOCVD technology is well positioned to serve this emerging market.
The K465i incorporates Veeco’s Uniform FlowFlange® technology for superior uniformity and excellent run-to-run repeatability. Low maintenance TurboDisc technology enables highest system availability, excellent particle performance and high throughput. The production-proven K465i provides ease-of-tuning for fast process optimization on wafer sizes up to 8 inches and fast tool recovery time after maintenance.
William J. Miller, executive VP of Veeco’s Compound Semiconductor Business, said: “Being selected as a research partner for GaN on Si by SAIT is an important strategic R&D win for Veeco. We look forward to continuing to work with SAIT to commercialize this technology for high volume manufacturing of GaN-based power electronic devices.”
“The GaN power electronics market is expected to grow significantly in coming years, with potential applications in energy-efficient power conversion devices,” according to Jim Jenson, VP of Marketing for Veeco’s Compound Semiconductor Business. Veeco’s MOCVD technology is well positioned to serve this emerging market.
The K465i incorporates Veeco’s Uniform FlowFlange® technology for superior uniformity and excellent run-to-run repeatability. Low maintenance TurboDisc technology enables highest system availability, excellent particle performance and high throughput. The production-proven K465i provides ease-of-tuning for fast process optimization on wafer sizes up to 8 inches and fast tool recovery time after maintenance.
ON Semiconductor completes acquisition of CMOS image sensor business unit from Cypress
PHOENIX, USA: ON Semiconductor, a premier supplier of high performance silicon solutions for energy efficient electronics, has completed its acquisition of the CMOS Image Sensor Business Unit (ISBU) from Cypress Semiconductor in an all cash transaction for approximately $31.4 million, subject to adjustment under the purchase agreement. The purchase price was approximately 1x annual sales for the division.
The ISBU purchased from Cypress includes a broad portfolio of high-performance custom and standard CMOS image sensors used in multi-megapixel machine vision, linear and two dimensional (2D) bar code imaging, medical x-ray imaging, biometrics, digital photography and cinematography, and aerospace applications. The acquired products include the VITA, LUPA, STAR and IBIS families, which are well known throughout the industry.
ISBU is expected to become an integrated part of ON Semiconductor’s Digital, Military/Aerospace and Image Sensor (DMI) division under the direction of Vince Hopkin, vice president of DMI. “The ISBU acquisition solidifies ON Semiconductor’s position as a Top 10 worldwide image sensor supplier and a leading supplier of CMOS Image Sensor products,” said Hopkin.
“The 2D high-speed CMOS image sensors from the ISBU are a natural complement to ON Semiconductor’s existing electro-optical product portfolio which includes 1D CMOS linear contact image sensors (CIS), ambient light sensors (ALS) and proximity sensors. In addition, the acquisition strengthens the company’s talent base and adds an experienced design and applications engineering team for the image sensor market segment. Overall, the 2D high-speed CMOS image sensors from the ISBU significantly strengthens and complements ON Semiconductor’s image sensor products for the industrial, medical, computing and military/aerospace markets.”
With this acquisition, ON Semiconductor acquires approximately 100 patents and patent applications related exclusively to the business and receives appropriate intellectual property licenses from Cypress Semiconductor in order to continue to conduct and grow the business. As part of the transaction, approximately 70 Cypress Semiconductor ISBU employees join the ON Semiconductor organization. The majority of these employees are located in Mechelen, Belgium.
The ISBU purchased from Cypress includes a broad portfolio of high-performance custom and standard CMOS image sensors used in multi-megapixel machine vision, linear and two dimensional (2D) bar code imaging, medical x-ray imaging, biometrics, digital photography and cinematography, and aerospace applications. The acquired products include the VITA, LUPA, STAR and IBIS families, which are well known throughout the industry.
ISBU is expected to become an integrated part of ON Semiconductor’s Digital, Military/Aerospace and Image Sensor (DMI) division under the direction of Vince Hopkin, vice president of DMI. “The ISBU acquisition solidifies ON Semiconductor’s position as a Top 10 worldwide image sensor supplier and a leading supplier of CMOS Image Sensor products,” said Hopkin.
“The 2D high-speed CMOS image sensors from the ISBU are a natural complement to ON Semiconductor’s existing electro-optical product portfolio which includes 1D CMOS linear contact image sensors (CIS), ambient light sensors (ALS) and proximity sensors. In addition, the acquisition strengthens the company’s talent base and adds an experienced design and applications engineering team for the image sensor market segment. Overall, the 2D high-speed CMOS image sensors from the ISBU significantly strengthens and complements ON Semiconductor’s image sensor products for the industrial, medical, computing and military/aerospace markets.”
With this acquisition, ON Semiconductor acquires approximately 100 patents and patent applications related exclusively to the business and receives appropriate intellectual property licenses from Cypress Semiconductor in order to continue to conduct and grow the business. As part of the transaction, approximately 70 Cypress Semiconductor ISBU employees join the ON Semiconductor organization. The majority of these employees are located in Mechelen, Belgium.
Freescale intros intelligent sensor for car battery monitoring
embedded world 2011, NUREMBERG, GERMANY: Freescale Semiconductor has introduced the MM912J637 intelligent battery sensor (IBS), which accurately measures the voltage, current and temperature of lead-acid batteries and calculates the battery state, all while operating in harsh automotive conditions.
The ability to accurately assess these battery parameters is becoming more important with increases in the number of hybrid vehicles on the road and overall electronic content in vehicles, as well as the introduction of start-stop systems.
The MM912J637 IBS offers a rugged and cost-effective solution for designers, enabling precision measurement of key battery parameters in automotive and industrial applications. The device integrates a S12 microcontroller and a SMARTMOS analog control integrated circuit in a single-package solution, enabling significant reduction of effective application board space.
The MM912J637 IBS is designed to meet the highest automotive standards for electrostatic discharge, electromagnetic compatibility and zero defect quality levels. It is fully AEC-Q100 automotive qualified for operation from -40°C to +125°C, providing low power consumption in the target application. It comes in a small form factor, 7 x 7mm QFN package with wettable flanks technology, enabling optical inspection during assembly.
In today’s vehicles, the increasing electrical load presents a challenge to the battery. Vehicle breakdowns caused by the electrical system can usually be traced back to the lead-acid battery and can generally be avoided by knowing the precise state of the battery. The battery must be able to provide enough energy to crank the engine and be available as a passive power source to support new functions of hybrid vehicles such as start-stop and intelligent alternator control. In addition, the power consumption of the IBS needs to be as low as possible to ensure energy efficiency.
“With the rise in electrical content in hybrid and electric vehicles and the advent of the start-stop systems, it’s crucial to be able to accurately monitor a vehicle’s battery at all times, especially under tough automotive conditions,” said Gavin Woods, vice president and general manager of Freescale’s Analog, Mixed-Signal & Power Division. “We are providing the industry’s first fully automotive qualified and cost-effective solution that helps to ensure precise monitoring of important battery parameters which can be shared with other vehicle systems and the driver, providing the driver a certain amount of peace of mind when it comes to knowing the battery’s status.”
Freescale’s fully integrated, battery monitoring device communicates using a local interconnect network (LIN). It includes a two-channel, 16-bit analog-to-digital converter (ADC) for simultaneous measurement of battery voltage and current and an independent 16-bit ADC for temperature measurement. The IBS provides accurate monitoring with high resolution, even in worst-case conditions to allow a proper prediction of the battery’s state-of-health, state-of-charge and state-of-function. The automotive certified, in-vehicle LIN network communicates these parameters periodically or on-request.
The MM912J637 supports precise current measurement via an external shunt resistor at the negative pole of the battery and precise battery voltage measurement via a series resistor at the positive pole. The integrated temperature sensor combined with battery mounting allows accurate battery temperature measurement.
The ability to accurately assess these battery parameters is becoming more important with increases in the number of hybrid vehicles on the road and overall electronic content in vehicles, as well as the introduction of start-stop systems.
The MM912J637 IBS offers a rugged and cost-effective solution for designers, enabling precision measurement of key battery parameters in automotive and industrial applications. The device integrates a S12 microcontroller and a SMARTMOS analog control integrated circuit in a single-package solution, enabling significant reduction of effective application board space.
The MM912J637 IBS is designed to meet the highest automotive standards for electrostatic discharge, electromagnetic compatibility and zero defect quality levels. It is fully AEC-Q100 automotive qualified for operation from -40°C to +125°C, providing low power consumption in the target application. It comes in a small form factor, 7 x 7mm QFN package with wettable flanks technology, enabling optical inspection during assembly.
In today’s vehicles, the increasing electrical load presents a challenge to the battery. Vehicle breakdowns caused by the electrical system can usually be traced back to the lead-acid battery and can generally be avoided by knowing the precise state of the battery. The battery must be able to provide enough energy to crank the engine and be available as a passive power source to support new functions of hybrid vehicles such as start-stop and intelligent alternator control. In addition, the power consumption of the IBS needs to be as low as possible to ensure energy efficiency.
“With the rise in electrical content in hybrid and electric vehicles and the advent of the start-stop systems, it’s crucial to be able to accurately monitor a vehicle’s battery at all times, especially under tough automotive conditions,” said Gavin Woods, vice president and general manager of Freescale’s Analog, Mixed-Signal & Power Division. “We are providing the industry’s first fully automotive qualified and cost-effective solution that helps to ensure precise monitoring of important battery parameters which can be shared with other vehicle systems and the driver, providing the driver a certain amount of peace of mind when it comes to knowing the battery’s status.”
Freescale’s fully integrated, battery monitoring device communicates using a local interconnect network (LIN). It includes a two-channel, 16-bit analog-to-digital converter (ADC) for simultaneous measurement of battery voltage and current and an independent 16-bit ADC for temperature measurement. The IBS provides accurate monitoring with high resolution, even in worst-case conditions to allow a proper prediction of the battery’s state-of-health, state-of-charge and state-of-function. The automotive certified, in-vehicle LIN network communicates these parameters periodically or on-request.
The MM912J637 supports precise current measurement via an external shunt resistor at the negative pole of the battery and precise battery voltage measurement via a series resistor at the positive pole. The integrated temperature sensor combined with battery mounting allows accurate battery temperature measurement.
Applied Materials, Magma integrate CAD and inspection systems for faster yield ramp at advanced nodes
SANTA CLARA, USA: Applied Materials, Inc. and Magma Design Automation, Inc. announced that they have integrated Magma's CAD (computer-aided design)-based navigation and yield analysis software with Applied's advanced inspection systems.
This unique combination of design and manufacturing tools has accelerated lithography qualification and improved chip yields at multiple customers for the development and production of advanced technology nodes.
"The introduction of CAD-based inspection technology for defect analysis and monitoring at GLOBALFOUNDRIES Fab 1 has helped improve defect management efficiency and reduce cycle time for process optimization," said Remo Kirsch, manager of Contamination Free Manufacturing at GLOBALFOUNDRIES Fab 1 in Dresden, Germany. "Both our production and development lines now rely on this technology to help guarantee process quality and yield stability."
As device features shrink, achieving acceptable yields becomes increasingly challenging. Complex interactions between process conditions and design produces "hot spots" - areas where the printed pattern deviates from the design intent - which must be eliminated before a chip can go into production.
Integrating design and real-time inspection data provides customers with an innovative way to identify hot spots in a production environment and improve their product qualification process. In addition, the conditions that produce hot spots can be fed back to the design process - improving subsequent designs. This is a critical benefit in today's fast-changing, high-mix chip fabrication operations.
"As product development cycles become shorter and shorter, the game has changed from yield maximization to yield ramp," said Ronen Benzion, vice president and general manager of Applied's Process Diagnostics and Control Business Unit. "Our groundbreaking work with Magma will help our customers speed their new products to market and reduce time-to-revenue."
"Without the ability to overcome litho qualification roadblocks rapidly, 22nm designs will be extremely time-consuming and expensive to bring to volume production," said Ankush Oberai, general manager and vice president of Magma's Fab Analysis Business Unit. "By combining Magma's CAD-based analysis technology with Applied's advanced defect inspection and review systems, we can compress design cycles and accelerate learning for future product generations."
This unique combination of design and manufacturing tools has accelerated lithography qualification and improved chip yields at multiple customers for the development and production of advanced technology nodes.
"The introduction of CAD-based inspection technology for defect analysis and monitoring at GLOBALFOUNDRIES Fab 1 has helped improve defect management efficiency and reduce cycle time for process optimization," said Remo Kirsch, manager of Contamination Free Manufacturing at GLOBALFOUNDRIES Fab 1 in Dresden, Germany. "Both our production and development lines now rely on this technology to help guarantee process quality and yield stability."
As device features shrink, achieving acceptable yields becomes increasingly challenging. Complex interactions between process conditions and design produces "hot spots" - areas where the printed pattern deviates from the design intent - which must be eliminated before a chip can go into production.
Integrating design and real-time inspection data provides customers with an innovative way to identify hot spots in a production environment and improve their product qualification process. In addition, the conditions that produce hot spots can be fed back to the design process - improving subsequent designs. This is a critical benefit in today's fast-changing, high-mix chip fabrication operations.
"As product development cycles become shorter and shorter, the game has changed from yield maximization to yield ramp," said Ronen Benzion, vice president and general manager of Applied's Process Diagnostics and Control Business Unit. "Our groundbreaking work with Magma will help our customers speed their new products to market and reduce time-to-revenue."
"Without the ability to overcome litho qualification roadblocks rapidly, 22nm designs will be extremely time-consuming and expensive to bring to volume production," said Ankush Oberai, general manager and vice president of Magma's Fab Analysis Business Unit. "By combining Magma's CAD-based analysis technology with Applied's advanced defect inspection and review systems, we can compress design cycles and accelerate learning for future product generations."
TI’s OMAP platform spurs Me-D experiences
DALLAS, USA & BANGALORE, INDIA: Texas Instruments Inc. (TI) recently unleashed new dimensions of the mobile world, labeled “Me-D experiences,” which are uniquely enabled by TI’s OMAP platform.
What exactly are Me-D experiences? They are TI’s trend-setting interactions in which consumers are no longer limited to the physical confines of a mobile device, but rather set free by the ability to make any physical environment the center of the mobile universe. The world isn’t flat, after all, so mobile technologies shouldn’t be either.
TI’s OMAP 4 platform, shipping today, steps ahead of the market to deliver unparalleled Me-D experiences, including: touchless gesturing in the “natural” dimension, stereoscopic 3D (S3D) in the “third” dimension, and interactive projection in the “projected” dimension.
“At TI, we embody a pace-setter approach, thinking far ahead about how to turn future-looking features into real-life experiences for end users around the world,” said Avner Goren, general manager of strategic marketing, OMAP platform business unit, TI.
“Our Me-D experiences represent an inflection point in this approach, as we drive new mobile opportunities for customers to take advantage of – from S3D and interactive projection to natural gestures. Together with complementary solutions from TI’s partners, our OMAP platform now offers a complete package to make mobile interactions truly personalized and intuitive. This is about creating technological demand, in advance of the demand itself coming to market. This is the future.”
The natural dimension: Gesturing
Everyday conversations not only include speech, but natural gestures. TI’s OMAP platform brings these common, intuitive gestures to the mobile environment as a new means to interact with devices. Utilizing technology from TI’s partner Extreme Reality (XTR), TI is demonstrating and offering a touchless gesturing engine which uses a single, simple low-resolution and low-power camera geared for mobile devices.
The solution comes with a complete application framework supported by a full set of tools, which enables application developers and OEMs to easily access the gesturing library, and connect gesture features to existing and future applications. The solution will be available in the second quarter of 2011.
The gesturing engine leverages unique OMAP 4 processor hardware resources, including imaging and vision hardware accelerators and libraries, a programmable DSP and an embedded programmable CPU. This allows TI and XTR to offer low-power gesturing running concurrently with any application – an unequaled enabler of this natural dimension.
Everyday life also includes hand writing, notes taking and drawing. TI’s OMAP platform, coupled with EPOS technology, allows users to take notes and draw in the most natural way – using a pen or stylus. The writing tool is equipped with EPOS patented ultrasonic transmitter, and the OMAP processor picks the transmitted signals using three microphones to accurately determine the pen or stylus location. This allows users to take notes either on the screen, or off screen – next to the mobile device, with or without paper or ink.
The third dimension: Stereoscopic-3D (S3D)
Glasses are not a requirement for 3D vision in the real-world, nor are they needed to lift mobile experiences to the third dimension. TI now provides a feature-complete software package for the OMAP 4 platform, available today, which enables S3D, HD video and image capture, processing and rendering.
TI will also provide automatic 2D-to-S3D conversion capabilities, based on the TriDef solutions from DDD, a leader in the S3D market. With this comprehensive S3D and HD support, consumers will be able to capture high-quality images and video using two cameras. They will also be able to view true-S3D content on mobile devices with the naked eye – no glasses required – using auto-stereoscopic displays that send images separately to the left and right eye. These separate, 2D images combine in the brain to create an S3D image.
Unlike other mobile processor offerings, the OMAP 4 platform is an unequaled enabler of the third dimension with the right hardware resources, processing performance and flexibility to support S3D up to HD quality. This includes a powerful image signal processor, which supports the two cameras and provides a crystal-clear S3D images. A programmable display controller supports local auto-stereoscopic displays as well as an external 3D TV connected over the HDMI cable. The programmable IVA also provides support for S3D record and playback up to HD quality.
The projected dimension: Interactive projection
Consumers constantly demand new ways to enjoy and share content. Today, it’s not just about the ability to project a video or presentation on a wall – it’s about interacting with those projected images in the same way possible with a touchscreen. Imagine projecting slides on a wall and moving objects around with a simple touch and drag, or projecting a virtual keyboard on a café table to type a note to a friend.
These and other features will be enabled by the unmatched combination of TI’s OMAP and DLP Pico projection technologies, which expand mobile devices’ physical reach to virtually any surface, including tables, walls or desks. The OMAP platform is equipped with highly optimized hardware accelerators and software, which together allow high-performance, interactive projection at low power levels.
OMAP processors’ gesture recognition software, developed by XTR and TI, is able to identify the projected image, the finger position and the “click.” Support for this interactive projection technology will be available in the second half of 2011.
What exactly are Me-D experiences? They are TI’s trend-setting interactions in which consumers are no longer limited to the physical confines of a mobile device, but rather set free by the ability to make any physical environment the center of the mobile universe. The world isn’t flat, after all, so mobile technologies shouldn’t be either.
TI’s OMAP 4 platform, shipping today, steps ahead of the market to deliver unparalleled Me-D experiences, including: touchless gesturing in the “natural” dimension, stereoscopic 3D (S3D) in the “third” dimension, and interactive projection in the “projected” dimension.
“At TI, we embody a pace-setter approach, thinking far ahead about how to turn future-looking features into real-life experiences for end users around the world,” said Avner Goren, general manager of strategic marketing, OMAP platform business unit, TI.
“Our Me-D experiences represent an inflection point in this approach, as we drive new mobile opportunities for customers to take advantage of – from S3D and interactive projection to natural gestures. Together with complementary solutions from TI’s partners, our OMAP platform now offers a complete package to make mobile interactions truly personalized and intuitive. This is about creating technological demand, in advance of the demand itself coming to market. This is the future.”
The natural dimension: Gesturing
Everyday conversations not only include speech, but natural gestures. TI’s OMAP platform brings these common, intuitive gestures to the mobile environment as a new means to interact with devices. Utilizing technology from TI’s partner Extreme Reality (XTR), TI is demonstrating and offering a touchless gesturing engine which uses a single, simple low-resolution and low-power camera geared for mobile devices.
The solution comes with a complete application framework supported by a full set of tools, which enables application developers and OEMs to easily access the gesturing library, and connect gesture features to existing and future applications. The solution will be available in the second quarter of 2011.
The gesturing engine leverages unique OMAP 4 processor hardware resources, including imaging and vision hardware accelerators and libraries, a programmable DSP and an embedded programmable CPU. This allows TI and XTR to offer low-power gesturing running concurrently with any application – an unequaled enabler of this natural dimension.
Everyday life also includes hand writing, notes taking and drawing. TI’s OMAP platform, coupled with EPOS technology, allows users to take notes and draw in the most natural way – using a pen or stylus. The writing tool is equipped with EPOS patented ultrasonic transmitter, and the OMAP processor picks the transmitted signals using three microphones to accurately determine the pen or stylus location. This allows users to take notes either on the screen, or off screen – next to the mobile device, with or without paper or ink.
The third dimension: Stereoscopic-3D (S3D)
Glasses are not a requirement for 3D vision in the real-world, nor are they needed to lift mobile experiences to the third dimension. TI now provides a feature-complete software package for the OMAP 4 platform, available today, which enables S3D, HD video and image capture, processing and rendering.
TI will also provide automatic 2D-to-S3D conversion capabilities, based on the TriDef solutions from DDD, a leader in the S3D market. With this comprehensive S3D and HD support, consumers will be able to capture high-quality images and video using two cameras. They will also be able to view true-S3D content on mobile devices with the naked eye – no glasses required – using auto-stereoscopic displays that send images separately to the left and right eye. These separate, 2D images combine in the brain to create an S3D image.
Unlike other mobile processor offerings, the OMAP 4 platform is an unequaled enabler of the third dimension with the right hardware resources, processing performance and flexibility to support S3D up to HD quality. This includes a powerful image signal processor, which supports the two cameras and provides a crystal-clear S3D images. A programmable display controller supports local auto-stereoscopic displays as well as an external 3D TV connected over the HDMI cable. The programmable IVA also provides support for S3D record and playback up to HD quality.
The projected dimension: Interactive projection
Consumers constantly demand new ways to enjoy and share content. Today, it’s not just about the ability to project a video or presentation on a wall – it’s about interacting with those projected images in the same way possible with a touchscreen. Imagine projecting slides on a wall and moving objects around with a simple touch and drag, or projecting a virtual keyboard on a café table to type a note to a friend.
These and other features will be enabled by the unmatched combination of TI’s OMAP and DLP Pico projection technologies, which expand mobile devices’ physical reach to virtually any surface, including tables, walls or desks. The OMAP platform is equipped with highly optimized hardware accelerators and software, which together allow high-performance, interactive projection at low power levels.
OMAP processors’ gesture recognition software, developed by XTR and TI, is able to identify the projected image, the finger position and the “click.” Support for this interactive projection technology will be available in the second half of 2011.
Freescale and CEA-Leti celebrate 10 years of MEMS collaboration
embedded world 2011, NUREMBERG, GERMANY: Freescale Semiconductor and CEA-Leti, a leading research lab for micro-electromechanical systems (MEMS) products and technologies, have partnered for the past decade to combine their expertise in MEMS development.
Building on collaborative efforts that began in 2001, Freescale and CEA-Leti will continue to focus on developing new breakthroughs in MEMS technology and advanced sensor products through their joint lab.
Freescale and CEA-Leti researchers have already demonstrated a state-of-the-art high aspect ratio micro-electromechanical systems (HARMEMS) lateral sensing technology that has been in production for several years at Freescale for automotive airbag sensing applications. The accelerometers have an advanced transducer design that enhances sensor offset performance over the life and operating conditions of the demanding application.
HARMEMS technology provides over-damped mechanical response and exceptional signal-to-noise ratio to address customer requirements. HARMEMS technology has also been introduced in dual-axis accelerometers used in electronic stability control (ESC) applications to measure the lateral acceleration of the vehicle.
“Our sensor technology initiative with Leti demonstrates Freescale’s commitment to winning in the sensors space,” said Tom Deitrich, senior vice president and general manager of Freescale’s RF, Analog & Sensor Group. “We are proud to work with CEA-Leti, one of the world’s elite MEMS applied research labs. This effort will continue to put Freescale at the forefront of sensor innovation, helping our customers build leading-edge products.”
In 2010, Freescale introduced its Xtrinsic advanced sensor products. Xtrinsic sensors are designed with the right combination of intelligent integration, logic and customizable software to help deliver smarter, more differentiated applications. Freescale and CEA-Leti will collaborate on integrating Xtrinsic sensors to support merging automotive active safety systems, such as driver assistance systems and electronic stability control. Work is also underway to combine multiple sensor inputs, logic and other building blocks to bring greater value and decision making sensing solutions for the consumer and industrial markets.
“Freescale and CEA-Leti’s long-standing partnership demonstrates the confidence our industry partners have in Leti’s 25-year background, as well as their interest in our new MEMS 200mm line,” said Laurent Malier, CEO at CEA-Leti. “We are excited to continue working with Freescale, a high-volume MEMS manufacturer, to support the strong growth of the sensor market.”
A forecast by IHS iSuppli predicts global MEMS sensor revenues could rise to $5.4 billion by 2014, up from $3.7 billion in 2010. Next to the accelerated adoption of sensors in handsets and consumer electronics, the new growth drivers include strong demand from BRIC countries, mandates for safety and emission in the automotive sector, and a robust demand for sensors and actuators in industrial and medical markets according to IHS iSuppli.
Freescale and CEA-Leti recognize the increasing importance and pervasiveness of MEMS sensor technologies, which have system-level impact across automotive, consumer and industrial applications. Customers in these market areas require innovative development to deliver solutions with better performance and higher quality.
Building on collaborative efforts that began in 2001, Freescale and CEA-Leti will continue to focus on developing new breakthroughs in MEMS technology and advanced sensor products through their joint lab.
Freescale and CEA-Leti researchers have already demonstrated a state-of-the-art high aspect ratio micro-electromechanical systems (HARMEMS) lateral sensing technology that has been in production for several years at Freescale for automotive airbag sensing applications. The accelerometers have an advanced transducer design that enhances sensor offset performance over the life and operating conditions of the demanding application.
HARMEMS technology provides over-damped mechanical response and exceptional signal-to-noise ratio to address customer requirements. HARMEMS technology has also been introduced in dual-axis accelerometers used in electronic stability control (ESC) applications to measure the lateral acceleration of the vehicle.
“Our sensor technology initiative with Leti demonstrates Freescale’s commitment to winning in the sensors space,” said Tom Deitrich, senior vice president and general manager of Freescale’s RF, Analog & Sensor Group. “We are proud to work with CEA-Leti, one of the world’s elite MEMS applied research labs. This effort will continue to put Freescale at the forefront of sensor innovation, helping our customers build leading-edge products.”
In 2010, Freescale introduced its Xtrinsic advanced sensor products. Xtrinsic sensors are designed with the right combination of intelligent integration, logic and customizable software to help deliver smarter, more differentiated applications. Freescale and CEA-Leti will collaborate on integrating Xtrinsic sensors to support merging automotive active safety systems, such as driver assistance systems and electronic stability control. Work is also underway to combine multiple sensor inputs, logic and other building blocks to bring greater value and decision making sensing solutions for the consumer and industrial markets.
“Freescale and CEA-Leti’s long-standing partnership demonstrates the confidence our industry partners have in Leti’s 25-year background, as well as their interest in our new MEMS 200mm line,” said Laurent Malier, CEO at CEA-Leti. “We are excited to continue working with Freescale, a high-volume MEMS manufacturer, to support the strong growth of the sensor market.”
A forecast by IHS iSuppli predicts global MEMS sensor revenues could rise to $5.4 billion by 2014, up from $3.7 billion in 2010. Next to the accelerated adoption of sensors in handsets and consumer electronics, the new growth drivers include strong demand from BRIC countries, mandates for safety and emission in the automotive sector, and a robust demand for sensors and actuators in industrial and medical markets according to IHS iSuppli.
Freescale and CEA-Leti recognize the increasing importance and pervasiveness of MEMS sensor technologies, which have system-level impact across automotive, consumer and industrial applications. Customers in these market areas require innovative development to deliver solutions with better performance and higher quality.
PMC-Sierra expands 6Gb/s ecosystem in channel with availability of Adaptec by PMC series 6 RAID controllers
CeBIT 2011, Storage Pavilion, SUNNYVALE, USA & HANNOVER, GERMANY: PMC-Sierra Inc. announced that the Adaptec by PMC family of Series 6 RAID controllers will be demonstrated in a 6Gb/s ecosystem at CeBIT 2011.
Based on PMC-Sierra’s industry-proven SRC 8x6G RoC and ARC RAID stack, the Series 6 delivers performance, scalability and reduced operating costs. The Series 6 also features a unique Zero-Maintenance Cache Protection feature that provides the highest level of maintenance-free data protection.
To ensure compatibility and interoperability, the Series 6 family of RAID controllers is tested with more than 300 host systems, enclosures, Hard Disk Drives and Solid State Disks (SSDs). PMC-Sierra uses a two-staged approach to test new storage and server components for interoperability. During validation and product launch, the company tests more than 300 components with all supported controller platforms.
In addition, PMC-Sierra’s Interoperability Test Lab (ITL) can test components introduced outside of product launches and add them to the ecosystem. Continuously refined and optimized, the Company’s advanced testing methods include automated processes to rapidly qualify new SSDs in order to keep pace with market requirements.
“As the 6Gb/s channel ecosystem expands, customers want storage solutions that deliver increased performance without compromising interoperability and compatibility,” said Jared Peters, vice president and general manager of PMC-Sierra’s Channel Storage Division. “Our Series 6 RAID controllers allow for backwards compatibility, which enables an easy and cost-effective upgrade path for current 3Gb/s customers, who can continue to benefit from our innovative features such as Zero-Maintenance Cache Protection and Intelligent Power Management.”
Based on PMC-Sierra’s industry-proven SRC 8x6G RoC and ARC RAID stack, the Series 6 delivers performance, scalability and reduced operating costs. The Series 6 also features a unique Zero-Maintenance Cache Protection feature that provides the highest level of maintenance-free data protection.
To ensure compatibility and interoperability, the Series 6 family of RAID controllers is tested with more than 300 host systems, enclosures, Hard Disk Drives and Solid State Disks (SSDs). PMC-Sierra uses a two-staged approach to test new storage and server components for interoperability. During validation and product launch, the company tests more than 300 components with all supported controller platforms.
In addition, PMC-Sierra’s Interoperability Test Lab (ITL) can test components introduced outside of product launches and add them to the ecosystem. Continuously refined and optimized, the Company’s advanced testing methods include automated processes to rapidly qualify new SSDs in order to keep pace with market requirements.
“As the 6Gb/s channel ecosystem expands, customers want storage solutions that deliver increased performance without compromising interoperability and compatibility,” said Jared Peters, vice president and general manager of PMC-Sierra’s Channel Storage Division. “Our Series 6 RAID controllers allow for backwards compatibility, which enables an easy and cost-effective upgrade path for current 3Gb/s customers, who can continue to benefit from our innovative features such as Zero-Maintenance Cache Protection and Intelligent Power Management.”
Fujitsu and ARM sign comprehensive license agreement
CAMBRIDGE, UK & YOKOHAMA, JAPAN: Fujitsu Semiconductor Ltd and ARM have signed a comprehensive license agreement for ARM IP products. Through this strategic agreement, Fujitsu Semiconductor will offer platforms featuring the latest ARM technology, including the Cortex-A15 processor, Mali graphics and CoreLink systems IP, in order to help accelerate its customers’ product development.
The two companies have been collaborating for more than a decade. More recently, Fujitsu Semiconductor launched sales of its FM3 family of general-purpose microcomputers equipped with the Cortex-M3 processor last November.
The agreement will enhance and deepen the companies’ partnership, and Fujitsu Semiconductor will provide its customers with cutting-edge ARM technology at an early stage as it develops new products in order to accelerate its customers’ product development.
The combination of compatible and scalable low-power processor IP, including the recently launched Cortex-A15 processor, graphics and fabric IP, will enable Fujitsu Semiconductor to continuously provide its customers with complete, full function SoC platforms featuring ARM technology, while significantly reducing time-to-market.
“Fujitsu Semiconductor is working to enhance its product appeal and boost its IP lineup,” said corporate senior VP, Haruyoshi Yagi, of Fujitsu Semiconductor. “One of the major ways in which we are doing this is with this comprehensive license agreement we have signed with ARM. This will allow our customers to select the ARM technology most suited for their application, and use a platform that combines it with other IP provided by us. These platforms will use our proven design and authentication technology, meaning we will be able to achieve high levels of quality and functionality, as well as a dramatic reduction in LSI development time.
“Fujitsu Semiconductor provides products that meet its customers’ needs in a timely manner over a wide range of applications. We are already moving ahead with the provision of IP to ASIC customers and the development of our ASSP, which are scheduled to be rolled out sequentially in the second half of 2011.
“In addition, we will share the Fujitsu Semiconductor product roadmap with ARM, and closely collaborate in the development of future ARM technologies, from the specification setting stage and up. As a strategic partner, we look forward to an even closer relationship with ARM.”
“In a constantly evolving marketplace, ARM is committed to empowering its Partners with the resources they need to not only remain competitive today, but to meet future technology challenges head-on,” said Tudor Brown, president, ARM. “The combination of ARM’s advanced processor, system and graphics technology and Fujitsu’s leadership in advanced SoC development forms a solid foundation for the development of pioneering semiconductor products.”
The two companies have been collaborating for more than a decade. More recently, Fujitsu Semiconductor launched sales of its FM3 family of general-purpose microcomputers equipped with the Cortex-M3 processor last November.
The agreement will enhance and deepen the companies’ partnership, and Fujitsu Semiconductor will provide its customers with cutting-edge ARM technology at an early stage as it develops new products in order to accelerate its customers’ product development.
The combination of compatible and scalable low-power processor IP, including the recently launched Cortex-A15 processor, graphics and fabric IP, will enable Fujitsu Semiconductor to continuously provide its customers with complete, full function SoC platforms featuring ARM technology, while significantly reducing time-to-market.
“Fujitsu Semiconductor is working to enhance its product appeal and boost its IP lineup,” said corporate senior VP, Haruyoshi Yagi, of Fujitsu Semiconductor. “One of the major ways in which we are doing this is with this comprehensive license agreement we have signed with ARM. This will allow our customers to select the ARM technology most suited for their application, and use a platform that combines it with other IP provided by us. These platforms will use our proven design and authentication technology, meaning we will be able to achieve high levels of quality and functionality, as well as a dramatic reduction in LSI development time.
“Fujitsu Semiconductor provides products that meet its customers’ needs in a timely manner over a wide range of applications. We are already moving ahead with the provision of IP to ASIC customers and the development of our ASSP, which are scheduled to be rolled out sequentially in the second half of 2011.
“In addition, we will share the Fujitsu Semiconductor product roadmap with ARM, and closely collaborate in the development of future ARM technologies, from the specification setting stage and up. As a strategic partner, we look forward to an even closer relationship with ARM.”
“In a constantly evolving marketplace, ARM is committed to empowering its Partners with the resources they need to not only remain competitive today, but to meet future technology challenges head-on,” said Tudor Brown, president, ARM. “The combination of ARM’s advanced processor, system and graphics technology and Fujitsu’s leadership in advanced SoC development forms a solid foundation for the development of pioneering semiconductor products.”
Magma’s Titan and FineSim validated for LFoundry interoperable PDKs (iPDKs), accelerating turnaround time for analog/mixed-signal SoCs
USA & BANGALORE, INDIA: Magma Design Automation, a provider of chip design software, and LFoundry, the customer-specific manufacturer of choice for analog, mixed-signal and specialized technologies, announced the LFoundry’s interoperable process design kits (iPDKs) are validated for use with the Titan Mixed-Signal Design Platform, Titan Acclerators and FineSim circuit simulator for 0.15-micron technology platforms.
The combination of Magma’s Titan and FineSim software and LFoundry’s process technology will accelerate development of analog/mixed-signal (AMS) products, especially for European system-on-chip (SoC) developers.
LFoundry’s leading 0.15-micron process offers excellent performance for RF applications, with results comparable to 0.13-micron technologies. This enables designers to manufacture cost-effective products that offer high performance.
The Titan Mixed-Signal Design Platform is a unified mixed-signal design cockpit with a very high capacity and a very fast database access mechanism. Titan comprises user-friendly full-custom schematic and layout editors, an analog simulation environment integrated with the super-fast and accurate FineSim simulator, correct-by-design schematic-driven layout and integration with Magma’s tools for physical verification and digital implementation. The LFoundry iPDK’s detailed flow steps and advanced Titan and FineSim capabilities provide LFoundry and Magma customers with improved productivity and faster turnaround time for analog/mixed-signal design.
“LFoundry’s philosophy is to provide flexible EDA solutions that increase our customer base and customers’ productivity,” said Gerhard Spitzlsperger, CTO, LFoundry. “By working with Magma to qualify Titan and FineSim in our recently released iPDK platform, we can enable our customers to increase performance and improve IP reuse and portability while reducing turnaround time.”
“In today’s market, it is tougher than ever to develop highly differentiated, yet profitable, mixed-signal SoCs,” said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. “The combination of Titan and FineSim with LFoundry process technology provides a comprehensive mixed-signal design solution that accelerates the development process, enabling designers to explore the design space quickly and deliver high-quality designs faster.
LFoundry process technology
LFoundry iPDKs will provide designers quick and flexible access to an advanced 0.15-micron foundry platform. The 0.15-micron platform, with I/O voltages of 1.8V, 3.3V and 5.0V on PMOS and NMOS for high-speed and low-leakage applications, includes a modular LDMOS designed for RF and HV applications.
Further enhancements include one-time programmable (OTP) memory, SRAM, EEPROM and area-optimized Flash, an 8-bit microcontroller, various ADCs (analog-to-digital converters) and several more modular IP options for advanced system-on-chip (SoC) designs.
Titan: Accelerating analog design
The Titan environment includes the comprehensive Titan Mixed-Signal Design Platform and a set of breakthrough point-tool technologies known as the Titan Accelerators. The Titan Mixed-Signal Platform is the industry’s first true mixed-signal design platform. It integrates implementation and verification while delivering first-time-correct, predictable mixed-signal designs.
The Titan mixed-signal platform includes user-friendly full-custom schematic and layout editors, an analog simulation environment integrated with the FineSim simulator, correct-by-design schematic-driven layout.
Titan Accelerators are advanced technology solutions that dramatically improve analog/mixed-signal design productivity and reuse. Titan Analog Virtual Prototyper (AVP) is a layout-aware schematic design tool that performs simultaneous electrical and physical co-design for rapid schematic-to-layout convergence.
Titan Analog Layout Accelerator (ALX) automates migration of analog cell layouts to new process technologies while preserving design intent. Titan Shape-Based Router (SBR) automates difficult routing tasks to deliver a 10X improvement in routing productivity.
The combination of Magma’s Titan and FineSim software and LFoundry’s process technology will accelerate development of analog/mixed-signal (AMS) products, especially for European system-on-chip (SoC) developers.
LFoundry’s leading 0.15-micron process offers excellent performance for RF applications, with results comparable to 0.13-micron technologies. This enables designers to manufacture cost-effective products that offer high performance.
The Titan Mixed-Signal Design Platform is a unified mixed-signal design cockpit with a very high capacity and a very fast database access mechanism. Titan comprises user-friendly full-custom schematic and layout editors, an analog simulation environment integrated with the super-fast and accurate FineSim simulator, correct-by-design schematic-driven layout and integration with Magma’s tools for physical verification and digital implementation. The LFoundry iPDK’s detailed flow steps and advanced Titan and FineSim capabilities provide LFoundry and Magma customers with improved productivity and faster turnaround time for analog/mixed-signal design.
“LFoundry’s philosophy is to provide flexible EDA solutions that increase our customer base and customers’ productivity,” said Gerhard Spitzlsperger, CTO, LFoundry. “By working with Magma to qualify Titan and FineSim in our recently released iPDK platform, we can enable our customers to increase performance and improve IP reuse and portability while reducing turnaround time.”
“In today’s market, it is tougher than ever to develop highly differentiated, yet profitable, mixed-signal SoCs,” said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. “The combination of Titan and FineSim with LFoundry process technology provides a comprehensive mixed-signal design solution that accelerates the development process, enabling designers to explore the design space quickly and deliver high-quality designs faster.
LFoundry process technology
LFoundry iPDKs will provide designers quick and flexible access to an advanced 0.15-micron foundry platform. The 0.15-micron platform, with I/O voltages of 1.8V, 3.3V and 5.0V on PMOS and NMOS for high-speed and low-leakage applications, includes a modular LDMOS designed for RF and HV applications.
Further enhancements include one-time programmable (OTP) memory, SRAM, EEPROM and area-optimized Flash, an 8-bit microcontroller, various ADCs (analog-to-digital converters) and several more modular IP options for advanced system-on-chip (SoC) designs.
Titan: Accelerating analog design
The Titan environment includes the comprehensive Titan Mixed-Signal Design Platform and a set of breakthrough point-tool technologies known as the Titan Accelerators. The Titan Mixed-Signal Platform is the industry’s first true mixed-signal design platform. It integrates implementation and verification while delivering first-time-correct, predictable mixed-signal designs.
The Titan mixed-signal platform includes user-friendly full-custom schematic and layout editors, an analog simulation environment integrated with the FineSim simulator, correct-by-design schematic-driven layout.
Titan Accelerators are advanced technology solutions that dramatically improve analog/mixed-signal design productivity and reuse. Titan Analog Virtual Prototyper (AVP) is a layout-aware schematic design tool that performs simultaneous electrical and physical co-design for rapid schematic-to-layout convergence.
Titan Analog Layout Accelerator (ALX) automates migration of analog cell layouts to new process technologies while preserving design intent. Titan Shape-Based Router (SBR) automates difficult routing tasks to deliver a 10X improvement in routing productivity.
Sunplus selects ANT Galio platform for SoC solution
CAMBRIDGE, UK: ANT, an established provider of software and services for the delivery of digital TV, announced that leading provider of multimedia system-on-a-chip (SoC) for home entertainment applications, Sunplus Technology, has licensed the ANT Galio Platform and core TV applications.
The ANT Galio Platform will be integrated with Sunplus SoC solutions for a range of Connected TV, set-top box (STB) and DVD SoC solutions, to support the delivery of Over-The-Top (OTT) services including HbbTV (Hybrid Broadcast Broadband TV) to the European market.
The ANT Galio Platform is the result of years of experience in high volume TV platform deployment. It pre-integrates a powerful Web 2.0 CEHTML browser engine into a standards-compliant and feature rich TV middleware solution, optimised to deliver comprehensive TV functionality and a compelling user experiences. The ANT Galio Platform is increasingly regarded as the industry de facto standard solution and has been widely adopted by TV device vendors’ to support the delivery of new OTT services.
Sunplus will integrate the ANT Galio Platform and TV applications with its new range of SoC solutions to provide its customers with the opportunity to differentiate their products with a de-risked, turnkey solution. Connected TV, STB and DVD manufacturers will be able to deliver additional hybrid TV services such as HbbTV while benefiting from a significantly reduced time to market.
Chou-Chye Huang, CEO, Sunplus Technology commented: “By working with ANT we can enhance the functionality of our IC solutions without compromising on performance. By adding an established HbbTV solution, we can enable a wide range of home entertainment manufacturers to quickly target the HbbTV market, capitalising on ANT’s vast experience of the delivery of OTT services both in Europe and worldwide.”
Simon Woodward, CEO, ANT added: “ANT has always been committed to delivering the best possible consumer TV experiences based on industry standards. We now recognise that HbbTV is attracting a broad range of Connected TV, STB, Blu-ray and DVD vendors to the market. To support this trend we are delighted to be working with Sunplus who deliver turnkey solutions into all of these vendors.”
The ANT Galio Platform will be integrated with Sunplus SoC solutions for a range of Connected TV, set-top box (STB) and DVD SoC solutions, to support the delivery of Over-The-Top (OTT) services including HbbTV (Hybrid Broadcast Broadband TV) to the European market.
The ANT Galio Platform is the result of years of experience in high volume TV platform deployment. It pre-integrates a powerful Web 2.0 CEHTML browser engine into a standards-compliant and feature rich TV middleware solution, optimised to deliver comprehensive TV functionality and a compelling user experiences. The ANT Galio Platform is increasingly regarded as the industry de facto standard solution and has been widely adopted by TV device vendors’ to support the delivery of new OTT services.
Sunplus will integrate the ANT Galio Platform and TV applications with its new range of SoC solutions to provide its customers with the opportunity to differentiate their products with a de-risked, turnkey solution. Connected TV, STB and DVD manufacturers will be able to deliver additional hybrid TV services such as HbbTV while benefiting from a significantly reduced time to market.
Chou-Chye Huang, CEO, Sunplus Technology commented: “By working with ANT we can enhance the functionality of our IC solutions without compromising on performance. By adding an established HbbTV solution, we can enable a wide range of home entertainment manufacturers to quickly target the HbbTV market, capitalising on ANT’s vast experience of the delivery of OTT services both in Europe and worldwide.”
Simon Woodward, CEO, ANT added: “ANT has always been committed to delivering the best possible consumer TV experiences based on industry standards. We now recognise that HbbTV is attracting a broad range of Connected TV, STB, Blu-ray and DVD vendors to the market. To support this trend we are delighted to be working with Sunplus who deliver turnkey solutions into all of these vendors.”
PerfectVIPs to showcase products at DvCon'2011
USA: PerfectVIPs is a leading provider of highest quality verification IP products for storage applications, Peripheral interconnects and On-Chip bus interfaces, has been consistently providing semiconductor industry with outstanding VIPs ensuring a first pass success on the chip.
PerfectVIPs Verification-IP portfolio includes ONFi 2.2,USB 3.0, USB 2.0, PCI-express 3.0 and 2.0, Ethernet, SPI, AMBA (AHB, APB, & AXI), SM Bus, OCP, SAS, SATA and Fiber Channel.
To provide robust verification for many Interface protocol based designs that reduces design time, design risk, and costs for verification. PerfectVIPs has several Verification-IPs; which ships with Compliance Test suite based on protocol specification and comprehensive testcases which enables robust and easy verification.
PerfectVIPs Verification IP components:
• Bus Functional Models
• Compliance and comprehensive test suite
• Interface Inspector
• Intelligent Protocol Checker and Monitor
- The VIP interface Inspector provides- cheking capability and generates following reports;
· Protocol Compliance report
· Features Covered report
· Errors exercised report
•Powerful Error Injection API
•Automatic and User Configurable Timing & Feature Parameters
Advantages of PerfectVIPs Verification IP
* System Verilog source code for BFMs and test-cases
* Complete set of fully functional BFM and test-benches
* Tests are self-checking, portable, and reusable on most types of designs
* Also support for Ncsim , VCS and Modelsim simulator.
* Support for System C, System-Verilog, VHDL, Verilog, C & C++, e and Vera.
PerfectVIPs Verification-IP portfolio includes ONFi 2.2,USB 3.0, USB 2.0, PCI-express 3.0 and 2.0, Ethernet, SPI, AMBA (AHB, APB, & AXI), SM Bus, OCP, SAS, SATA and Fiber Channel.
To provide robust verification for many Interface protocol based designs that reduces design time, design risk, and costs for verification. PerfectVIPs has several Verification-IPs; which ships with Compliance Test suite based on protocol specification and comprehensive testcases which enables robust and easy verification.
PerfectVIPs Verification IP components:
• Bus Functional Models
• Compliance and comprehensive test suite
• Interface Inspector
• Intelligent Protocol Checker and Monitor
- The VIP interface Inspector provides- cheking capability and generates following reports;
· Protocol Compliance report
· Features Covered report
· Errors exercised report
•Powerful Error Injection API
•Automatic and User Configurable Timing & Feature Parameters
Advantages of PerfectVIPs Verification IP
* System Verilog source code for BFMs and test-cases
* Complete set of fully functional BFM and test-benches
* Tests are self-checking, portable, and reusable on most types of designs
* Also support for Ncsim , VCS and Modelsim simulator.
* Support for System C, System-Verilog, VHDL, Verilog, C & C++, e and Vera.
Microelectronics Innovation Collaborative Centre licenses Alchimer’s wet deposition products for MEMS 3D research
MASSY, FRANCE & BROMONT, CANADA: Alchimer, a leading provider of nanometric deposition technology for through-silicon vias (TSVs), semiconductor interconnects, MEMS and other electronic applications, announced that the Centre de Collaboration MiQro Innovation/MiQro Innovation Collaborative Centre (C2MI) has licensed its suite of products.
The C2MI, which includes a state-of-the-art MEMS facility, was launched in 2009 by Université of Sherbrooke in Bromont Technoparc, Quebec, Canada. The center’s 200mm MEMS and 3D wafer-level-processing (WLP) equipment, which is among the most advanced in the world, will enable its members to test a variety of materials for MEMS production.
Alchimer’s suite of products and its Electrografting (eG) technology will support the center’s 3D MEMS programs. Electrografting is Alchimer’s breakthrough electrochemical process that enables the growth of extremely high-quality polymer and metal thin films.
“The MiQro Innovation Collaborative Centre and its members are at the leading edge of 3D integration in MEMS,” said Alchimer CEO Steve Lerner. “They are pushing the design rules in this space, and we are excited that they have chosen our products to support this work. This is another solid technical validation for Alchimer’s products and wet deposition technology.”
“Alchimer’s Electrografting technology dramatically increases yields in MEMS, 3D-IC and on-chip interconnects, and provides strong support for work in advancing the technology for 3D MEMS manufacturing with a cost-effective approach,” said Luc Ouellet, vice-president of R&D at Teledyne DALSA Semiconductor, the number-one pure-play MEMS foundry in the world.
The C2MI, which includes a state-of-the-art MEMS facility, was launched in 2009 by Université of Sherbrooke in Bromont Technoparc, Quebec, Canada. The center’s 200mm MEMS and 3D wafer-level-processing (WLP) equipment, which is among the most advanced in the world, will enable its members to test a variety of materials for MEMS production.
Alchimer’s suite of products and its Electrografting (eG) technology will support the center’s 3D MEMS programs. Electrografting is Alchimer’s breakthrough electrochemical process that enables the growth of extremely high-quality polymer and metal thin films.
“The MiQro Innovation Collaborative Centre and its members are at the leading edge of 3D integration in MEMS,” said Alchimer CEO Steve Lerner. “They are pushing the design rules in this space, and we are excited that they have chosen our products to support this work. This is another solid technical validation for Alchimer’s products and wet deposition technology.”
“Alchimer’s Electrografting technology dramatically increases yields in MEMS, 3D-IC and on-chip interconnects, and provides strong support for work in advancing the technology for 3D MEMS manufacturing with a cost-effective approach,” said Luc Ouellet, vice-president of R&D at Teledyne DALSA Semiconductor, the number-one pure-play MEMS foundry in the world.
Wind River releases 64-bit VxWorks RTOS
embedded world 2011, NUREMBERG, GERMANY: Wind River, a world leader in embedded and mobile software, has introduced an updated version of VxWorks, the embedded industry’s leading real-time operating system (RTOS). The latest VxWorks is one of the first commercial RTOSes delivering 64-bit computing support and includes improved multi-core processing support.
“The embedded market is facing skyrocketing demands for processing performance as systems become ever more complex and increasingly connected. The sheer amount of compute power, memory and data required for embedded applications continues to climb exponentially,” said Warren Kurisu, vice president of VxWorks product management at Wind River. “By providing 64-bit computing capability, Wind River addresses the high-performance needs of our embedded market. VxWorks continues to be an innovation leader that delivers vital solutions to our customers.”
VxWorks now delivers 64-bit support both in data and code execution that was once the sole domain of supercomputer and server markets. For telecommunications network infrastructure equipment manufacturers, 64-bit computing is critical in keeping up with the stresses of increasingly exploding data.
Other vertical industries are also demanding 64-bit support, for example, for industrial and medical applications such as high-definition imagery, and aerospace and defense applications such as highly complex radar, sonar and sensors. Companies already running VxWorks can rapidly transition to 64-bit computing with ease.
The latest VxWorks delivers greater multi-core processing performance in both symmetric multiprocessing (SMP) and asymmetrical multiprocessing (AMP) configurations. VxWorks platforms now bundle the Intel optimizing C++ compiler and the Intel Performance Primitives (IPP) library for Intel architectures only.
This version of VxWorks now includes support for the ARM Cortex A9 processor, with a multi-core SMP and ARM Thumb-2 instruction set. This VxWorks release also provides enhanced networking capabilities, including new security features and increased Internet Engineering Task Force Request for Comments (IETF RFC) support. Additionally, software development on VxWorks continues to be enabled by the Wind River Workbench development tools suite.
“The embedded market is facing skyrocketing demands for processing performance as systems become ever more complex and increasingly connected. The sheer amount of compute power, memory and data required for embedded applications continues to climb exponentially,” said Warren Kurisu, vice president of VxWorks product management at Wind River. “By providing 64-bit computing capability, Wind River addresses the high-performance needs of our embedded market. VxWorks continues to be an innovation leader that delivers vital solutions to our customers.”
VxWorks now delivers 64-bit support both in data and code execution that was once the sole domain of supercomputer and server markets. For telecommunications network infrastructure equipment manufacturers, 64-bit computing is critical in keeping up with the stresses of increasingly exploding data.
Other vertical industries are also demanding 64-bit support, for example, for industrial and medical applications such as high-definition imagery, and aerospace and defense applications such as highly complex radar, sonar and sensors. Companies already running VxWorks can rapidly transition to 64-bit computing with ease.
The latest VxWorks delivers greater multi-core processing performance in both symmetric multiprocessing (SMP) and asymmetrical multiprocessing (AMP) configurations. VxWorks platforms now bundle the Intel optimizing C++ compiler and the Intel Performance Primitives (IPP) library for Intel architectures only.
This version of VxWorks now includes support for the ARM Cortex A9 processor, with a multi-core SMP and ARM Thumb-2 instruction set. This VxWorks release also provides enhanced networking capabilities, including new security features and increased Internet Engineering Task Force Request for Comments (IETF RFC) support. Additionally, software development on VxWorks continues to be enabled by the Wind River Workbench development tools suite.
Wind River broadens safety certification for VxWorks Cert
embedded world 2011, NUREMBERG, GERMANY: Wind River, a world leader in embedded and mobile software, has announced updated certification evidence for industrial safety standard IEC 61508 for its VxWorks Cert platform.
This certification evidence, along with updated certification evidence for avionics safety standards RTCA DO-178B and EUROCAE ED-12B, is now available for the first time on Intel Architecture and for PowerPC e300 and e600 architectures. Additionally, VxWorks Cert now provides a board support package (BSP) for the Kontron 6U CompactPCI processor board CP6016, an Intel Core 2 platform. This pre-integrated commercial off-the-shelf (COTS) hardware and software combination can accelerate customer certification processes, decrease development costs and speed time-to-market.
Wind River’s IEC 61508 SIL3 (safety integrity level) certificate is provided by TÜV SÜD, an internationally recognized safety certification authority. The IEC 61508 industrial safety standard forms a basis for many derived standards, including the IEC 61513 nuclear standard and the CENELEC EN50128 railway standard.
Proof of certification for the real-time operating system (RTOS) helps to accelerate the required certification work for the creation of a certified, safe system in markets where safety and reliability are imperative. VxWorks was first certified for IEC 61508 SIL3 in April 2004. Moreover, Wind River’s partnership with Kontron to create a COTS BSP directly addresses increased demand for a pre-integrated package that will help accomplish final system certification faster in multiple market segments, including avionics, industrial automation and transportation systems.
“The level of certification evidence required by government and regulatory bodies is becoming more stringent, creating the potential for product delays,” said Warren Kurisu, vice president of product management for VxWorks at Wind River. “Maintaining and updating our VxWorks Cert product is imperative to supporting our key COTS hardware partners. These latest advancements of achieving both the IEC 61508 certificate and developing a COTS BSP with Kontron demonstrates our commitment to our customers and to our partner ecosystem to provide proven COTS platforms that can reduce project delays associated with complying with system certification standards.”
“Wind River has the product maturity and track record in safety critical systems and can provide assurance that the software meets multiple strict safety certification requirements,” said Norbert Hauser, vice president of marketing for Kontron. “Kontron’s 6U CompactPCI processor board CP6016 in combination with Wind River’s VxWorks Cert Platform helps customers accelerate certification requirements for their safe system, and ultimately, get to market faster in a highly competitive market.”
Updated full certification material for VxWorks Cert is available now to customers worldwide on Intel Core 2 Duo, PowerPC e300 and PowerPC e600. This certification material is complemented with Wind River’s proven consulting services team for certification projects. This team helps customers fully leverage the Wind River certification COTS package on various customer-specific configurations, derived standards and additional architectures.
This certification evidence, along with updated certification evidence for avionics safety standards RTCA DO-178B and EUROCAE ED-12B, is now available for the first time on Intel Architecture and for PowerPC e300 and e600 architectures. Additionally, VxWorks Cert now provides a board support package (BSP) for the Kontron 6U CompactPCI processor board CP6016, an Intel Core 2 platform. This pre-integrated commercial off-the-shelf (COTS) hardware and software combination can accelerate customer certification processes, decrease development costs and speed time-to-market.
Wind River’s IEC 61508 SIL3 (safety integrity level) certificate is provided by TÜV SÜD, an internationally recognized safety certification authority. The IEC 61508 industrial safety standard forms a basis for many derived standards, including the IEC 61513 nuclear standard and the CENELEC EN50128 railway standard.
Proof of certification for the real-time operating system (RTOS) helps to accelerate the required certification work for the creation of a certified, safe system in markets where safety and reliability are imperative. VxWorks was first certified for IEC 61508 SIL3 in April 2004. Moreover, Wind River’s partnership with Kontron to create a COTS BSP directly addresses increased demand for a pre-integrated package that will help accomplish final system certification faster in multiple market segments, including avionics, industrial automation and transportation systems.
“The level of certification evidence required by government and regulatory bodies is becoming more stringent, creating the potential for product delays,” said Warren Kurisu, vice president of product management for VxWorks at Wind River. “Maintaining and updating our VxWorks Cert product is imperative to supporting our key COTS hardware partners. These latest advancements of achieving both the IEC 61508 certificate and developing a COTS BSP with Kontron demonstrates our commitment to our customers and to our partner ecosystem to provide proven COTS platforms that can reduce project delays associated with complying with system certification standards.”
“Wind River has the product maturity and track record in safety critical systems and can provide assurance that the software meets multiple strict safety certification requirements,” said Norbert Hauser, vice president of marketing for Kontron. “Kontron’s 6U CompactPCI processor board CP6016 in combination with Wind River’s VxWorks Cert Platform helps customers accelerate certification requirements for their safe system, and ultimately, get to market faster in a highly competitive market.”
Updated full certification material for VxWorks Cert is available now to customers worldwide on Intel Core 2 Duo, PowerPC e300 and PowerPC e600. This certification material is complemented with Wind River’s proven consulting services team for certification projects. This team helps customers fully leverage the Wind River certification COTS package on various customer-specific configurations, derived standards and additional architectures.
Freescale intros single-phase electricity meter reference design based on Kinetis MCU
embedded world 2011, AUSTIN, USA: Freescale Semiconductor has announced a smart meter reference design that will be demonstrated during embedded world, March 1-3, 2011 in Nuremberg, Germany. The reference design, which will be featured as part of Freescale’s Smart Energy Wall display, provides a high-performance solution for power measurement in single-phase, two-wire installations targeted at the residential metering market.
According to a study prepared by Dr. Ahmad Faruqui of The Brattle Group for the Edison Foundation’s Institute for Electric Efficiency (IEE), this technology could save energy consumers more than a billion dollars annually for a population base the size of the US or Europe. With the growing consumption of energy worldwide, particularly in the residential market, utility providers need increasingly accurate and cost-effective energy metering solutions.
Freescale’s MK30X single-phase electricity meter reference design addresses these accuracy and cost needs by providing efficient analog-to-digital converters (ADCs) combined with an embedded programmable gain amplifier (PGA) to increase the accuracy of energy measurement, along with a cost-effective shunt sensing circuit implementation and bill of materials (BOM).
The 32-bit Kinetis MK30X256 MCU at the heart of the MK30X reference design is based on the ARM Cortex-M4 core. This powerful core’s effective support of 32-bit math enables fast Fourier transform (FFT) based metering algorithms, which calculate metering quantities from elementary voltage and current harmonics. This calculation approach results in the precise accuracy of the reactive energy, as compared to other known metering algorithms.
The MK30X reference design includes a 128-bit unique identification and FlexMemory that provides every meter with an individual identifier and tamper detection. Firmware based on an MQX real-time operating system enables customers to design electricity meters based on their unique requirements and is well-suited for use in advanced markets.
“Our Kinetis line is the most scalable portfolio of ARM Cortex-M4 MCUs in the industry,” said Bruno Baylac, director and general manager of Freescale’s Metering, Medical and Connectivity Solutions business. “Our MK30X single-phase electricity meter reference design further demonstrates the versatility of the Kinetis line, as well as our commitment to providing accurate, cost-effective and customizable solutions for the smart energy market.”
Customization is available using the built-in LCD, which provides the standard metering values. The designer can choose any of the measured values by clicking on the device’s built-in buttons. The designer is also able to choose from several types of communication interfaces for remote collection of data. One option is connection to a ZigBee network via an I2C interface, meaning the meter can easily be enabled as part of a smart grid network. The meter is also able to connect outside of the home via SCI/SPI for last-mile communication.
According to a study prepared by Dr. Ahmad Faruqui of The Brattle Group for the Edison Foundation’s Institute for Electric Efficiency (IEE), this technology could save energy consumers more than a billion dollars annually for a population base the size of the US or Europe. With the growing consumption of energy worldwide, particularly in the residential market, utility providers need increasingly accurate and cost-effective energy metering solutions.
Freescale’s MK30X single-phase electricity meter reference design addresses these accuracy and cost needs by providing efficient analog-to-digital converters (ADCs) combined with an embedded programmable gain amplifier (PGA) to increase the accuracy of energy measurement, along with a cost-effective shunt sensing circuit implementation and bill of materials (BOM).
The 32-bit Kinetis MK30X256 MCU at the heart of the MK30X reference design is based on the ARM Cortex-M4 core. This powerful core’s effective support of 32-bit math enables fast Fourier transform (FFT) based metering algorithms, which calculate metering quantities from elementary voltage and current harmonics. This calculation approach results in the precise accuracy of the reactive energy, as compared to other known metering algorithms.
The MK30X reference design includes a 128-bit unique identification and FlexMemory that provides every meter with an individual identifier and tamper detection. Firmware based on an MQX real-time operating system enables customers to design electricity meters based on their unique requirements and is well-suited for use in advanced markets.
“Our Kinetis line is the most scalable portfolio of ARM Cortex-M4 MCUs in the industry,” said Bruno Baylac, director and general manager of Freescale’s Metering, Medical and Connectivity Solutions business. “Our MK30X single-phase electricity meter reference design further demonstrates the versatility of the Kinetis line, as well as our commitment to providing accurate, cost-effective and customizable solutions for the smart energy market.”
Customization is available using the built-in LCD, which provides the standard metering values. The designer can choose any of the measured values by clicking on the device’s built-in buttons. The designer is also able to choose from several types of communication interfaces for remote collection of data. One option is connection to a ZigBee network via an I2C interface, meaning the meter can easily be enabled as part of a smart grid network. The meter is also able to connect outside of the home via SCI/SPI for last-mile communication.
IR acquires CHiL Semiconductor
EL SEGUNDO, USA: International Rectifier Corp. (IR) announced that it has signed a definitive agreement to acquire privately held CHiL Semiconductor Corp. (CHiL) for $75 million in cash, subject to working capital adjustments.
The acquisition expands IR’s technology by adding a leading digital power management platform that improves energy efficiency in a wide variety of applications, including computing systems, graphics, servers and gaming.
CHiL uses patented digital techniques in combination with mixed signal technology to deliver high performance multi-phase power solutions that save energy. The open architecture approach to digital control, where customers can tailor power systems for cost and performance goals, enables significant board space and bill-of-materials reduction, integrating many analog features into the digital core of the technology.
“The addition of CHiL’s technology and expertise to our broad portfolio of industry leading products such as DirectFET, PowIRstage and SupIRBuck, offers IR’s customers a unique value proposition by providing a high performance, cost effective, complete end-to-end integrated solution,” stated Tim Phillips, VP and GM, Enterprise Power Business Unit of IR. “Digital power management is entering a rapid adoption phase and the addition of CHiL’s technology strengthens IR’s market position to capitalize on this growth opportunity.
“The acquisition is the next logical step after our successful strategic product relationship with CHiL during the past year and will augment IR’s talent base by adding an experienced digital power design and applications engineering team,” concluded Phillips.
“The increased focus on energy efficient products over the next decade is expected to drive an expanding use of digital power management in applications such as DC-DC converters, AC-DC converters, lighting, inverters and Class-D audio systems,” stated Vishwas Karve, VP, Strategy and Business Development of IR.
“The acquisition of CHiL expands IR’s presence immediately in the high performance computing and graphics segments, over the medium-term in the server, storage and notebook end markets and longer-term across the Company’s other vertical end market segments including Energy-Savings Products, Automotive Products and HiRel business units.”
“IR’s focus on power management solutions and energy efficiency make it an ideal partner for our customers and employees,” stated Ram Sudireddy, CEO of CHiL Semiconductor. “As digital power management continues to expand, the combined technology of IR and CHiL can create a higher performance and lower cost solution enabling end users to create more energy efficient solutions. To date, CHiL has secured a significant number of design-wins across a wide spectrum of graphics, high performance computing and server platforms that IR can help grow.”
The transaction is expected to close in the first calendar quarter of 2011. The acquisition, which initially adds approximately $3 million of additional operating expenses per quarter, is expected to be accretive to IR’s earnings per share in the company’s 2012 fiscal year.
The acquisition expands IR’s technology by adding a leading digital power management platform that improves energy efficiency in a wide variety of applications, including computing systems, graphics, servers and gaming.
CHiL uses patented digital techniques in combination with mixed signal technology to deliver high performance multi-phase power solutions that save energy. The open architecture approach to digital control, where customers can tailor power systems for cost and performance goals, enables significant board space and bill-of-materials reduction, integrating many analog features into the digital core of the technology.
“The addition of CHiL’s technology and expertise to our broad portfolio of industry leading products such as DirectFET, PowIRstage and SupIRBuck, offers IR’s customers a unique value proposition by providing a high performance, cost effective, complete end-to-end integrated solution,” stated Tim Phillips, VP and GM, Enterprise Power Business Unit of IR. “Digital power management is entering a rapid adoption phase and the addition of CHiL’s technology strengthens IR’s market position to capitalize on this growth opportunity.
“The acquisition is the next logical step after our successful strategic product relationship with CHiL during the past year and will augment IR’s talent base by adding an experienced digital power design and applications engineering team,” concluded Phillips.
“The increased focus on energy efficient products over the next decade is expected to drive an expanding use of digital power management in applications such as DC-DC converters, AC-DC converters, lighting, inverters and Class-D audio systems,” stated Vishwas Karve, VP, Strategy and Business Development of IR.
“The acquisition of CHiL expands IR’s presence immediately in the high performance computing and graphics segments, over the medium-term in the server, storage and notebook end markets and longer-term across the Company’s other vertical end market segments including Energy-Savings Products, Automotive Products and HiRel business units.”
“IR’s focus on power management solutions and energy efficiency make it an ideal partner for our customers and employees,” stated Ram Sudireddy, CEO of CHiL Semiconductor. “As digital power management continues to expand, the combined technology of IR and CHiL can create a higher performance and lower cost solution enabling end users to create more energy efficient solutions. To date, CHiL has secured a significant number of design-wins across a wide spectrum of graphics, high performance computing and server platforms that IR can help grow.”
The transaction is expected to close in the first calendar quarter of 2011. The acquisition, which initially adds approximately $3 million of additional operating expenses per quarter, is expected to be accretive to IR’s earnings per share in the company’s 2012 fiscal year.
MIPS signs license to distribute OEM version of Imperas OVP simulator
THAME, ENGLAND: Imperas, which through the Open Virtual Platforms (OVP) initiative has become the de facto source for instruction accurate processor modeling and simulation, announced that MIPS Technologies Inc. has licensed an OEM version of the OVPsim simulator to provide a fast, instruction accurate simulation product to its licensees.
The models for the MIPS processor cores support the full software view of the processor cores, including both the MIPS32 and microMIPS instruction sets as well as extensions to the instruction sets such as for floating point, DSP and multi-threading capabilities.
The functionality of these models, developed by Imperas, is verified by MIPS Technologies as part of the MIPS-Verified program, which Imperas has participated in since 2008. MIPS licensees will have access to the full range of OVP technology, enabling them to build peripheral models and full virtual platforms with OVP, and to integrate the models into SystemC/TLM-2.0 environments.
“We chose Imperas and the Open Virtual Platforms technology because of the quality of the models and technology,” said Art Swift, vice president of marketing and business development, MIPS Technologies. “We see the positive momentum and leadership position of OVP, and believe this is the best technology for instruction accurate simulation of our processor core models. MIPS Technologies has delivered the first OVP models to lead customers, and we look forward to expanding this program in the future.”
All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP models of the complete families of the MIPS32 and microMIPS processors, both single and multi-core are currently available for download from www.OVPworld.org.
Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP models. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.
“We have been working with MIPS Technologies for over 2 years as part of the MIPS-Verified program,” said Simon Davidmann, president and CEO, Imperas, and founding director of the OVP initiative. “During these last two years, we’ve seen OVP grow from its inception to being the industry’s leading independent supplier of instruction accurate models of processor cores. Having these two parallel efforts, the broad acceptance of OVP and our cooperative relationship with MIPS Technologies, come together to provide technology to MIPS licensees building embedded systems is a proud and exciting milestone for us.”
The models for the MIPS processor cores support the full software view of the processor cores, including both the MIPS32 and microMIPS instruction sets as well as extensions to the instruction sets such as for floating point, DSP and multi-threading capabilities.
The functionality of these models, developed by Imperas, is verified by MIPS Technologies as part of the MIPS-Verified program, which Imperas has participated in since 2008. MIPS licensees will have access to the full range of OVP technology, enabling them to build peripheral models and full virtual platforms with OVP, and to integrate the models into SystemC/TLM-2.0 environments.
“We chose Imperas and the Open Virtual Platforms technology because of the quality of the models and technology,” said Art Swift, vice president of marketing and business development, MIPS Technologies. “We see the positive momentum and leadership position of OVP, and believe this is the best technology for instruction accurate simulation of our processor core models. MIPS Technologies has delivered the first OVP models to lead customers, and we look forward to expanding this program in the future.”
All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP models of the complete families of the MIPS32 and microMIPS processors, both single and multi-core are currently available for download from www.OVPworld.org.
Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP models. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms such as OS and CPU-aware tracing, profiling and code analysis.
“We have been working with MIPS Technologies for over 2 years as part of the MIPS-Verified program,” said Simon Davidmann, president and CEO, Imperas, and founding director of the OVP initiative. “During these last two years, we’ve seen OVP grow from its inception to being the industry’s leading independent supplier of instruction accurate models of processor cores. Having these two parallel efforts, the broad acceptance of OVP and our cooperative relationship with MIPS Technologies, come together to provide technology to MIPS licensees building embedded systems is a proud and exciting milestone for us.”
Sunday, February 27, 2011
NEC launches world’s first contactless hybrid finger scanner
Pulse 2011, TOKYO, JAPAN: NEC Corp. announced the commercial launch of the world’s first device to simultaneously acquire fingerprint and finger vein characteristics without physical contact. Worldwide shipment of the “HS100-10 Contactless Hybrid Finger Scanner” (HS100-10) is scheduled to begin in May 2011.
The HS100-10’s simultaneous acquisition of both fingerprint and finger vein information makes it particularly difficult for impostors to deceive the authentication system using it. Moreover, the system’s contactless sensor is robust against the characteristics of fingers that are exceedingly dry or moist with exceptional accuracy, which is difficult for conventional contact-based fingerprint authentication devices.
Furthermore, the HS100-10’s USB interface allows users to connect with a PC in order to logon to its operating system or unlock its screensaver in both a stand-alone environment and an ActiveDirectory environment.
The HS100-10 is also compatible with major access management software, including IBM’s “Tivoli Access Manager for Enterprise Single Sign-On” and Novell’s “Novell SecureLogin.” This combination of support for ID and access management with biometric data significantly reduces user concerns regarding the proliferation of user IDs and passwords.
NEC holds the No.1 position in a number of fingerprint and face recognition fields based on accuracy evaluations carried out by the National Institute of Standards and Technology (NIST). Moreover, NEC’s possession of the world’s highest level original recognition algorithm is supported by the company’s diverse range of customers who utilize NEC products. The HS100-10 was developed utilizing these business-proven technologies and know-how.
Looking forward, NEC will provide the “Hybrid Finger Authentication Development Library” in order for the HS100-10 to be used with a broad range of business packages and user applications. Future, development plans include a steady rollout of solutions linked with business applications such as electronic medical records system.
Currently, there is an increasing demand for more stringent management of personal authentication and internal controls geared for business and government. Under these conditions, fingerprint authentication is a highly accurate and secure technique that is already used for a wide variety of purposes. When used in combination with NEC’s originally developed vein authentication advancements, these biometric authentication technologies are a formidable defense against identity theft.
NEC will continue to promote the development and sales of products and services that capitalize on advanced biometric authentication technologies as part of its ongoing contributions to a safer, more secure society.
The HS100-10’s simultaneous acquisition of both fingerprint and finger vein information makes it particularly difficult for impostors to deceive the authentication system using it. Moreover, the system’s contactless sensor is robust against the characteristics of fingers that are exceedingly dry or moist with exceptional accuracy, which is difficult for conventional contact-based fingerprint authentication devices.
Furthermore, the HS100-10’s USB interface allows users to connect with a PC in order to logon to its operating system or unlock its screensaver in both a stand-alone environment and an ActiveDirectory environment.
The HS100-10 is also compatible with major access management software, including IBM’s “Tivoli Access Manager for Enterprise Single Sign-On” and Novell’s “Novell SecureLogin.” This combination of support for ID and access management with biometric data significantly reduces user concerns regarding the proliferation of user IDs and passwords.
NEC holds the No.1 position in a number of fingerprint and face recognition fields based on accuracy evaluations carried out by the National Institute of Standards and Technology (NIST). Moreover, NEC’s possession of the world’s highest level original recognition algorithm is supported by the company’s diverse range of customers who utilize NEC products. The HS100-10 was developed utilizing these business-proven technologies and know-how.
Looking forward, NEC will provide the “Hybrid Finger Authentication Development Library” in order for the HS100-10 to be used with a broad range of business packages and user applications. Future, development plans include a steady rollout of solutions linked with business applications such as electronic medical records system.
Currently, there is an increasing demand for more stringent management of personal authentication and internal controls geared for business and government. Under these conditions, fingerprint authentication is a highly accurate and secure technique that is already used for a wide variety of purposes. When used in combination with NEC’s originally developed vein authentication advancements, these biometric authentication technologies are a formidable defense against identity theft.
NEC will continue to promote the development and sales of products and services that capitalize on advanced biometric authentication technologies as part of its ongoing contributions to a safer, more secure society.
TI and MIT develop a 0.6 volt DSP in 28-nanometer process
BANGALORE, INDIA: Texas Instruments Inc. (TI) and the Massachusetts Institute of Technology (MIT) recently presented a joint research paper detailing design methodologies for a 28-nanometer (nm) mobile applications processor at the 2011 International Solid-State Circuits Conference (ISSCC).
The paper—“A 28nm 0.6V Low Power Digital Signal Processor (DSP) for Mobile Applications”—demonstrates that a DSP is capable of scaling from high-performance mode at 1.0 volts down to an ultra-low power (ULP) mode at 0.6 volts (V). This DSP is one of the first system-level, low voltage, 28nm designs for the mobile device market, demonstrating TI’s continued commitment to enabling lower power and extended battery life in mobile devices running advanced applications.
“As the multimedia and computing capabilities of TI’s OMAP platform-based smartphones, tablets and other mobile devices increase, there is a continually expanding gap between performance demands and battery capacity,” said Gordon Gammie, Distinguished Member of the Technical Staff at TI and ISSCC presenter. “TI believes that 28nm process technology advancements, developed in tandem with TI and MIT’s low power circuit and methodology collaboration, gives us the right knowledge base to successfully meet the next-generation processing demands within the future mobile power envelope.”
Key findings
* High performance and Ultra-Low Voltage (ULV) designs present several challenges. Two of the most prominent are low-voltage functionality and timing closure in the face of process variations without sacrificing high-voltage performance at nominal voltage. To address these challenges, TI and MIT successfully developed these two key methodologies:
Ultra-low voltage circuits: At low voltages in deep submicron process nodes, within-die random variation in transistor threshold voltage can cause circuits to have functional failures. A standard cell library and custom low-voltage memory using novel ULV design methodologies are developed to be robust at 0.6V.
Statistical Static Timing Analysis (SSTA) at low voltage: The delay distribution of standard cells at low voltages is no longer a Gaussian random variable. Traditional SSTA tools based on a Gaussian distribution can suffer from 10-70 percent underestimation of delay at 0.6V. A newly developed SSTA technique has been shown to improve the accuracy of design timing at ULV to less than 8 percent. The ability to accurately analyze low-voltage timing avoids excessive design margins and minimizes impact to area and high-voltage performance.
“The design of a low-voltage processor in 28nm requires a system-level approach – from optimizing the circuit styles and memories to the development of a custom low-voltage timing flow,” said Anantha Chandrakasan, MIT professor and pioneer in the area of low-power design. “This chip demonstrates an aggressive low-power methodology to ensure robust low-voltage and ultra-low-power operation for a smartphone application processor.”
TI’s 0.6 V ULP DSP presented in this paper was designed by a team of MIT students and TI engineers, and is an extension of a long-standing joint relationship on low power and ultra-low power research.
“This is an excellent example of the results that come from a long and fruitful collaboration between a university and corporation such as MIT and Texas Instruments,” said Gene Frantz, Principal Fellow at TI. “The students benefit by demonstrating their innovations on complex, DSPs with several million transistors made in state-of-the-art CMOS. TI and its customers benefit from early access to the students’ innovations.”
The paper—“A 28nm 0.6V Low Power Digital Signal Processor (DSP) for Mobile Applications”—demonstrates that a DSP is capable of scaling from high-performance mode at 1.0 volts down to an ultra-low power (ULP) mode at 0.6 volts (V). This DSP is one of the first system-level, low voltage, 28nm designs for the mobile device market, demonstrating TI’s continued commitment to enabling lower power and extended battery life in mobile devices running advanced applications.
“As the multimedia and computing capabilities of TI’s OMAP platform-based smartphones, tablets and other mobile devices increase, there is a continually expanding gap between performance demands and battery capacity,” said Gordon Gammie, Distinguished Member of the Technical Staff at TI and ISSCC presenter. “TI believes that 28nm process technology advancements, developed in tandem with TI and MIT’s low power circuit and methodology collaboration, gives us the right knowledge base to successfully meet the next-generation processing demands within the future mobile power envelope.”
Key findings
* High performance and Ultra-Low Voltage (ULV) designs present several challenges. Two of the most prominent are low-voltage functionality and timing closure in the face of process variations without sacrificing high-voltage performance at nominal voltage. To address these challenges, TI and MIT successfully developed these two key methodologies:
Ultra-low voltage circuits: At low voltages in deep submicron process nodes, within-die random variation in transistor threshold voltage can cause circuits to have functional failures. A standard cell library and custom low-voltage memory using novel ULV design methodologies are developed to be robust at 0.6V.
Statistical Static Timing Analysis (SSTA) at low voltage: The delay distribution of standard cells at low voltages is no longer a Gaussian random variable. Traditional SSTA tools based on a Gaussian distribution can suffer from 10-70 percent underestimation of delay at 0.6V. A newly developed SSTA technique has been shown to improve the accuracy of design timing at ULV to less than 8 percent. The ability to accurately analyze low-voltage timing avoids excessive design margins and minimizes impact to area and high-voltage performance.
“The design of a low-voltage processor in 28nm requires a system-level approach – from optimizing the circuit styles and memories to the development of a custom low-voltage timing flow,” said Anantha Chandrakasan, MIT professor and pioneer in the area of low-power design. “This chip demonstrates an aggressive low-power methodology to ensure robust low-voltage and ultra-low-power operation for a smartphone application processor.”
TI’s 0.6 V ULP DSP presented in this paper was designed by a team of MIT students and TI engineers, and is an extension of a long-standing joint relationship on low power and ultra-low power research.
“This is an excellent example of the results that come from a long and fruitful collaboration between a university and corporation such as MIT and Texas Instruments,” said Gene Frantz, Principal Fellow at TI. “The students benefit by demonstrating their innovations on complex, DSPs with several million transistors made in state-of-the-art CMOS. TI and its customers benefit from early access to the students’ innovations.”
Saturday, February 26, 2011
XOOM sports fast processor, advanced touch screen controller
EL SEGUNDO, USA: The IHS iSuppli team of teardown experts has obtained and opened up a brand new Motorola Inc. XOOM wireless 3G tablet—model MZ600—running Google Android 3.0 on Verizon Wireless’ CDMA network.
The 10.1-inch display, 1.6-pound tablet closely approximates the Apple Inc. iPad’s dimensions but outdoes its year-old forerunner by including both a 2-megapixel front-facing camera, and a 5-megapixel auto focus primary camera.
Unlike the iPad, the XOOM now comes in only one configuration, with 32GB of NAND storage. However, the XOOM makes up for this lack of variety with its powerful dual-core Nvidia Corp. Tegra 2 apps processor, ample 1GB synchronous dynamic random access memory (SDRAM) and loads of extra sensors.
While the Apple iPad incorporated a single-core ARM processor, the Motorola XOOM ups the ante with a dual-core Nvidia Tegra 2 solution. By using a dual-core design, the XOOM and can run processes and software much faster. The XOOM also includes nearly four times as much SDRAM for code storage that Apple’s A4 microprocessor employed, further boosting performance.
The IHS iSuppli teardown team discovered this exact chip last year in an Android-based Toshiba Smartbook (AC100). The Tegra 2 provides very competitive performance relative to traditional microprocessors found in netbook PCs, platforms that compete with media tablets.
The Motorola XOOM is marketed to consumers as a device that is upgradable to 4G free of charge. The IHS iSuppli teardown reveals why XOOM owners must surrender their product back to the factory for a physical upgrade to 4G networking. There were no 4G components found in the XOOM tablet aside from a dummy miniPCIe card—an obvious placeholder for the future LTE upgrade. However, Motorola did provide two MIMO antennas and a SIM card slot in preparation for the LTE upgrade.
The Motorola Xoom uses the Atmel mXT1386 touch screen controller, a new 32-bit device capable of registering up to 16 discrete touch points. While the IHS iSuppli Teardown Analysis Team has identified single-chip Atmel touch screen controllers in the past in Android smart phones, this solution contains a whopping four-chip solution from Atmel.
The Motorola XOOM seems to be pushing the bounds for integrating a large number of sensors in a tablet. Besides the more mundane CMOS image camera sensors, there are a host of other sensors. These include an electronic compass from AKM Semiconductor, a 3-axis accelerometer from Kionix, a 3-axis gyroscope from STMicroelectronics and a pressure monitor from Bosch Sensortec.
Why did Motorola include a barometer in a tablet? According to IHS microelectromechanical sensor expert Jérémie Bouchaud, this pressure sensor works in conjunction with the global positioning system (GPS) for indoor navigation applications.
Source: IHS iSuppli, USA
The 10.1-inch display, 1.6-pound tablet closely approximates the Apple Inc. iPad’s dimensions but outdoes its year-old forerunner by including both a 2-megapixel front-facing camera, and a 5-megapixel auto focus primary camera.
Unlike the iPad, the XOOM now comes in only one configuration, with 32GB of NAND storage. However, the XOOM makes up for this lack of variety with its powerful dual-core Nvidia Corp. Tegra 2 apps processor, ample 1GB synchronous dynamic random access memory (SDRAM) and loads of extra sensors.
While the Apple iPad incorporated a single-core ARM processor, the Motorola XOOM ups the ante with a dual-core Nvidia Tegra 2 solution. By using a dual-core design, the XOOM and can run processes and software much faster. The XOOM also includes nearly four times as much SDRAM for code storage that Apple’s A4 microprocessor employed, further boosting performance.
The IHS iSuppli teardown team discovered this exact chip last year in an Android-based Toshiba Smartbook (AC100). The Tegra 2 provides very competitive performance relative to traditional microprocessors found in netbook PCs, platforms that compete with media tablets.
The Motorola XOOM is marketed to consumers as a device that is upgradable to 4G free of charge. The IHS iSuppli teardown reveals why XOOM owners must surrender their product back to the factory for a physical upgrade to 4G networking. There were no 4G components found in the XOOM tablet aside from a dummy miniPCIe card—an obvious placeholder for the future LTE upgrade. However, Motorola did provide two MIMO antennas and a SIM card slot in preparation for the LTE upgrade.
The Motorola Xoom uses the Atmel mXT1386 touch screen controller, a new 32-bit device capable of registering up to 16 discrete touch points. While the IHS iSuppli Teardown Analysis Team has identified single-chip Atmel touch screen controllers in the past in Android smart phones, this solution contains a whopping four-chip solution from Atmel.
The Motorola XOOM seems to be pushing the bounds for integrating a large number of sensors in a tablet. Besides the more mundane CMOS image camera sensors, there are a host of other sensors. These include an electronic compass from AKM Semiconductor, a 3-axis accelerometer from Kionix, a 3-axis gyroscope from STMicroelectronics and a pressure monitor from Bosch Sensortec.
Why did Motorola include a barometer in a tablet? According to IHS microelectromechanical sensor expert Jérémie Bouchaud, this pressure sensor works in conjunction with the global positioning system (GPS) for indoor navigation applications.
Source: IHS iSuppli, USA
IMS CHIPS standardizes on Cadence silicon realization product line for advanced gate array design
FELDKIRCHEN, GERMANY: Cadence Design Systems Inc., a leader in global electronic design innovation, announced that IMS CHIPS has adopted Cadence Silicon Realization technologies for its special mixed-signal gate array technology.
IMS CHIPS plans to deploy Cadence end-to-end Virtuoso custom and Encounter digital technologies for its commercial research business in areas such as advanced silicon technology, customer-specific circuits, nanopatterning and image sensor technology.
IMS CHIPS supports small- and medium-sized companies in Germany with the development, manufacturing and application of microelectronic systems. At the same time, the Stuttgart-based institute is a respected research partner for innovative technologies and collaborates with international leading semiconductor companies and suppliers.
An important consideration for IMS CHIPS was to establish and build an industry-leading, end-to-end design flow from a single source that would provide compatibility with its customers and foundries and could offer a comprehensive approach from initial design development to simulation, all the way to tape-out.
Another important factor in the decision to standardize on Cadence Silicon Realization technologies was the ability to address complex routing requirements using only two layers of interconnects - a challenge that most existing and new routers on the market are not able to handle.
“We teamed with Cadence because there is no comparable product on the market that offered us a similar solution to tackle our complex mixed-signal gate array technologies,” said Prof. Dr. Joachim Burghartz, director and chairman of the board of directors at IMS CHIPS. “Another important criterion to us was to use a proven solution with a long track record of silicon success, to help us avoid risk and time-consuming iterations. The excellent local support we received from Cadence's channel partner, FlowCAD, was a strong factor in our decision as well.”
The Cadence approach to mixed-signal design leverages an integrated mixed-signal methodology in which early design planning; front-end design, functional verification, physical implementation, and packaging are shared responsibilities between analog and digital teams.
This is the driving force and unique advantage of Cadence Silicon Realization - providing a more deterministic path to silicon by driving pervasive design intent, abstraction, and convergence across the entire flow. IMS CHIPS will benefit from the interoperability between the Virtuoso and Encounter technologies, helping them to accelerate their development time. For IMS CHIPS with its focus on small- and medium-sized companies, this is critical to more effective business planning.
“Advanced customers such as IMS CHIPS need an end-to-end design flow that is mature and capable of handling complex requirements for complex chip design,” said David Desharnais, group director of product marketing at Cadence. With Cadence Silicon Realization’s proven mixed-signal flow, IMS CHIPS was able to replace their previous commercial point tools with a complete solution that perfectly addressed their needs.
IMS CHIPS plans to deploy Cadence end-to-end Virtuoso custom and Encounter digital technologies for its commercial research business in areas such as advanced silicon technology, customer-specific circuits, nanopatterning and image sensor technology.
IMS CHIPS supports small- and medium-sized companies in Germany with the development, manufacturing and application of microelectronic systems. At the same time, the Stuttgart-based institute is a respected research partner for innovative technologies and collaborates with international leading semiconductor companies and suppliers.
An important consideration for IMS CHIPS was to establish and build an industry-leading, end-to-end design flow from a single source that would provide compatibility with its customers and foundries and could offer a comprehensive approach from initial design development to simulation, all the way to tape-out.
Another important factor in the decision to standardize on Cadence Silicon Realization technologies was the ability to address complex routing requirements using only two layers of interconnects - a challenge that most existing and new routers on the market are not able to handle.
“We teamed with Cadence because there is no comparable product on the market that offered us a similar solution to tackle our complex mixed-signal gate array technologies,” said Prof. Dr. Joachim Burghartz, director and chairman of the board of directors at IMS CHIPS. “Another important criterion to us was to use a proven solution with a long track record of silicon success, to help us avoid risk and time-consuming iterations. The excellent local support we received from Cadence's channel partner, FlowCAD, was a strong factor in our decision as well.”
The Cadence approach to mixed-signal design leverages an integrated mixed-signal methodology in which early design planning; front-end design, functional verification, physical implementation, and packaging are shared responsibilities between analog and digital teams.
This is the driving force and unique advantage of Cadence Silicon Realization - providing a more deterministic path to silicon by driving pervasive design intent, abstraction, and convergence across the entire flow. IMS CHIPS will benefit from the interoperability between the Virtuoso and Encounter technologies, helping them to accelerate their development time. For IMS CHIPS with its focus on small- and medium-sized companies, this is critical to more effective business planning.
“Advanced customers such as IMS CHIPS need an end-to-end design flow that is mature and capable of handling complex requirements for complex chip design,” said David Desharnais, group director of product marketing at Cadence. With Cadence Silicon Realization’s proven mixed-signal flow, IMS CHIPS was able to replace their previous commercial point tools with a complete solution that perfectly addressed their needs.
Semtech adopts ProCM GreenHub compliance platform to streamline customer compliance process
CAMARILLO, USA: Semtech Corp., a leading supplier of analog and mixed-signal semiconductors, and ProCM, a leading supplier of compliance solutions for the electronics industry, announced the production launch of ProCM’s GreenHub Compliance Management System (CMS) to manage the environmental compliance of Semtech’s products and suppliers.
“We have been working with the ProCM team and our supply base to establish baseline compliance data within GreenHub,” states Mike Wilson, CTO and senior VP, Quality and Reliability for Semtech. “Now it will be much easier for us to manage ongoing supplier compliance and provide product compliance data to our customers while reducing the risk of non-compliance. Additionally, the compliance experts at ProCM will keep us in step with regulatory and standards changes as they occur, reducing the need for dedicated internal resources.”
The GreenHub CMS is a centralized database and management system established to provide the semiconductor industry with an efficient and cost effective solution for managing supplier and product compliance information.
Semtech has selected ProCM’s GreenHub as the primary system to support their RoHS and REACH compliance data. It now enables Semtech to aggregate materials compliance data, including third-party analytical results, from raw materials and integrated circuit assembly subcontractors, as well as create industry standard IPC-1752 full material disclosure declarations for their customers.
“By establishing a centralized compliance system for the semiconductor industry, suppliers can support customer requirements in a much more effective manner,” states Richard Kubin, Vice President of Compliance Solutions at ProCM. “By also providing easy upload of product BOM data, our customers can efficiently support compliance reporting at a fraction of the cost of maintaining internal systems and processes. Further, we are committed to supporting our customers as new regulatory requirements, such as the reporting of Conflict Minerals, come into force.”
“We have been working with the ProCM team and our supply base to establish baseline compliance data within GreenHub,” states Mike Wilson, CTO and senior VP, Quality and Reliability for Semtech. “Now it will be much easier for us to manage ongoing supplier compliance and provide product compliance data to our customers while reducing the risk of non-compliance. Additionally, the compliance experts at ProCM will keep us in step with regulatory and standards changes as they occur, reducing the need for dedicated internal resources.”
The GreenHub CMS is a centralized database and management system established to provide the semiconductor industry with an efficient and cost effective solution for managing supplier and product compliance information.
Semtech has selected ProCM’s GreenHub as the primary system to support their RoHS and REACH compliance data. It now enables Semtech to aggregate materials compliance data, including third-party analytical results, from raw materials and integrated circuit assembly subcontractors, as well as create industry standard IPC-1752 full material disclosure declarations for their customers.
“By establishing a centralized compliance system for the semiconductor industry, suppliers can support customer requirements in a much more effective manner,” states Richard Kubin, Vice President of Compliance Solutions at ProCM. “By also providing easy upload of product BOM data, our customers can efficiently support compliance reporting at a fraction of the cost of maintaining internal systems and processes. Further, we are committed to supporting our customers as new regulatory requirements, such as the reporting of Conflict Minerals, come into force.”
Fujitsu announces Ginga solution on HD decoder family for Latin America DTT market
SINGAPORE: Fujitsu Semiconductor Asia Pte Ltd (FSAL) announced the adoption of a full Ginga software solution from TQTVD, a Brazilian company in the TOTVS group.
TOTVS will port its Ginga solution to a Fujitsu High Definition (HD) Decoder product family and promote it, together with Fujitsu, as a full system solution to the SBTVD market. The porting will include TOTVS’s ByYouTV (Ginga-NCL and Ginga-J), ByYouZapper and Sticker Center enabling highly competitive end products with best-in-class quality. This solution is fully compliant with the Brazilian standard for digital TV (SBTVD) and can be deployed in all countries that decided to adopt this standard.
With approximately 60 million households, Brazil represents the biggest potential for SBTVD in Latin America followed by Argentina with around 13 million households. The process for the deployment of Ginga in these two countries is the most advanced in the SBTVD world.
Miguel Estevez, strategic marketing manager, Home Entertainment Business Unit of Fujitsu Semiconductor, said: “Fujitsu is targeting the Set-Top Box (STB) and integrated digital television (iDTV) market in Latin America offering system solutions from low cost to high-end rounded up with low power consumption and high quality chip sets for HD Decoding and ISDB-T Demodulation. For these reasons a software solution was sort that presented a small foot print, reliability, stability and was market-proven enabling shortest time–to-market. TOTVS’s Ginga solution fits our expectations very well. I am confident that this is the start of a very promising partnership between both companies.”
“There are a number of key benefits that have motivated TOTVS to start a strategic partnership with Fujitsu for the SBTVD market. These include the very competitive cost of the bill of material (BOM) combined with high performance at low power consumption, as well as the successful history of Fujitsu in the ISDB-T domain as Japanese company and the quality aspects of the chip sets. Sticker Center is also going to become a key feature that will be promoted in combination with the Fujitsu HD Decoder family,” stated David Britto, Technology Strategy director at TOTVS.
An important milestone for both companies is to demonstrate TOTVS’s ByYouTV middleware running on Fujitsu HD Decoder MB86H610 at the CCBN2011 in Beijing from March 23rd-25th, 2011.
TOTVS will port its Ginga solution to a Fujitsu High Definition (HD) Decoder product family and promote it, together with Fujitsu, as a full system solution to the SBTVD market. The porting will include TOTVS’s ByYouTV (Ginga-NCL and Ginga-J), ByYouZapper and Sticker Center enabling highly competitive end products with best-in-class quality. This solution is fully compliant with the Brazilian standard for digital TV (SBTVD) and can be deployed in all countries that decided to adopt this standard.
With approximately 60 million households, Brazil represents the biggest potential for SBTVD in Latin America followed by Argentina with around 13 million households. The process for the deployment of Ginga in these two countries is the most advanced in the SBTVD world.
Miguel Estevez, strategic marketing manager, Home Entertainment Business Unit of Fujitsu Semiconductor, said: “Fujitsu is targeting the Set-Top Box (STB) and integrated digital television (iDTV) market in Latin America offering system solutions from low cost to high-end rounded up with low power consumption and high quality chip sets for HD Decoding and ISDB-T Demodulation. For these reasons a software solution was sort that presented a small foot print, reliability, stability and was market-proven enabling shortest time–to-market. TOTVS’s Ginga solution fits our expectations very well. I am confident that this is the start of a very promising partnership between both companies.”
“There are a number of key benefits that have motivated TOTVS to start a strategic partnership with Fujitsu for the SBTVD market. These include the very competitive cost of the bill of material (BOM) combined with high performance at low power consumption, as well as the successful history of Fujitsu in the ISDB-T domain as Japanese company and the quality aspects of the chip sets. Sticker Center is also going to become a key feature that will be promoted in combination with the Fujitsu HD Decoder family,” stated David Britto, Technology Strategy director at TOTVS.
An important milestone for both companies is to demonstrate TOTVS’s ByYouTV middleware running on Fujitsu HD Decoder MB86H610 at the CCBN2011 in Beijing from March 23rd-25th, 2011.
Friday, February 25, 2011
SoftJin enhances analysis capabilities and performance of NxDAT defect analysis software
SANTA CLARA, USA & BANGALORE, INDIA: SoftJin Technologies, a provider of customized automation software for Electronic Design and Manufacturing, today announced the enhanced version of NxDAT, its Defect Analysis software.
NxDAT is widely used by Mask shops and Wafer foundries for efficient analysis of Defects identified by IC Photomask Inspection Systems. NxDAT, with its open Architecture, can be easily extended for analysis of defects identified by a variety of Inspection equipments including IC/FPD Mask Inspection Systems, Wafer Inspection Systems and Metrology Systems.
NxDAT includes a host of features for navigation, visualization, sophisticated image measurement, cross-section analysis and repeatability analysis for accurate analysis and classification of defects. The enhanced version of NxDAT is optimized for better performance in terms of both speed and memory.
Several new analysis options in the Defect Image Analysis and Defect-to-CAD Database correlation area provide the user with more insight into nature of defect. Also, new usability improvement features such as customizable GUI Layout, batch mode support, property based file opening and user-defined filters provide greater flexibility and efficiency to users.
“Our customers are reporting a variety of tangible benefits of using NxDAT for both on-line and off-line defect analysis. With the growing defect volume and complexity of analysis involved, we are adding a host of new features and improvements to NxDAT in response to customer feedback. These enhancements further improve the productivity of operators doing defect analysis as well as enable mask shops and foundries to realize greater value from their Mask Inspection Systems.” says Dr. Ravi Pai, MD and chief architect (Post Layout EDA) at SoftJin Technologies.
As part of Open Architecture support in NxDAT, SoftJin provides a generic Reader/Writer Plug-In interface through which various defect file formats can be easily supported. The new version of NxDAT supports SEMI’s P41-0304E Mask defect data specification standard. With its capability of loading and stacking multiple inspections in different formats, NxDAT can be used as common Defect Analysis software for various inspection equipment.
NxDAT combines Mask Inspection and Design Automation worlds by supporting correlation of mask defect data with CAD Layout data in major industry standard IC Layout and Mask Data formats. SoftJin has now enhanced this feature by providing direct interface with HOTSCOPE Layout and Mask data Viewer. HOTSCOPE, an industry standard Layout and mask data viewer from Jedat Inc. (Japan), is capable of reading and displaying huge sized mask data quickly and accurately. With HOTSCOPE interface in NxDAT, user can navigate through the defect data in NxDAT and at the same time visualize the corresponding region of CAD data in HOTSCOPE, thus enabling design based defect criticality analysis.
Key new features in the enhanced version of NxDAT include:
* Image enhancement options such as display of defect region as zoomed images, multi-level threshold images and overlay of gray level matrix on the image.
* Automatic registration of images enabling the user to analyze the correctly aligned images.
* Scripting interface to run the software in Batch mode. Batch mode enables user to automate tasks in the defect analysis flow.
* Multi-tier classification support to add any number of secondary classifications. As an example, primary classification could be for Defect type, and a secondary classification could be used for disposition or action to be applied on the defect after analysis.
* CAD data correlation support for OASIS.MASK along with the existing GDSII, OASIS, MEBES, OASIS.VSB formats.
* User defined GUI layout option to customize and save the preferred layout configuration of NxDAT.
* Property based file opening feature to select defect files based on the reticle name, inspection name, barcodes, etc.
* Regression plots between various attributes of defect data.
* Automatic Binning of defects using programmable ranking function based on defect criteria such as defect area, CD, etc.
* With the performance improvements in latest version of NxDAT, opening a 10,000 defect file takes less than a minute on inexpensive PCs and navigating between defects is instantaneous.
SoftJin also offers NxDAT customization services wherein NxDAT can be enhanced as per the specific needs of the equipment vendor or end user.
NxDAT is widely used by Mask shops and Wafer foundries for efficient analysis of Defects identified by IC Photomask Inspection Systems. NxDAT, with its open Architecture, can be easily extended for analysis of defects identified by a variety of Inspection equipments including IC/FPD Mask Inspection Systems, Wafer Inspection Systems and Metrology Systems.
NxDAT includes a host of features for navigation, visualization, sophisticated image measurement, cross-section analysis and repeatability analysis for accurate analysis and classification of defects. The enhanced version of NxDAT is optimized for better performance in terms of both speed and memory.
Several new analysis options in the Defect Image Analysis and Defect-to-CAD Database correlation area provide the user with more insight into nature of defect. Also, new usability improvement features such as customizable GUI Layout, batch mode support, property based file opening and user-defined filters provide greater flexibility and efficiency to users.
“Our customers are reporting a variety of tangible benefits of using NxDAT for both on-line and off-line defect analysis. With the growing defect volume and complexity of analysis involved, we are adding a host of new features and improvements to NxDAT in response to customer feedback. These enhancements further improve the productivity of operators doing defect analysis as well as enable mask shops and foundries to realize greater value from their Mask Inspection Systems.” says Dr. Ravi Pai, MD and chief architect (Post Layout EDA) at SoftJin Technologies.
As part of Open Architecture support in NxDAT, SoftJin provides a generic Reader/Writer Plug-In interface through which various defect file formats can be easily supported. The new version of NxDAT supports SEMI’s P41-0304E Mask defect data specification standard. With its capability of loading and stacking multiple inspections in different formats, NxDAT can be used as common Defect Analysis software for various inspection equipment.
NxDAT combines Mask Inspection and Design Automation worlds by supporting correlation of mask defect data with CAD Layout data in major industry standard IC Layout and Mask Data formats. SoftJin has now enhanced this feature by providing direct interface with HOTSCOPE Layout and Mask data Viewer. HOTSCOPE, an industry standard Layout and mask data viewer from Jedat Inc. (Japan), is capable of reading and displaying huge sized mask data quickly and accurately. With HOTSCOPE interface in NxDAT, user can navigate through the defect data in NxDAT and at the same time visualize the corresponding region of CAD data in HOTSCOPE, thus enabling design based defect criticality analysis.
Key new features in the enhanced version of NxDAT include:
* Image enhancement options such as display of defect region as zoomed images, multi-level threshold images and overlay of gray level matrix on the image.
* Automatic registration of images enabling the user to analyze the correctly aligned images.
* Scripting interface to run the software in Batch mode. Batch mode enables user to automate tasks in the defect analysis flow.
* Multi-tier classification support to add any number of secondary classifications. As an example, primary classification could be for Defect type, and a secondary classification could be used for disposition or action to be applied on the defect after analysis.
* CAD data correlation support for OASIS.MASK along with the existing GDSII, OASIS, MEBES, OASIS.VSB formats.
* User defined GUI layout option to customize and save the preferred layout configuration of NxDAT.
* Property based file opening feature to select defect files based on the reticle name, inspection name, barcodes, etc.
* Regression plots between various attributes of defect data.
* Automatic Binning of defects using programmable ranking function based on defect criteria such as defect area, CD, etc.
* With the performance improvements in latest version of NxDAT, opening a 10,000 defect file takes less than a minute on inexpensive PCs and navigating between defects is instantaneous.
SoftJin also offers NxDAT customization services wherein NxDAT can be enhanced as per the specific needs of the equipment vendor or end user.
2011 MWC: Booming popularity of smartphone helps increase NAND flash demand
TAIWAN: According to DRAMeXchange, the research department of Trendforce,Mobile World Congress, starting on February 14th, 2011 in Barcelona, is the most important event of the worldwide telecommunication industry.
We found most of the mobile and system vendors announced their new generation mobile devices during the show. The launches of both new tablet PC and 4G/LTE Smartphone are tightly scheduled throughout the year.
According to DRAMeXchange, 2010 worldwide handset shipment reached 1.3 billion units while Smartphone accounts for 18 percent of the total number with an annual growth rate of 40 percent compared to total smartphone shipment in 2009. Again, we expect 2011 worldwide handsets can increase 10 percent year-over-year to 1.4 billion units.
Benefited from the introduction of less sophisticated, entry-level Android phones, smartphone market penetration in 2011 will reach about 30 percent to 32 percent, approximately, an 80 percent growth year-over-year from the total smartphone shipment in 2010.
The enhancement of speed and efficiency in communication has always remained the center of interest of the telecommunication industry. The commercialization of 4G, LTE and NFC (Near Field Communication) in 2011 MWC demonstrated vendors’ interests. From chip designers to equipment vendors and telecommunication carriers, one after another they announced the adaptation of the new technology and we expect to see a progression of this adaption starting on 2H11.
With the gradually maturing infrastructure, mobile internet penetration rate can be further accelerated. From a hardware point of view, advanced hardware such as dual-core CPU can boost smartphone performance and meet the basic computing needs of consumers. On the other hand, several location-based services have been introduced at MWC and with the successful penetration of mobile internet and app store, application services are coming together to provide a better user experience.
We expect that these new internet applications can closely integrate customer experience with apps. Thus, with more diversified and efficient telecommunication infrastructures, hardware and application services, DRAMeXchange expects Smartphone’s booming momentum will likely continue further into 2013.
Smartphone has triggered a strong demand for the traditional MCP (Multi-Chip Package) and the emerging eMMC. Simultaneously, smartphones also increased the content-per-box of embedded NAND Flash storage. Rocketing sales of iPhone influenced mobile vendors to adopt more Smartphone designs with embedded NAND Flash. Meanwhile, NAND Flash vendors will accelerate the 2xnm technology migration in 2011.
DRAMeXchange is positive toward the increase of embedded NAND Flash storage content per box. According to an updated statistic by DRAMeXchange, the consumption of NAND Flash in the handset segment reached 43.8% of total demand. This ratio can be further increased if Smartphone sales continue to outperform our expectation.
We found most of the mobile and system vendors announced their new generation mobile devices during the show. The launches of both new tablet PC and 4G/LTE Smartphone are tightly scheduled throughout the year.
According to DRAMeXchange, 2010 worldwide handset shipment reached 1.3 billion units while Smartphone accounts for 18 percent of the total number with an annual growth rate of 40 percent compared to total smartphone shipment in 2009. Again, we expect 2011 worldwide handsets can increase 10 percent year-over-year to 1.4 billion units.
Benefited from the introduction of less sophisticated, entry-level Android phones, smartphone market penetration in 2011 will reach about 30 percent to 32 percent, approximately, an 80 percent growth year-over-year from the total smartphone shipment in 2010.
The enhancement of speed and efficiency in communication has always remained the center of interest of the telecommunication industry. The commercialization of 4G, LTE and NFC (Near Field Communication) in 2011 MWC demonstrated vendors’ interests. From chip designers to equipment vendors and telecommunication carriers, one after another they announced the adaptation of the new technology and we expect to see a progression of this adaption starting on 2H11.
With the gradually maturing infrastructure, mobile internet penetration rate can be further accelerated. From a hardware point of view, advanced hardware such as dual-core CPU can boost smartphone performance and meet the basic computing needs of consumers. On the other hand, several location-based services have been introduced at MWC and with the successful penetration of mobile internet and app store, application services are coming together to provide a better user experience.
We expect that these new internet applications can closely integrate customer experience with apps. Thus, with more diversified and efficient telecommunication infrastructures, hardware and application services, DRAMeXchange expects Smartphone’s booming momentum will likely continue further into 2013.
Smartphone has triggered a strong demand for the traditional MCP (Multi-Chip Package) and the emerging eMMC. Simultaneously, smartphones also increased the content-per-box of embedded NAND Flash storage. Rocketing sales of iPhone influenced mobile vendors to adopt more Smartphone designs with embedded NAND Flash. Meanwhile, NAND Flash vendors will accelerate the 2xnm technology migration in 2011.
DRAMeXchange is positive toward the increase of embedded NAND Flash storage content per box. According to an updated statistic by DRAMeXchange, the consumption of NAND Flash in the handset segment reached 43.8% of total demand. This ratio can be further increased if Smartphone sales continue to outperform our expectation.
What’s the fastest growing semiconductor MOS logic market? (Hint: It’s not MPUs)
This article appearred on Semico Spin.
PHOENIX, USA: It should come as no surprise that semiconductor foundry manufacturers are booming. The semiconductor industry has been transformed. But it’s not just fabless versus IDM (Integrated Device Manufacturer).
Revenue has shifted from Embedded MPUs, MCUs, DSPs and Standard Cell ASICs to Special Purpose Logic chips. Integration has taken over MOS Logic sales, creating a huge increase in the sales of fully integrated semiconductors. Most of these chips are being manufactured by foundries.
Let’s take a closer look at MOS Logic markets over the last eleven years, beginning with the year 1999 rather than 2000 to eliminate the effects of the dot-com boom-and-bust in 2000 and 2001.
From 1999 through 2010, Special Purpose Logic sales increased from $16.5 billion to $59.3 billion, a CAGR of 12.3 percent. During the same time period computing MPU sales grew from $27.2 billion to $38.8 billion, a CAGR of only 3.6 percent. No other MOS logic category had significant growth, either because the sales base was too low or because the CAGR was too low.
Special Purpose Logic is now by far the largest MOS Logic device category. Special Purpose Logic sales are greater than MPU, MCU and DSP sales combined and nearly five times the sales of standard cell ASICs and FPGAs combined. In fact, Special Purpose Logic sales in 2010 were greater than sales for any other semiconductor device type. What has happened?
Special purpose logic is a hodge-podge of different semiconductor types that include ASICS, ASSPs, SoCs and core based ICs for specific markets. Parsing the differences is beyond the scope of this article; but the unifying characteristic is that, no matter what the definition, design methodology or type of CPU core, Special Purpose Logic semiconductors are highly integrated chips in volume production as standard or semi-standard products.
Following Moore’s Law, doubling roughly every two years, the number of transistors that can be manufactured on a chip has increased more than 100 times from 1999 to 2010. As a result, more functions, including multiple MPU, MCU or DSP cores, other logic functions, and I/O can be integrated onto a chip. This has changed the design of end-use products.
Ten or more years ago, most end-use product designs used a CPU (an embedded MPU, an MCU or a DSP) surrounded by several other logic and I/O devices. Today, the level of integration has increased dramatically. While not all systems can be reduced to one chip, the level of integration possible can reduce the chip count for almost all systems. There are other potential benefits.
The functionality can be increased, the system footprint can be reduced or costs can be reduced. In addition, performance can be increased or power consumption reduced. Any combination of these benefits or all can be realized.
NRE (Non-Recurring Engineering) costs have always been an issue for ASICs, but the semiconductor industry has found ways to reduce this limitation for highly-integrated devices. One has been the re-use of blocks of logic, spreading NRE across several designs.
A second has been the use of IP (Intellectual Property), blocks of logic designed by small, independent companies. By selling their IP to multiple parties, these companies can, again, spread the NRE across several designs. Purchasing IP from an IP vendor has an added benefit. Design engineers can add functionality beyond their own expertise or experience.
Semico has been following these trends from their beginnings. Six reports covering Intellectual Property trends, ASIC design starts, and SoC design methodologies were published in 2010 alone. Earlier reports covered SoC markets, costs and trends.
Because the distinctions between device types in Special Purpose Logic are blurred, forecasting Special Purpose Logic sales by end-use markets is more relevant than forecasting by device type.
Semico is uniquely well qualified to accomplish this. We have always used end-use market forecasts as the basis for forecasts by device type, and have established the Semico MAP Model (demo), a database forecasting semiconductor shipments and sales by device type based on end-use market demand. This data is readily available to forecast Special Purpose Logic sales (or sales for any device type) by end-use market.
PHOENIX, USA: It should come as no surprise that semiconductor foundry manufacturers are booming. The semiconductor industry has been transformed. But it’s not just fabless versus IDM (Integrated Device Manufacturer).
Revenue has shifted from Embedded MPUs, MCUs, DSPs and Standard Cell ASICs to Special Purpose Logic chips. Integration has taken over MOS Logic sales, creating a huge increase in the sales of fully integrated semiconductors. Most of these chips are being manufactured by foundries.
Let’s take a closer look at MOS Logic markets over the last eleven years, beginning with the year 1999 rather than 2000 to eliminate the effects of the dot-com boom-and-bust in 2000 and 2001.
From 1999 through 2010, Special Purpose Logic sales increased from $16.5 billion to $59.3 billion, a CAGR of 12.3 percent. During the same time period computing MPU sales grew from $27.2 billion to $38.8 billion, a CAGR of only 3.6 percent. No other MOS logic category had significant growth, either because the sales base was too low or because the CAGR was too low.
Special Purpose Logic is now by far the largest MOS Logic device category. Special Purpose Logic sales are greater than MPU, MCU and DSP sales combined and nearly five times the sales of standard cell ASICs and FPGAs combined. In fact, Special Purpose Logic sales in 2010 were greater than sales for any other semiconductor device type. What has happened?
Special purpose logic is a hodge-podge of different semiconductor types that include ASICS, ASSPs, SoCs and core based ICs for specific markets. Parsing the differences is beyond the scope of this article; but the unifying characteristic is that, no matter what the definition, design methodology or type of CPU core, Special Purpose Logic semiconductors are highly integrated chips in volume production as standard or semi-standard products.
Following Moore’s Law, doubling roughly every two years, the number of transistors that can be manufactured on a chip has increased more than 100 times from 1999 to 2010. As a result, more functions, including multiple MPU, MCU or DSP cores, other logic functions, and I/O can be integrated onto a chip. This has changed the design of end-use products.
Ten or more years ago, most end-use product designs used a CPU (an embedded MPU, an MCU or a DSP) surrounded by several other logic and I/O devices. Today, the level of integration has increased dramatically. While not all systems can be reduced to one chip, the level of integration possible can reduce the chip count for almost all systems. There are other potential benefits.
The functionality can be increased, the system footprint can be reduced or costs can be reduced. In addition, performance can be increased or power consumption reduced. Any combination of these benefits or all can be realized.
NRE (Non-Recurring Engineering) costs have always been an issue for ASICs, but the semiconductor industry has found ways to reduce this limitation for highly-integrated devices. One has been the re-use of blocks of logic, spreading NRE across several designs.
A second has been the use of IP (Intellectual Property), blocks of logic designed by small, independent companies. By selling their IP to multiple parties, these companies can, again, spread the NRE across several designs. Purchasing IP from an IP vendor has an added benefit. Design engineers can add functionality beyond their own expertise or experience.
Semico has been following these trends from their beginnings. Six reports covering Intellectual Property trends, ASIC design starts, and SoC design methodologies were published in 2010 alone. Earlier reports covered SoC markets, costs and trends.
Because the distinctions between device types in Special Purpose Logic are blurred, forecasting Special Purpose Logic sales by end-use markets is more relevant than forecasting by device type.
Semico is uniquely well qualified to accomplish this. We have always used end-use market forecasts as the basis for forecasts by device type, and have established the Semico MAP Model (demo), a database forecasting semiconductor shipments and sales by device type based on end-use market demand. This data is readily available to forecast Special Purpose Logic sales (or sales for any device type) by end-use market.
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