Open-Silicon, MIPS and Virage Logic achieve high performance ASIC processor design

MILPITAS, SUNNYVALE & FREMONT, USA: Open-Silicon Inc., MIPS Technologies Inc. and Virage Logic today announced the co-development of test chips showcasing the companies’ industry-leading technologies for building high-performance processor-based systems.

The companies achieved successful 65 nanometer (nm) silicon testing of a processor test chip at 1.1GHz, making it one of the fastest processors built in a 65nm ASIC. Also, work has begun on a follow-on 40nm device targeting frequencies in excess of 2.5GHz and providing over 5000 DMIPS of performance.

Both efforts utilize Open-Silicon’s CoreMAX technology as well as the superscalar MIPS32 74K processor core, a fully synthesizable processor core widely used in high-end digital consumer devices, set top boxes, and networking solutions.

The 65nm test chip was designed to show how the companies’ technologies can be used to achieve top performance in a standard ASIC implementation. The 74K processor core is complemented with 32KB L1 instruction and data caches, a 512KB L2 cache, and system and memory controller blocks, and was implemented using TSMC’s 65nm GP process with standard 10 track libraries and Virage Logic’s SiWare Memory compilers.

The companies have working silicon running at 1.1 GHz. To achieve this goal, Open-Silicon applied its patented CoreMAX performance enhancement technology to the design. This technology permitted the designers to build several hundred new standard cells targeted specifically at speeding up the design’s critical paths.

This, along with the advanced SiWare Memory compilers and a triple Vt process option, allowed final design worst-case timing closure across all corners at 1.1GHz with standard ASIC margins.

“Open-Silicon was proud to work with our partners MIPS Technologies and Virage Logic to demonstrate our performance optimization technology,” stated Dr. Naveed Sherwani, CEO and president of Open-Silicon.

“Open-Silicon’s CoreMAX has been used across more than 50 customer designs to gain an extra 10 percent of performance, giving them a competitive edge in their markets. It is a testament to the Open-Silicon technology to take a blazingly fast MIPS processor, use mainstream TSMC standard cell libraries, and achieve a new level of performance.”

“For more than a decade, Virage Logic’s embedded memories have been the IP of choice for high performance processor implementations,” said Dr. Alex Shubat, CEO and president of Virage Logic.

“We are excited to serve as Open-Silicon’s and MIPS Technologies’ trusted IP partner and provide them with silicon-proven high speed memory technology that helps remove system bottlenecks and delivers the highest levels of performance possible.”

The 40nm test chip in development is planned to reach silicon in the first quarter of 2010. The performance target is very high; frequencies above 2.5GHz are expected when selected from typical silicon, providing over 5000 DMIPS at top speeds. This test chip will include a floating point version of the 74K processor core, along with L2 cache, and system and memory controller blocks.

“MIPS Technologies has long been a performance leader in the processor IP industry, and we are continuing that tradition with these latest achievements,” said John Bourgoin, CEO and president of MIPS Technologies.

“The 74K core is popular as the primary CPU in DTV, IPTV and cable set-top boxes, networking applications and other applications requiring high levels of performance. As we continue to push the performance bar with new technologies and through collaboration with industry leaders like Open-Silicon and Virage Logic, MIPS Technologies’ customers will enjoy the necessary processor headroom to support continued feature enhancement for years to come.”