Accellera members approve VIP standard best practices guide

NAPA, USA: Accellera, the leading standards organization developing language-based standards used by system, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies, has approved the Accellera Verification Intellectual Property (VIP) Best Practices Interoperability Guide, a document resulting from the work of its VIP Technical Subcommittee (TSC), which was formed in May 2008.

The Guide details how to use VIP components developed using SystemVerilog testbench environments based on either the Open Verification Methodology (OVM) or Verification Methodology Manual (VMM) interchangeably to lower verification costs and improve design quality.

“The results of Accellera’s VIP Interoperability standardization effort makes it easier to reuse verification components and reduces the cost of repurchasing and rewriting IP for each new project or electronic design automation tool,” said Shrenik Mehta, Accellera chair.

“We applaud the efforts of Accellera’s VIP TSC for reaching this significant milestone and for making their Best Practices Interoperability Guide available to the EDA community.”