Xilinx's broadcast offerings lower cost and power of serial digital interfaces

BANGALORE, INDIA: Xilinx Inc. today announced demonstrations of the latest developments in serial connectivity that lower the cost and power of serial digital interfaces and enable the rapid adoption of emerging DisplayPort and Ethernet AVB protocols.

At the heart of these innovations is the Xilinx Broadcast Connectivity Targeted Design Platform that simplifies development of complete broadcast audio and video interface solutions with support for standard definition (SD), high definition (HD), and 3G-SDI standards in a single programmable device. The new capabilities are designed to enable faster time to market and greater product differentiation of professional broadcast systems.

Based on latest generation Virtex-6 and Spartan-6 FPGAs, Xilinx is demonstrating the scalable performance and cost-saving integration advantages of its common platform approach for broadcast audio, video and network connectivity applications.

Xilinx’s broadcast connectivity platform is the first FPGA offering with low-cost, low-power serial transceivers supporting HD video for professional broadcast applications. It also incorporates the new DisplayPort interface LogiCORE IP core from Xilinx enabling transmission and reception of serial digital video for professional and consumer displays.

“SDI is ubiquitous throughout the broadcast industry today. Companies don’t want to spend effort, time, and money on interfaces,” said Ben Runyan, senior manager, Broadcast Marketing at Xilinx.

”Our broadcast connectivity platform and DisplayPort IP simplify interface development, so manufacturers can improve time to market, lower implementation costs, and focus on creating value for their end customers. They can spend time finding innovative ways to differentiate and put limited engineering resources to better use developing advanced, higher quality video processing. These are compelling market advantages, especially for the many companies that already use Xilinx FPGAs in their broadcast systems.”

Live demonstrations of the broadcast connectivity platform and DisplayPort IP are being held at the IBC2009 Exhibition in Amsterdam from September 11th through 15th in Xilinx Booth #10.B30. Xilinx is also showcasing the first fully certified Dolby Digital Professional Encoder on Xilinx FPGAs announced separately today (see related news release).

Broadcast Connectivity Targeted Design Platform
The Xilinx Broadcast Connectivity Targeted Design Platform encompasses all the connectivity elements needed by hardware and software developers to build serial digital interface (SDI) solutions and fully characterize and verify performance for the targeted applications.

Developers can choose Virtex-6 FPGAs for the highest-speed serial connectivity with up to 72 serial transceivers and line rates in excess of 11Gbps for SD/HD/3G-SDI and embedded audio applications, as well as fully integrated support for 10G SDI designs.

For the lowest risk and lowest cost serial connectivity, Spartan-6 FPGAs with up to eight 3.125Gbps transceivers support SD and HD resolution applications with up to 60 percent lower system cost and less than 50 percent the power of previous offerings.

In addition to silicon devices, the broadcast connectivity platform integrates a predictable and intelligently optimized set of design technologies and methodologies that make it easy for broadcast development engineers to implement triple rate SDI designs.

These include Xilinx and third-party domain and application-specific IP cores, complete design environments, and demonstration and reference designs, along with a base set of digital audio/video development boards and industry-standard FPGA Mezzanine Card (FMC) daughter boards.

Xilinx will rollout a series of market-specific development kits for the broadcast connectivity platform so developers can get started quickly using the targeted reference design and development board, and then modify the design as needed to meet the specific feature requirements and design goals of their applications. Targeted applications include cameras, switchers, routers, encoders, professional monitors, and cinema projectors.

Broadcast Connectivity Video Standards
Xilinx continues to drive development of new technologies that reduce the risk and cost of adopting emerging broadcast video standards aimed at improving video display quality and bandwidth across content creation and distribution networks.

The Xilinx DisplayPort interface IP core supports the digital-video-I/O standard introduced by VESA (Video Electronics Standards Association) to provide higher resolution and richer color than traditional VGA or DVI interfaces.

The scalable and extensible open-standard core is fully compliant with the DisplayPort version 1.1a specification. It provides a small design footprint that improves signal integrity and reduces EMI, while providing faster speeds and lower power.

Broadcast developers can integrate the DisplayPort core into Xilinx FPGA-based designs without the added expense and development time of a discrete interface component. Advanced features like content protection using HDCP are also part of the standard DisplayPort interface IP core.

Earlier this year, Xilinx introduced the industry’s first Ethernet Audio/Video Bridging (AVB) Endpoint. Developed in collaboration with Harman International Industries, the Xilinx Ethernet AVB LogiCORE IP enables reliable, high quality of service (QoS) and low latency connectivity for streaming media (audio and video).

The parameterizable core uses cutting-edge programmable technology to easily adapt to changes in the IEEE 802.1 Ethernet AVB standard and support custom features. It is ideally suited to video control applications for professional cameras, mixers and projectors, as well as digital signage for movie theatres, stadiums, shopping malls, etc.

Xilinx recently became a founding member of the AVnu Alliance (www.AVnu.org), an industry forum dedicated to enhancing professional-quality audio/video by promoting emerging IEEE 802.1 AVB networking standards.