EVE’s new ZeBu-Server offers fast compile time

SAN JOSE, USA: EVE, the leader in hardware/software co-verification, said that its new emulation system ZeBu-Server offers fast compile times that range from five- to 30-million gates per hour on PC farms, depending on the design’s complexity.

In a recent benchmark, ZeBu-Server software compiled a 200-million gate design in less than 10 hours, and a one-billion gate design in less than 12 hours.

With its fully parallel synthesis, partitioning and place and route features, ZeBu-Server can accelerate first-time compilation, while an incremental compilation capability speeds design changes. The compiler includes a multicore acceleration capability to break the linearity of the compile time on large designs. It can increase compilation speed to a maximum of 100-million gates per hour on designs with hundreds of million gates.

ZeBu-Server offers automated, fast and incremental compilation from SystemVerilog, Verilog and VHDL register transfer level (RTL) code. As an interactive hardware/software debugging tool, it includes complete RTL signal waveform dumping and support for SystemVerilog Assertions.

Priced from $150,000, it is suitable for all system-on-chip (SoC) verification needs across the entire development cycle, from hardware verification, hardware/software integration to embedded software validation.