HSINCHU, TAIWAN: Taiwan Semiconductor Manufacturing Co. Ltd announced that its 0.25-micron One-Time-Programmable (OTP) IP now meets Automotive Electronics Council (AEC) standard AEC-Q100 specification.
The IP is fully compatible with TSMC Bipolar-CMOS- DMOS (BCD), mixed signal/analog and standard CMOS logic processes and does not require additional processing steps, making it an ideal System-on-Chip (SoC) choice for automotive power management and analog applications.
TSMC's 0.25-micron OTP IP passes AEC-Q100 grade 1 product qualification specifications, features fully tested at multi-probe electrical testability and supports the automotive industry's stringent 10-year data retention requirement in 125 degrees Celsius operating temperatures. It is designed to operate at single 5 volt supply voltage for read operations after programming at 7.5 volt.
Based on bit-cell structure licensed from eMemory Technology Inc., the OTP IP is supported by TSMC customization and failure analysis. Characterization and test methodologies documentation are available to meet the stringent automotive reliability requirement.
"This 0.25-micron automotive One-Time-Programmable IP introduction adds to TSMC's technology selection that also includes AEC-Q100 qualified 0.25-micron and 0.18-micron embedded flash IPs for MCU applications," said Kuotung Cheng, director of automotive program at TSMC. "It addresses the growing demand for analog trimming, calibration configuration, encryptions keys, and in-field customizations."
Wednesday, June 30, 2010
TowerJazz licenses Y-flash non-volatile memory to leading digital foundry
MIGDAL HAEMEK, ISRAEL: TowerJazz, the global specialty foundry leader, announced today that it has licensed its Y-Flash Non-Volatile Memory (NVM) technology to a worldwide leading digital foundry.
TowerJazz’s Y-Flash cell will be used by this foundry as a building block for its own process modules to enhance its current offering and modify it for implementation in a variety of technology nodes.
TowerJazz’s Y-Flash technology is the leading solution for NVM in the market today due to its small cell size, zero mask adder and flexibility to implement various NVM sizes. Y-Flash can support a variety of memory densities from a few bits for trimming and chip ID applications, up to 256Kb and more for code storage. NVM blocks that utilize this proprietary technology include array sizes that are up to five times smaller than other competitive solutions and can be built using only one gate oxide allowing for ultra low cost designs.
“That a digital foundry leader chose to license our NVM technology is a substantial confirmation of its capability to enable, among others, fully differentiated power management platforms," said TowerJazz CEO, Russell Ellwanger.
“In Q1 TowerJazz established itself as the number one specialty foundry worldwide by revenue. This agreement is one proof of our position as the number one specialty foundry by technology. We are pleased to have entered into this relationship with a leading digital foundry and look forward to its continuance."
TowerJazz’s Y-Flash cell will be used by this foundry as a building block for its own process modules to enhance its current offering and modify it for implementation in a variety of technology nodes.
TowerJazz’s Y-Flash technology is the leading solution for NVM in the market today due to its small cell size, zero mask adder and flexibility to implement various NVM sizes. Y-Flash can support a variety of memory densities from a few bits for trimming and chip ID applications, up to 256Kb and more for code storage. NVM blocks that utilize this proprietary technology include array sizes that are up to five times smaller than other competitive solutions and can be built using only one gate oxide allowing for ultra low cost designs.
“That a digital foundry leader chose to license our NVM technology is a substantial confirmation of its capability to enable, among others, fully differentiated power management platforms," said TowerJazz CEO, Russell Ellwanger.
“In Q1 TowerJazz established itself as the number one specialty foundry worldwide by revenue. This agreement is one proof of our position as the number one specialty foundry by technology. We are pleased to have entered into this relationship with a leading digital foundry and look forward to its continuance."
Xelerated samples 100 Gbit/s wirespeed network processor
STOCKHOLM, SWEDEN: Xelerated has sampled its HX family of network processor units (NPUs), which are now available to system vendors and service providers. Based on Xelerated’s unique and deterministic dataflow architecture, the HX family of NPUs can process 100 Gbit/s of Ethernet traffic at wirespeed for any packet size.
The HX family of NPUs constitutes a break-through of speed and integration. It integrates Ethernet MACs, programmable switching and advanced traffic management for the delivery of fine-granular Quality of Service (QoS). The result is a single-chip solution with extraordinary service density, enabling system vendors to design products for more advanced Ethernet and IP services.
“With the sampling of the HX family of NPUs, Xelerated is delivering on a core need for both system vendors and service providers. Xelerated’s deterministic dataflow architecture set the stage for the performance boost this chip brings to its customers,” said Bob Wheeler, Senior Analyst at The Linley Group. “The HX NPUs combine a high level of performance and integration, providing single-chip solutions for high-density 100 Gbit/s designs.”
To ease the development of new generation Carrier Ethernet switches and routers, Xelerated is making available a range of software and tools, including its reference design kit (RDK), software development tools, and data plane software.
* The HX RDK facilitates design, integration and testing for a range of high-capacity interface options including 10GE, GE, Interlaken. It is a modular 1U switch flexibly designed for interoperability and verification of HX-based systems.
* The Metro Ethernet Application (MEA) is a full-featured data plane software. It provides simultaneous support for Ethernet, PB, PBB, VPLS, IP, MPLS and OAM traffic with strict wirespeed guarantees. The software is provided in source code to allow for system vendor customization.
* The Software Development Kit (SDK) is an integrated development environment for coding, testing and debugging of data plane software.
“We are very excited about having samples and tools for the HX network processor ready,” said Anders Ericsson, Vice President and Head of Sales and Marketing at Xelerated. “We have invested heavily in this new generation technology, and we look forward to supporting our customers in their new designs of high-speed Carrier Ethernet systems.”
The HX family of NPUs constitutes a break-through of speed and integration. It integrates Ethernet MACs, programmable switching and advanced traffic management for the delivery of fine-granular Quality of Service (QoS). The result is a single-chip solution with extraordinary service density, enabling system vendors to design products for more advanced Ethernet and IP services.
“With the sampling of the HX family of NPUs, Xelerated is delivering on a core need for both system vendors and service providers. Xelerated’s deterministic dataflow architecture set the stage for the performance boost this chip brings to its customers,” said Bob Wheeler, Senior Analyst at The Linley Group. “The HX NPUs combine a high level of performance and integration, providing single-chip solutions for high-density 100 Gbit/s designs.”
To ease the development of new generation Carrier Ethernet switches and routers, Xelerated is making available a range of software and tools, including its reference design kit (RDK), software development tools, and data plane software.
* The HX RDK facilitates design, integration and testing for a range of high-capacity interface options including 10GE, GE, Interlaken. It is a modular 1U switch flexibly designed for interoperability and verification of HX-based systems.
* The Metro Ethernet Application (MEA) is a full-featured data plane software. It provides simultaneous support for Ethernet, PB, PBB, VPLS, IP, MPLS and OAM traffic with strict wirespeed guarantees. The software is provided in source code to allow for system vendor customization.
* The Software Development Kit (SDK) is an integrated development environment for coding, testing and debugging of data plane software.
“We are very excited about having samples and tools for the HX network processor ready,” said Anders Ericsson, Vice President and Head of Sales and Marketing at Xelerated. “We have invested heavily in this new generation technology, and we look forward to supporting our customers in their new designs of high-speed Carrier Ethernet systems.”
Virage Logic continues to broaden semiconductor IP offering
FREMONT, USA: Virage Logic Corp. announced the further broadening of its already extensive semiconductor IP product offering with the introduction of a new portfolio of processor peripheral IP including UART, USART, GPIO, SPI, I2C, General Purpose Timer, and Watchdog Timer cores.
The new portfolio of production proven cores is the first offering resulting from Virage Logic’s acquisition of NXP’s advanced horizontal CMOS IP product lines in November 2009. These new cores, the first in a continuing series expected to be announced this year, come with test benches that help simplify SoC verification and software drivers that ease the development of processor programs to accelerate the system-on-chip (SoC) development process.
"Since our acquisition of the NXP processor peripherals group late last year, we have invested in productizing the entire portfolio of silicon proven devices," said Mike Thompson, director of product marketing for Processor and SoC Solutions at Virage Logic.
"The release of the new cores further underscores Virage Logic’s role as a single source trusted IP provider of an ever growing product portfolio. As the first in a series of subsystem and infrastructure IP that will be released this year, we are broadening our ability to provide an even larger part of the total solution today’s SoC designers require to meet their increasingly challenging time to market and profitability goals."
According to Richard Wawrzyniak, senior market analyst at Semico: "As the percent of IP reuse increases, so too does the number of IP blocks being used in each design. An increasing number of these IP blocks consist of non-CPU or memory functions, such as communication interfaces, analog blocks, etc. Perhaps the greatest driver of this trend is the simple fact that in order for designers to be able to complete their designs on time, they must use IP they know works and comes from a trusted source."
These new peripheral cores ideally fit the needs of market segments where Virage Logic is already a leading supplier. One such market is flash memory devices where Virage Logic’s ARC processors are shipped in the lion’s share of USB flash memory devices.
Another market is WiFi where Virage Logic’s ARC processors are shipped in the majority of current generation notebook and netbook computer WiFi Controllers. Furthermore, these peripherals make Virage Logic’s ARC processor solutions more attractive in the 8051 replacement market which the company is addressing with its recently introduced ARC 601 processor.
The new portfolio of production proven cores is the first offering resulting from Virage Logic’s acquisition of NXP’s advanced horizontal CMOS IP product lines in November 2009. These new cores, the first in a continuing series expected to be announced this year, come with test benches that help simplify SoC verification and software drivers that ease the development of processor programs to accelerate the system-on-chip (SoC) development process.
"Since our acquisition of the NXP processor peripherals group late last year, we have invested in productizing the entire portfolio of silicon proven devices," said Mike Thompson, director of product marketing for Processor and SoC Solutions at Virage Logic.
"The release of the new cores further underscores Virage Logic’s role as a single source trusted IP provider of an ever growing product portfolio. As the first in a series of subsystem and infrastructure IP that will be released this year, we are broadening our ability to provide an even larger part of the total solution today’s SoC designers require to meet their increasingly challenging time to market and profitability goals."
According to Richard Wawrzyniak, senior market analyst at Semico: "As the percent of IP reuse increases, so too does the number of IP blocks being used in each design. An increasing number of these IP blocks consist of non-CPU or memory functions, such as communication interfaces, analog blocks, etc. Perhaps the greatest driver of this trend is the simple fact that in order for designers to be able to complete their designs on time, they must use IP they know works and comes from a trusted source."
These new peripheral cores ideally fit the needs of market segments where Virage Logic is already a leading supplier. One such market is flash memory devices where Virage Logic’s ARC processors are shipped in the lion’s share of USB flash memory devices.
Another market is WiFi where Virage Logic’s ARC processors are shipped in the majority of current generation notebook and netbook computer WiFi Controllers. Furthermore, these peripherals make Virage Logic’s ARC processor solutions more attractive in the 8051 replacement market which the company is addressing with its recently introduced ARC 601 processor.
Physicists build Analog Devices' components into Antarctic 'Ice' telescope
NORWOOD, USA: Buried two kilometers under solid ice on one of the coldest continents on Earth, Analog Devices’ data converters and amplifiers are helping scientists at the South Pole build the world’s largest telescope to search for the smallest subatomic particles known to humankind.
The innovative “underground” telescope project is called IceCube and uses a cubic kilometer of pure, ultra-translucent ice at the South Pole as a telescopic “window” or particle detector to search the universe for its smallest known particles, called neutrinos (See movies and animations on IceCube and how it works).
Neutrinos are subatomic particles that lack an electric charge produced by the decay of radioactive elements and elementary particles. Neutrinos travel at near the speed of light and are so tiny that they can typically pass through solid matter without colliding with any atoms. However when neutrinos collide with an atom, light energy is emitted that can help detect the presence and direction of these sub-atomic particles.
IceCube will search for neutrinos from the most violent astrophysical sources, including events like exploding stars, gamma ray bursts, and cataclysmic phenomena involving black holes and neutron stars. The IceCube telescope is a powerful tool to search for dark matter, and could reveal new physical processes associated with the enigmatic origin of the highest energy particles in nature.
IceCube uses Antarctica’s ice sheet as the largest instrumented volume of ice/water in the world. Neutrinos passing through the ice sheet collide with atoms creating a blue light at impact that can be detected by IceCube’s digital optical modules (DOMS).
Analog Devices’ data converters and amplifiers are installed in more than 5,000 of these DOMS. The DOMs, which are 13–inch-diameter glass pressure spheres, are deployed under the ice on a cable at depths of between 1.5 km and 2.5 km. Over the next 25 years while embedded in ice, the DOMs will detect and transmit experimental data about particle collisions.
“We needed low-power, reliable products capable of providing the longevity needed for this project, especially on the main board in the DOMs. Design teams at Lawrence Berkeley National Laboratory (LBNL) and the University of Wisconsin-Madison used ADI data converters and amplifiers that fit our needs and requirements," said Jerry Przyblski, LBNL design engineer. “We used ADI products, such as ADCs (analog-to-digital converters), DACs (digital-to-analog converters) and amplifiers, in the DOMS and the communications system. So far, IceCube’s scientists have gathered data equal to thousands of DOM years of operation.”
The construction of the IceCube underground telescope will be completed in 2011. The National Science Foundation awarded the University of Wisconsin lead responsibility in building IceCube. The project is a collaboration among researchers from around the world, including Belgium, Germany, The Netherlands, Switzerland, Japan, the United Kingdom, New Zealand and Sweden.
The innovative “underground” telescope project is called IceCube and uses a cubic kilometer of pure, ultra-translucent ice at the South Pole as a telescopic “window” or particle detector to search the universe for its smallest known particles, called neutrinos (See movies and animations on IceCube and how it works).
Neutrinos are subatomic particles that lack an electric charge produced by the decay of radioactive elements and elementary particles. Neutrinos travel at near the speed of light and are so tiny that they can typically pass through solid matter without colliding with any atoms. However when neutrinos collide with an atom, light energy is emitted that can help detect the presence and direction of these sub-atomic particles.
IceCube will search for neutrinos from the most violent astrophysical sources, including events like exploding stars, gamma ray bursts, and cataclysmic phenomena involving black holes and neutron stars. The IceCube telescope is a powerful tool to search for dark matter, and could reveal new physical processes associated with the enigmatic origin of the highest energy particles in nature.
IceCube uses Antarctica’s ice sheet as the largest instrumented volume of ice/water in the world. Neutrinos passing through the ice sheet collide with atoms creating a blue light at impact that can be detected by IceCube’s digital optical modules (DOMS).
Analog Devices’ data converters and amplifiers are installed in more than 5,000 of these DOMS. The DOMs, which are 13–inch-diameter glass pressure spheres, are deployed under the ice on a cable at depths of between 1.5 km and 2.5 km. Over the next 25 years while embedded in ice, the DOMs will detect and transmit experimental data about particle collisions.
“We needed low-power, reliable products capable of providing the longevity needed for this project, especially on the main board in the DOMs. Design teams at Lawrence Berkeley National Laboratory (LBNL) and the University of Wisconsin-Madison used ADI data converters and amplifiers that fit our needs and requirements," said Jerry Przyblski, LBNL design engineer. “We used ADI products, such as ADCs (analog-to-digital converters), DACs (digital-to-analog converters) and amplifiers, in the DOMS and the communications system. So far, IceCube’s scientists have gathered data equal to thousands of DOM years of operation.”
The construction of the IceCube underground telescope will be completed in 2011. The National Science Foundation awarded the University of Wisconsin lead responsibility in building IceCube. The project is a collaboration among researchers from around the world, including Belgium, Germany, The Netherlands, Switzerland, Japan, the United Kingdom, New Zealand and Sweden.
TowerJazz signs agreement with Wells Fargo Capital Finance to extend credit lines to 2014
NEWPORT BEACH, USA & MIGDAL HAEMEK, ISRAEL: TowerJazz has signed an agreement with its lender, Wells Fargo Capital Finance, part of Wells Fargo & Company, to extend its credit lines from September 2011 to September 2014.
Under the agreement, the four-year lines totaling $45 million will bear an interest rate equal to, at the Company’s option, the USD LIBOR rate plus a margin ranging from 2.25 percent to 2.75 percent per annum, or the lender’s prime rate plus a margin ranging from 0.50 percent to 1 percent. As of March 31, 2010 and December 31, 2009, outstanding borrowings under Wachovia Capital Finance Corporation (Western), now part of Wells Fargo Capital Finance, were $22.0 and $27.0 million, respectively.
As previously announced, the company is continuing to work with its institutional bondholders and Israeli lender banks, to restructure and re-finance its long-term debt with a view towards further strengthening its balance sheet and debt structure, as well as enabling its business plan growth.
Russell Ellwanger, Tower's CEO, said: "I am extremely pleased that we have extended our relationship with Wells Fargo Capital Finance, one of the largest asset-based lenders in the US. Following our June 2, 2010 release, this announcement is the second with more to come on executing a comprehensive debt restructuring plan as we are committed to increasing shareholder value. I am very pleased to end today, the second quarter, with this important financial release.”
“Following a strong, four-year relationship, we are pleased to provide this three-year extension to the facility’s maturity date,” said Andy Robin, head of the Business Finance division of Wells Fargo Capital Finance. “We look forward to providing support to the company as it achieves its strategic goals.”
Under the agreement, the four-year lines totaling $45 million will bear an interest rate equal to, at the Company’s option, the USD LIBOR rate plus a margin ranging from 2.25 percent to 2.75 percent per annum, or the lender’s prime rate plus a margin ranging from 0.50 percent to 1 percent. As of March 31, 2010 and December 31, 2009, outstanding borrowings under Wachovia Capital Finance Corporation (Western), now part of Wells Fargo Capital Finance, were $22.0 and $27.0 million, respectively.
As previously announced, the company is continuing to work with its institutional bondholders and Israeli lender banks, to restructure and re-finance its long-term debt with a view towards further strengthening its balance sheet and debt structure, as well as enabling its business plan growth.
Russell Ellwanger, Tower's CEO, said: "I am extremely pleased that we have extended our relationship with Wells Fargo Capital Finance, one of the largest asset-based lenders in the US. Following our June 2, 2010 release, this announcement is the second with more to come on executing a comprehensive debt restructuring plan as we are committed to increasing shareholder value. I am very pleased to end today, the second quarter, with this important financial release.”
“Following a strong, four-year relationship, we are pleased to provide this three-year extension to the facility’s maturity date,” said Andy Robin, head of the Business Finance division of Wells Fargo Capital Finance. “We look forward to providing support to the company as it achieves its strategic goals.”
DRAM vendors continue to have pofit performance in 2010-2011
TAIWAN: According to DRAMeXchange, with the migration to 4xnm in 2H10, we expect DRAM price will adjust down in 4Q10 given the enhanced supply growth. 2011 DRAM price will likely decline 30 percent YoY.
However, we see the declining price will help to boost DRAM content upward to over 4GB. With the technology migration, we expect OP margin in 2011 for those best cost practice vendors will be estimated at 36 percent and 26 percent in 2011. Meanwhile, we expect OP margin for those less cost-competitive vendors will estimated at 10% in 2011 and they will turn to profit in 2H’10.
Facing the enhanced CAPEX, capacity expansion and technology migration from Samsung, other DRAM vendors also aggressively strengthen their competitiveness. Their strategy and planning is listed below:
Hynix revised up 2010 CAPEX 1/3 to US$2.6B to accelerate the 44nm migration in DRAM and 3Xnm migration in NAND Flash.Micron camp is accelerating the 42nm technology development while migrate their current technology to 50nm. They expect to initiate wafer-in production from 3Q10.
Nanya and Inotera plans to raise CAPEX again for immersion scanner purchasing plans speed up and 42nm technology migration development with Micron.
As to Elpida camp, Elpida will raise the portion in mobile DRAM product in Hiroshima facilities and move commodity DRAM production in Rexchip at Taiwan. Rexchip has successfully mass produce 63nm products and 42nm production is expected to be initiated in July. PSC plans to focus more on foundry and NAND Flash business. PSC plans to put efforts in three major business: commodity DRAM, foundry and NAND Flash.
Winbond has prioritized product lines in NOR Flash, graphic memory, mobile memory via its Qimonda 46nm technology after gradually phrasing out commodity business. Winbond is also dedicating on self-owned 46nm technology.ProMOS has sold their fab2 in Hsing-Chu and put all the resource in their fabs in Tai-Chung Fabs. They are aggressively adopting Elpida’s 63nm technology.
Samsung planned to revise up their CAPEX for memory business to KRW 9 trillion (US$4.8B) from original KRW 5.5 trillion (US$7.8B). The money will be spent on 200K 12” inch fabs-Line 16&17 for DRAM and NAND Flash while detail production plans will be accommodated based on the market.
It is estimated to take one year for whole facility, clean room and other equipment set up while wafer-in production plans can be executed at 3Q11. 4Q11 will be the time frame for output. Samsung is going to expand current capacity for Line-15 fabs and initiate the 35nm DDR3 migration. Also, Samsung will invest KRW 2 trillion ($1.7 billion) on LSI business for the purpose of demand in mobile handset, DTV and SoC business along with the target to strengthen the capability in foundry business.
Samsung’s CAPEX percentage of overall industry has been sharply pulled up to 41 percent from 25 percent-the original pattern. CAPEX is mainly for R&D and facility infrastructure. CAPEX ratio of total Taiwanese DRAM vendors accounts around 34 percent in 2010.
Samsung recorded $3 billion in DRAM revenue in 1Q10 with 32 percent market share. With the enhanced CAPEX, capacity expansion and technology migration, we expect Samsung’s revenue percentage will surpass 35 percent in 2H10 and over 40 percent in 2011.
However, we see the declining price will help to boost DRAM content upward to over 4GB. With the technology migration, we expect OP margin in 2011 for those best cost practice vendors will be estimated at 36 percent and 26 percent in 2011. Meanwhile, we expect OP margin for those less cost-competitive vendors will estimated at 10% in 2011 and they will turn to profit in 2H’10.
Facing the enhanced CAPEX, capacity expansion and technology migration from Samsung, other DRAM vendors also aggressively strengthen their competitiveness. Their strategy and planning is listed below:Hynix revised up 2010 CAPEX 1/3 to US$2.6B to accelerate the 44nm migration in DRAM and 3Xnm migration in NAND Flash.Micron camp is accelerating the 42nm technology development while migrate their current technology to 50nm. They expect to initiate wafer-in production from 3Q10.
Nanya and Inotera plans to raise CAPEX again for immersion scanner purchasing plans speed up and 42nm technology migration development with Micron.As to Elpida camp, Elpida will raise the portion in mobile DRAM product in Hiroshima facilities and move commodity DRAM production in Rexchip at Taiwan. Rexchip has successfully mass produce 63nm products and 42nm production is expected to be initiated in July. PSC plans to focus more on foundry and NAND Flash business. PSC plans to put efforts in three major business: commodity DRAM, foundry and NAND Flash.
Winbond has prioritized product lines in NOR Flash, graphic memory, mobile memory via its Qimonda 46nm technology after gradually phrasing out commodity business. Winbond is also dedicating on self-owned 46nm technology.ProMOS has sold their fab2 in Hsing-Chu and put all the resource in their fabs in Tai-Chung Fabs. They are aggressively adopting Elpida’s 63nm technology.Samsung planned to revise up their CAPEX for memory business to KRW 9 trillion (US$4.8B) from original KRW 5.5 trillion (US$7.8B). The money will be spent on 200K 12” inch fabs-Line 16&17 for DRAM and NAND Flash while detail production plans will be accommodated based on the market.
It is estimated to take one year for whole facility, clean room and other equipment set up while wafer-in production plans can be executed at 3Q11. 4Q11 will be the time frame for output. Samsung is going to expand current capacity for Line-15 fabs and initiate the 35nm DDR3 migration. Also, Samsung will invest KRW 2 trillion ($1.7 billion) on LSI business for the purpose of demand in mobile handset, DTV and SoC business along with the target to strengthen the capability in foundry business.
Samsung’s CAPEX percentage of overall industry has been sharply pulled up to 41 percent from 25 percent-the original pattern. CAPEX is mainly for R&D and facility infrastructure. CAPEX ratio of total Taiwanese DRAM vendors accounts around 34 percent in 2010.
Samsung recorded $3 billion in DRAM revenue in 1Q10 with 32 percent market share. With the enhanced CAPEX, capacity expansion and technology migration, we expect Samsung’s revenue percentage will surpass 35 percent in 2H10 and over 40 percent in 2011.
New market report on integrated passive devices (IPDs)
DUBLIN, IRELAND: Research and Markets has added the IPD - Report 2009: Technologies, Applications, Markets & Players report to its line up.
From a commodity technology initially developed to replace bulky discrete passive components, thin-film Integrated Passive Devices (IPD's) are now a growing industry trend driven by ESD/EMI protection, RF, high brightness LEDs, digital and mixed signal applications.
New research study on Thin-film Integrated Passive and Active devices estimates the total IPD market to grow from more than $600 million this year to over $1 billion by 2013. Whether it is to reduce space on the application board, to enhance performance or to reduce cost at the system level, IPD's are spreading to most electronic sectors, from low volume to mass market businesses in aerospace, military, medical, industrial, lighting, communications, and PC applications.
Over the past few years, IPD's have become an essential enabler of System-in-Packages (SiP) realizations. Looking to tomorrow, IPD's are paving the way to the bright future of the "More than Moore" heterogeneous integration as they contribute greatly to bridging the increasing gap between the evershrinking geometries of CMOS IC's and the lagging packaging technologies. IPD's enable the assembly of increasingly complete and autonomous systems with the integration of diverse electronic functions such as sensors, RF transceivers, MEMS, power amplifiers, power management units and digital processors.
At the frontier between the back-end and the front-end of the semiconductor industry, Thin-film IPD's are poised to extend the use of Wafer-Level Packaging (WLP) and Through silicon Via (TSV) technology platforms to many IC package solutions as well as to the discrete passive component industry.
Being a "bridge platform", IPD's involve the complete semiconductor value chain: equipment; material providers; fabless semiconductor players; integrated device manufacturers; CMOS foundries; MEMS players; substrate suppliers; and OSAT industry, are all concerned by the need to increase their value proposition in the future through the extensive integration of thin film integrated passive and active devices. In this report, you will find comprehensive links between the different IPD technologies and each of their applications.
Market share, supply value chain and strategies of the current major players and those looking at entering this business have been identified.
From a commodity technology initially developed to replace bulky discrete passive components, thin-film Integrated Passive Devices (IPD's) are now a growing industry trend driven by ESD/EMI protection, RF, high brightness LEDs, digital and mixed signal applications.
New research study on Thin-film Integrated Passive and Active devices estimates the total IPD market to grow from more than $600 million this year to over $1 billion by 2013. Whether it is to reduce space on the application board, to enhance performance or to reduce cost at the system level, IPD's are spreading to most electronic sectors, from low volume to mass market businesses in aerospace, military, medical, industrial, lighting, communications, and PC applications.
Over the past few years, IPD's have become an essential enabler of System-in-Packages (SiP) realizations. Looking to tomorrow, IPD's are paving the way to the bright future of the "More than Moore" heterogeneous integration as they contribute greatly to bridging the increasing gap between the evershrinking geometries of CMOS IC's and the lagging packaging technologies. IPD's enable the assembly of increasingly complete and autonomous systems with the integration of diverse electronic functions such as sensors, RF transceivers, MEMS, power amplifiers, power management units and digital processors.
At the frontier between the back-end and the front-end of the semiconductor industry, Thin-film IPD's are poised to extend the use of Wafer-Level Packaging (WLP) and Through silicon Via (TSV) technology platforms to many IC package solutions as well as to the discrete passive component industry.
Being a "bridge platform", IPD's involve the complete semiconductor value chain: equipment; material providers; fabless semiconductor players; integrated device manufacturers; CMOS foundries; MEMS players; substrate suppliers; and OSAT industry, are all concerned by the need to increase their value proposition in the future through the extensive integration of thin film integrated passive and active devices. In this report, you will find comprehensive links between the different IPD technologies and each of their applications.
Market share, supply value chain and strategies of the current major players and those looking at entering this business have been identified.
Industry leaders establish MIFARE4Mobile Industry Group
SINGAOPORE: Seven leading players in the Near Field Communication (NFC) ecosystem, Ericsson, Gemalto, NXP, Oberthur Technologies, STMicroelectronics, Venyon, a company in the Giesecke&Devrient group, and ViVOtech have joined forces to form the MIFARE4Mobile Industry Group.
The aim of the group is to enable its members to collaborate and work together to standardize and advance the uniform management of MIFARE applications on NFC-enabled secure elements, such as SIM cards, and mobile phones.
MIFARE has become the most widely adopted contactless technology on the market today and is an essential element in public transportation schemes, ticketing systems and access management around the world. MIFARE4Mobile is a technology, which has been developed by NXP and is used to manage MIFARE-based services in NFC mobile devices, from the over-the-air installation to the end-user interaction via the user interface of the mobile phone.
By bringing together some of the key players in the NFC ecosystem, the group will act as a platform to provide future direction, discuss experiences and share best practices to ensure evolution, interoperable development and implementation of the MIFARE4Mobile technology.
“The creation of this new industry group provides further impetus to the development of NFC applications for mobile phones especially given MIFARE’s reach as a key contactless platform,” said Jonathan Collins, principal analyst, ABI Research “As SIM-based NFC phones come to market, greater collaboration by all stakeholders to remove development and interoperability barriers in existing contactless infrastructures will help drive NFC adoption.”
“The MIFARE4Mobile technology enables mobile network operators, trusted services managers and service providers to seamlessly leverage NFC-enabled mobile phone services on the existing vast MIFARE infrastructures around the world,” said Dr. Nav Bains, Senior Director Mobile Money, GSM Association. “Increased collaboration by some of NFC’s most influential stakeholders will support the creation and facilitate the integration of business for the mobile network industry related to NFC-based services.”
Over the next few months, the MIFARE4Mobile industry group will further develop the specifications supporting MIFARE DESFire technology and multiple Trusted Service Managers, following the initial MIFARE4Mobile release from late 2008 supporting MIFARE Classic technology. Licences for the MIFARE4Mobile Interface specifications are free of charge.
As an increased number of companies begin to develop their own NFC applications to support transactions such as ticketing, there is an increased need for collaboration with other partners in the ecosystem to enable interoperable over the air configuration of SIM cards and handsets.
This process automatically facilitates the activation, updates, provisioning and lifecycle management of contactless mobile services. The MIFARE4Mobile industry group, which includes both hardware partners and trusted service managers, will actively support the global adoption of NFC and the needs of all stakeholders.
The aim of the group is to enable its members to collaborate and work together to standardize and advance the uniform management of MIFARE applications on NFC-enabled secure elements, such as SIM cards, and mobile phones.
MIFARE has become the most widely adopted contactless technology on the market today and is an essential element in public transportation schemes, ticketing systems and access management around the world. MIFARE4Mobile is a technology, which has been developed by NXP and is used to manage MIFARE-based services in NFC mobile devices, from the over-the-air installation to the end-user interaction via the user interface of the mobile phone.
By bringing together some of the key players in the NFC ecosystem, the group will act as a platform to provide future direction, discuss experiences and share best practices to ensure evolution, interoperable development and implementation of the MIFARE4Mobile technology.
“The creation of this new industry group provides further impetus to the development of NFC applications for mobile phones especially given MIFARE’s reach as a key contactless platform,” said Jonathan Collins, principal analyst, ABI Research “As SIM-based NFC phones come to market, greater collaboration by all stakeholders to remove development and interoperability barriers in existing contactless infrastructures will help drive NFC adoption.”
“The MIFARE4Mobile technology enables mobile network operators, trusted services managers and service providers to seamlessly leverage NFC-enabled mobile phone services on the existing vast MIFARE infrastructures around the world,” said Dr. Nav Bains, Senior Director Mobile Money, GSM Association. “Increased collaboration by some of NFC’s most influential stakeholders will support the creation and facilitate the integration of business for the mobile network industry related to NFC-based services.”
Over the next few months, the MIFARE4Mobile industry group will further develop the specifications supporting MIFARE DESFire technology and multiple Trusted Service Managers, following the initial MIFARE4Mobile release from late 2008 supporting MIFARE Classic technology. Licences for the MIFARE4Mobile Interface specifications are free of charge.
As an increased number of companies begin to develop their own NFC applications to support transactions such as ticketing, there is an increased need for collaboration with other partners in the ecosystem to enable interoperable over the air configuration of SIM cards and handsets.
This process automatically facilitates the activation, updates, provisioning and lifecycle management of contactless mobile services. The MIFARE4Mobile industry group, which includes both hardware partners and trusted service managers, will actively support the global adoption of NFC and the needs of all stakeholders.
ST delivers extra micropower choices for analog designers
GENEVA, SWITZERLAND: STMicroelectronics has introduced an ultra-low-power comparator in a choice of tiny packages. These devices enable increased performance and functionality in portable products that use power-saving design techniques to maximize battery life.
Applications that will benefit from the features of these comparators include cellphones, Mobile Internet Devices, MP3 players, digital cameras and portable test equipment.
The new device, the TS331, is among ST's Micropower analog devices, and offers typical current consumption of only 20 microamps, thereby minimizing drain on the battery. In addition, the TS331 can operate from a supply voltage as low as 1.6V, allowing its use in systems designed to operate from low voltages to save overall system power consumption.
The device's rail-to-rail inputs make the chip capable of accepting voltages up to the supply voltage. This capability allows designers to best use the limited dynamic range imposed by low operating voltages, which can otherwise restrict the performance of portable systems.
Further features of the TS331, which come in packages as small as 2.1x2.0x1.0mm, include an extended operating temperature range, from –40 degrees C to +125 degrees C, allowing the device to perform reliably in a wide range of environments and applications including industrial computing equipment and mobile communications infrastructure.
The high maximum temperature also allows use in highly miniaturized products where densely populated boards and small sealed fan-less enclosures can cause operating temperatures to rise quickly.
Major features of the TS331:
* 20-microamp current consumption.
* 1.6V to 5V supply voltage range.
* Rail-to-rail inputs.
* Propagation delay of 200ns typical.
* Open-drain output.
* High ESD tolerance: 2kV HBM / 200V MM.
* Surface-mount SC70-5 (2.1x2.0x1.0mm) or SOT23-5 (3.1x3.2x3.45mm) package.
The TS331 is available immediately, priced from $0.40 for a minimum order of 1000 units, depending on the package. Alternative pricing options are available for larger quantities.
Applications that will benefit from the features of these comparators include cellphones, Mobile Internet Devices, MP3 players, digital cameras and portable test equipment.
The new device, the TS331, is among ST's Micropower analog devices, and offers typical current consumption of only 20 microamps, thereby minimizing drain on the battery. In addition, the TS331 can operate from a supply voltage as low as 1.6V, allowing its use in systems designed to operate from low voltages to save overall system power consumption.
The device's rail-to-rail inputs make the chip capable of accepting voltages up to the supply voltage. This capability allows designers to best use the limited dynamic range imposed by low operating voltages, which can otherwise restrict the performance of portable systems.
Further features of the TS331, which come in packages as small as 2.1x2.0x1.0mm, include an extended operating temperature range, from –40 degrees C to +125 degrees C, allowing the device to perform reliably in a wide range of environments and applications including industrial computing equipment and mobile communications infrastructure.
The high maximum temperature also allows use in highly miniaturized products where densely populated boards and small sealed fan-less enclosures can cause operating temperatures to rise quickly.
Major features of the TS331:
* 20-microamp current consumption.
* 1.6V to 5V supply voltage range.
* Rail-to-rail inputs.
* Propagation delay of 200ns typical.
* Open-drain output.
* High ESD tolerance: 2kV HBM / 200V MM.
* Surface-mount SC70-5 (2.1x2.0x1.0mm) or SOT23-5 (3.1x3.2x3.45mm) package.
The TS331 is available immediately, priced from $0.40 for a minimum order of 1000 units, depending on the package. Alternative pricing options are available for larger quantities.
TSMC selects Berkeley Design Automation analog FastSPICE transient noise for TSMC AMS reference flow 1.0
SANTA CLARA, USA: Berkeley Design Automation Inc., provider of the Analog FastSPICE unified circuit verification platform (AFS Platform), announced that the Taiwan Semiconductor Manufacturing Co. (TSMC) has incorporated the AFS Platform in the Analog Mixed Signal (AMS) Reference Flow 1.0 for device noise analysis.
"We have worked closely with Berkeley Design Automation to ensure that the powerful benefits of their Analog FastSPICE Platform transient noise analysis are available within the TSMC AMS Reference Flow 1.0," said Tom Quan, deputy director of design methodology and service marketing, TSMC.
"Our internal design teams have already been using the Analog FastSPICE Platform because it delivered SPICE accurate results much faster than traditional SPICE on our analog/mixed-signal IP and building blocks across our major process technologies. Our mutual customers using the AMS Reference Flow 1.0 will benefit from the differentiated capabilities the AFS Platform delivers for device noise analysis."
TSMC AMS Reference Flow 1.0 offers an advanced multi-vendor AMS design flow fully integrated with an innovative TSMC AMS design package to manage the growing complexity of process effects as well as design complexity in 40-nm and 28-nm process nodes.
Analog FastSPICE platform
The Berkeley Design Automation Analog FastSPICE Platform is a unified circuit verification platform for analog, mixed-signal, and RF design. It delivers true SPICE accurate results with comprehensive device noise analysis and 10M-element capacity.
The AFS Platform is a single executable that uses advanced algorithms and numerical analysis to rapidly solve the full-circuit matrix and original device equations without any shortcuts.
"Our inclusion in the TSMC AMS Reference Flow 1.0 caps several years of collaboration between the two companies," said Ravi Subramanian, president and CEO of Berkeley Design Automation. "Design teams need best in class solutions to tackle the verification challenges in nanometer analog, RF, and mixed-signal designs. Our cooperation with TSMC in the AMS Reference Flow will enable customers to gain significant improvements in device noise analysis, for their analog/RF circuits."
"We have worked closely with Berkeley Design Automation to ensure that the powerful benefits of their Analog FastSPICE Platform transient noise analysis are available within the TSMC AMS Reference Flow 1.0," said Tom Quan, deputy director of design methodology and service marketing, TSMC.
"Our internal design teams have already been using the Analog FastSPICE Platform because it delivered SPICE accurate results much faster than traditional SPICE on our analog/mixed-signal IP and building blocks across our major process technologies. Our mutual customers using the AMS Reference Flow 1.0 will benefit from the differentiated capabilities the AFS Platform delivers for device noise analysis."
TSMC AMS Reference Flow 1.0 offers an advanced multi-vendor AMS design flow fully integrated with an innovative TSMC AMS design package to manage the growing complexity of process effects as well as design complexity in 40-nm and 28-nm process nodes.
Analog FastSPICE platform
The Berkeley Design Automation Analog FastSPICE Platform is a unified circuit verification platform for analog, mixed-signal, and RF design. It delivers true SPICE accurate results with comprehensive device noise analysis and 10M-element capacity.
The AFS Platform is a single executable that uses advanced algorithms and numerical analysis to rapidly solve the full-circuit matrix and original device equations without any shortcuts.
"Our inclusion in the TSMC AMS Reference Flow 1.0 caps several years of collaboration between the two companies," said Ravi Subramanian, president and CEO of Berkeley Design Automation. "Design teams need best in class solutions to tackle the verification challenges in nanometer analog, RF, and mixed-signal designs. Our cooperation with TSMC in the AMS Reference Flow will enable customers to gain significant improvements in device noise analysis, for their analog/RF circuits."
Tegal receives order for 200 SE Silicon DRIE process tool from leading MEMS Research Center
PETALUMA, USA: Tegal Corp., an innovator of specialized production solutions for the fabrication of advanced MEMS, power ICs and optoelectronic devices, has received an order for a Tegal 200 SE DRIE tool from a leading Asia Pacific-based Research and Development institution investigating MEMS and associated technologies.
The Tegal 200 SE DRIE tool will be shipped and installed at the customer’s site later this calendar year.
The Tegal 200 SE silicon DRIE system order is from a first-time Tegal DRIE customer, and is the result of a thorough competitive evaluation the customer performed on a broad range of silicon DRIE tools and tool suppliers, including competitive solutions from the customer’s home market.
“Our customer knows the path to technological leadership in MEMS research and development starts with choosing the right silicon DRIE tool for the work,” said Yannick Pilloux, DRIE Product Manager at Tegal. “We believe that our DRIE 200 SE system and our deep silicon etch processes are the most reliable and most advanced on the market today and, combined with the excellent local support available from Tegal, resulted in Tegal having been chosen over our competitors, including the home-market competition.”
The Tegal 200 SE is the best-adapted DRIE solution for 3D-SiP and MEMS volume manufacturing today. The tool is designed to achieve high throughput with low Cost of Ownership in production applications, thanks to the combination of extended time between cleaning, minimal wafer edge exclusion, high silicon etch rates, excellent process stability and highly uniform etching.
The 200 SE results are obtained thanks to the implementation by Tegal of a wide range of proprietary hardware and process improvements to the standard Bosch process for deep silicon etch; these improvements include the Tegal patented heated liner, and the patented S.H.A.R.P. (Super High Aspect Ratio Process) process.
Tegal silicon DRIE tools are presently employed in numerous research and development laboratories throughout the world, engaging in both commercial and academic research programs, and are also found in MEMS foundries and other dedicated commercial High Volume Manufacturing lines worldwide.
The Tegal 200 SE DRIE tool will be shipped and installed at the customer’s site later this calendar year.
The Tegal 200 SE silicon DRIE system order is from a first-time Tegal DRIE customer, and is the result of a thorough competitive evaluation the customer performed on a broad range of silicon DRIE tools and tool suppliers, including competitive solutions from the customer’s home market.
“Our customer knows the path to technological leadership in MEMS research and development starts with choosing the right silicon DRIE tool for the work,” said Yannick Pilloux, DRIE Product Manager at Tegal. “We believe that our DRIE 200 SE system and our deep silicon etch processes are the most reliable and most advanced on the market today and, combined with the excellent local support available from Tegal, resulted in Tegal having been chosen over our competitors, including the home-market competition.”
The Tegal 200 SE is the best-adapted DRIE solution for 3D-SiP and MEMS volume manufacturing today. The tool is designed to achieve high throughput with low Cost of Ownership in production applications, thanks to the combination of extended time between cleaning, minimal wafer edge exclusion, high silicon etch rates, excellent process stability and highly uniform etching.
The 200 SE results are obtained thanks to the implementation by Tegal of a wide range of proprietary hardware and process improvements to the standard Bosch process for deep silicon etch; these improvements include the Tegal patented heated liner, and the patented S.H.A.R.P. (Super High Aspect Ratio Process) process.
Tegal silicon DRIE tools are presently employed in numerous research and development laboratories throughout the world, engaging in both commercial and academic research programs, and are also found in MEMS foundries and other dedicated commercial High Volume Manufacturing lines worldwide.
ROHM microstep motor drivers deliver high performance and reliability
SAN DIEGO, USA: The new high-performance, high-reliability stepper motor drivers from ROHM Semiconductor offer selectable excitation modes—full-step to sixteenth-step with 1.0A or 2.0A output current and full-step to eighth-step with 2.5A output current.
These microstep drivers enable designers to optimize motor torque, noise and vibration for a wide range of applications. Selectable current decay pattern (FAST/SLOW/MIXED decay modes) further enhances motor performance. Circuit design is simplified through a combination of features including an internal voltage regulator, control input translator and DMOS output.
The built-in regulator permits operation from a single 36V (max.) supply. Instead of parallel control lines, a single clock (CLK) input is converted by the device's internal translator into motor drive signals. Additionally, ROHM's advanced DMOS (Pch + Nch) output topology eliminates the need for external charge pump components.
The ROHM microstep drivers are the latest addition to the ROHM Stepper Motor Driver Series, which incorporates undervoltage, overvoltage, overcurrent and thermal protection not typically included in motor driver ICs. This series also features ROHM's unique Ghost Supply Prevention (GSP) function that prevents aberrant operation in the off mode.
Field Application Engineer for ROHM Semiconductor, Jeremy Bridges, said: "The combination of ROHM's advanced power semiconductor process technology and enhanced packaging has resulted in exceptional motor driver solutions. Packaging benefits include bottom-side heat sinking to simplify thermal design, adjacent-pin short protection on most models to reduce production and field failures, as well as pin-compatibility among parts with different current ratings."
These microstep drivers enable designers to optimize motor torque, noise and vibration for a wide range of applications. Selectable current decay pattern (FAST/SLOW/MIXED decay modes) further enhances motor performance. Circuit design is simplified through a combination of features including an internal voltage regulator, control input translator and DMOS output.
The built-in regulator permits operation from a single 36V (max.) supply. Instead of parallel control lines, a single clock (CLK) input is converted by the device's internal translator into motor drive signals. Additionally, ROHM's advanced DMOS (Pch + Nch) output topology eliminates the need for external charge pump components.
The ROHM microstep drivers are the latest addition to the ROHM Stepper Motor Driver Series, which incorporates undervoltage, overvoltage, overcurrent and thermal protection not typically included in motor driver ICs. This series also features ROHM's unique Ghost Supply Prevention (GSP) function that prevents aberrant operation in the off mode.
Field Application Engineer for ROHM Semiconductor, Jeremy Bridges, said: "The combination of ROHM's advanced power semiconductor process technology and enhanced packaging has resulted in exceptional motor driver solutions. Packaging benefits include bottom-side heat sinking to simplify thermal design, adjacent-pin short protection on most models to reduce production and field failures, as well as pin-compatibility among parts with different current ratings."
Verigy adds Direct-Probe solution to its V93000 platform for wafer-level CSP market
CUPERTINO, USA: Verigy, a leading semiconductor test company, has extended the scalability of its production-proven V93000 platform by adding the Direct-Probe solution. This high-performance probe test capability for digital, mixed-signal and wireless communication ICs delivers one of the highest signal integrity levels available for production-volume, multi-site probe testing.
The innovative new Direct-Probe RF solution reduces the cost of test for radio-frequency (RF), high-pin-count digital and complex mixed-signal devices, addressing the global semiconductor market’s rapid shift to performance probe test and wafer-level chip scale packages (WLCSP). By removing the conventional mechanical interface between the wafer and tester, Verigy’s V93000 platform equipped with the Direct-Probe RF solution reduces the length and number of signal-path connections, significantly improving signal integrity for RF device testing.
The V93000 with Direct-Probe RF solution can be designed to use a single-load board for both wafer probe and final test. This reduces the time between IC development and production, minimizes the correlation effort between probe and final test, and enables high multi-site capability. Verigy’s Direct-Probe RF capability also provides the largest component area for application use while maintaining planarity of ±1 mm over a 44,000-square-millimeter area.
In addition, V93000 Direct-Probe solutions offer full platform compatibility with all tester configurations while the V93000’s scalable architecture provides the versatility to test the full spectrum of RF-based semiconductor devices.
“As wafer-level chip scale packaging gains momentum, testing currently done with handlers on singulated packaged devices is moving to multi-site, non-singulated testing on wafer probers,” said Hans-Juergen Wagner, Verigy’s vice president of SOC test solutions.
“Essentially, this means that device packaging is becoming the last step in wafer processing, driving final testing onto the probe line. Addressing this trend, we believe our new Direct-Probe RF solution delivers the industry’s highest performance for wafer probing and provides the lowest cost of test while maximizing test resources for a broad range of ICs including wireless devices used in Bluetooth products, GPS and WLANs.”
The innovative new Direct-Probe RF solution reduces the cost of test for radio-frequency (RF), high-pin-count digital and complex mixed-signal devices, addressing the global semiconductor market’s rapid shift to performance probe test and wafer-level chip scale packages (WLCSP). By removing the conventional mechanical interface between the wafer and tester, Verigy’s V93000 platform equipped with the Direct-Probe RF solution reduces the length and number of signal-path connections, significantly improving signal integrity for RF device testing.
The V93000 with Direct-Probe RF solution can be designed to use a single-load board for both wafer probe and final test. This reduces the time between IC development and production, minimizes the correlation effort between probe and final test, and enables high multi-site capability. Verigy’s Direct-Probe RF capability also provides the largest component area for application use while maintaining planarity of ±1 mm over a 44,000-square-millimeter area.
In addition, V93000 Direct-Probe solutions offer full platform compatibility with all tester configurations while the V93000’s scalable architecture provides the versatility to test the full spectrum of RF-based semiconductor devices.
“As wafer-level chip scale packaging gains momentum, testing currently done with handlers on singulated packaged devices is moving to multi-site, non-singulated testing on wafer probers,” said Hans-Juergen Wagner, Verigy’s vice president of SOC test solutions.
“Essentially, this means that device packaging is becoming the last step in wafer processing, driving final testing onto the probe line. Addressing this trend, we believe our new Direct-Probe RF solution delivers the industry’s highest performance for wafer probing and provides the lowest cost of test while maximizing test resources for a broad range of ICs including wireless devices used in Bluetooth products, GPS and WLANs.”
Microchip expands 1.8V serial flash portfolio
CHANDLER, USA: Microchip Technology Inc., a leading provider of microcontroller, analog, and Flash-IP solutions, has announced the SST25WF080 serial Flash-memory device─the newest member of the 25 series Serial Flash (SPI) memory family based on Microchip’s proprietary SuperFlash Technology.
The low-voltage (1.8V), 8 Mbit device features extremely low standby power consumption of just 5 microamperes, active read current of 2 mA (typ., at 33 Mhz) and is the highest-density product in the 25 series 1.8V Serial Flash (SPI) family.
Featuring a 75 Mhz clock frequency and operating temperature range of -40° to +85° Celsius, the device supports the latest generations of low-power electronic devices, such as tablet computers, hard-disk drives, Bluetooth headsets, Wi-Fi and wireless-control devices, as well as camera modules.
“Microchip is now the only company in the industry to offer a full 1.8V serial Flash memory product portfolio, with densities ranging from 512 Kbit to 8 Mbit,” said Randy Drwinga, vice president of Microchip’s Memory Products Group. “With its low power consumption and high-speed clock, the device enables longer battery life and extremely responsive systems in today’s consumer electronic devices.”
The SST25WF080 device is available in an 8-pin SOIC package for $0.95 each, in 10,000-unit quantities; and also in an 8-bump die Z-Scale package. Samples and volume-production quantity orders can be ordered, today.
The low-voltage (1.8V), 8 Mbit device features extremely low standby power consumption of just 5 microamperes, active read current of 2 mA (typ., at 33 Mhz) and is the highest-density product in the 25 series 1.8V Serial Flash (SPI) family.
Featuring a 75 Mhz clock frequency and operating temperature range of -40° to +85° Celsius, the device supports the latest generations of low-power electronic devices, such as tablet computers, hard-disk drives, Bluetooth headsets, Wi-Fi and wireless-control devices, as well as camera modules.
“Microchip is now the only company in the industry to offer a full 1.8V serial Flash memory product portfolio, with densities ranging from 512 Kbit to 8 Mbit,” said Randy Drwinga, vice president of Microchip’s Memory Products Group. “With its low power consumption and high-speed clock, the device enables longer battery life and extremely responsive systems in today’s consumer electronic devices.”
The SST25WF080 device is available in an 8-pin SOIC package for $0.95 each, in 10,000-unit quantities; and also in an 8-bump die Z-Scale package. Samples and volume-production quantity orders can be ordered, today.
Lattice, Affari offer complete RRH hardware solution for wireless infrastructure
HILLSBORO, USA: Lattice Semiconductor Corp. has partnered with Affarii Technologies to successfully demonstrate the industry’s lowest cost, low power Remote Radio Head (RRH) solution at 1300mW per antenna.
The integration of all RRH processing has been achieved on a single LatticeECP3-150 device, part of Lattice’s award-winning, high value LatticeECP3 FPGA family.
The single chip solution supports 2x2 MIMO configurations for WCDMA, LTE and WiMAX applications and is part of an overall RRH hardware evaluation platform jointly developed by Lattice and Affarii. The platform is comprised of the RF front-end, high-speed data conversion devices and the digital signal processing portion.
The functionality of the full signal path package includes DDC/DUC, DPD, CFR and CPRI IP cores, supports multi-carrier waveforms up to 20MHz bandwidth and is compatible with Class AB and Doherty amplifiers using LDMOS and GaN transistors.
“We are pleased to partner with Lattice Semiconductor to offer a low cost, low power integrated RRH platform,” said Shane Flint, Founder and CEO of Affarii. “Lattice has responded to the needs of our mutual wireless infrastructure customers who are interested in using industry leading FPGA/DSP processing solutions.”
“Our partnership with Affarii has yielded an RRH solution that will dramatically reduce cost and power for wireless infrastructure manufacturers,” said Ron Warner, Lattice’s Marketing Manager for Wireless Infrastructure. “By working with Affarii, Lattice continues to deliver on our commitment to provide our customers with innovative, proven solutions that meet the industry’s demands for low cost and low power.”
All features of this RRH solution, both hardware and soft IP, are fully integrated and supported by Lattice’s latest generation of design tools.
The integration of all RRH processing has been achieved on a single LatticeECP3-150 device, part of Lattice’s award-winning, high value LatticeECP3 FPGA family.
The single chip solution supports 2x2 MIMO configurations for WCDMA, LTE and WiMAX applications and is part of an overall RRH hardware evaluation platform jointly developed by Lattice and Affarii. The platform is comprised of the RF front-end, high-speed data conversion devices and the digital signal processing portion.
The functionality of the full signal path package includes DDC/DUC, DPD, CFR and CPRI IP cores, supports multi-carrier waveforms up to 20MHz bandwidth and is compatible with Class AB and Doherty amplifiers using LDMOS and GaN transistors.
“We are pleased to partner with Lattice Semiconductor to offer a low cost, low power integrated RRH platform,” said Shane Flint, Founder and CEO of Affarii. “Lattice has responded to the needs of our mutual wireless infrastructure customers who are interested in using industry leading FPGA/DSP processing solutions.”
“Our partnership with Affarii has yielded an RRH solution that will dramatically reduce cost and power for wireless infrastructure manufacturers,” said Ron Warner, Lattice’s Marketing Manager for Wireless Infrastructure. “By working with Affarii, Lattice continues to deliver on our commitment to provide our customers with innovative, proven solutions that meet the industry’s demands for low cost and low power.”
All features of this RRH solution, both hardware and soft IP, are fully integrated and supported by Lattice’s latest generation of design tools.
Fairchild's fully integrated power supply module provides advanced DC-DC solution for portable, industrial and medical apps
SAN JOSE, USA: Design and system engineers of consumer, industrial and medical electronics employing low dropout regulators (LDO) have sacrificed DC-DC regulator efficiency, which adversely affects the overall efficiency of the design, in order to take advantage of an LDO’s ease-of-use.
Fairchild Semiconductor’s new power DC-DC micro-module offers customers the ability to reduce board space, reduce component count and improve the overall system efficiency of their designs. Alternative efficiency improvement methods include implementing a traditional DC-DC switching converter, which requires in-house design capability and delays time-to-market.
The FAN4603 micro-module DC-DC buck solution, unlike a traditional switching DC-DC implementation, integrates the passive components and the DC-DC regulator into a single ‘solder-and-play’ module. As a complete package, this micro-module is a highly integrated, robust DC-DC solution, reducing component count by at least three components.
This device also allows designers to use an advanced, high-frequency DC-DC solution in their end applications, taking advantage of higher efficiency, robust DC-DC power, reducing the footprint by 40 percent and simplifying layout and applications validation testing, without lengthening design times and qualification cycles, and shortening overall time-to-market.
The FAN4603’s proprietary architecture consumes very low quiescent current and delivers ultra-fast transient response. With quiescent current of 35µA typ. in standby mode, this solution is able to provide best-in-class transient response, making it more reactive to fast changes in load requirements.
The FAN4603 is housed in a 4mm x 2.5mm MLP package.
Prices start at $1.15 @ 1K units. Samples are available now. Delivery takes 12 weeks.
Fairchild Semiconductor’s new power DC-DC micro-module offers customers the ability to reduce board space, reduce component count and improve the overall system efficiency of their designs. Alternative efficiency improvement methods include implementing a traditional DC-DC switching converter, which requires in-house design capability and delays time-to-market.
The FAN4603 micro-module DC-DC buck solution, unlike a traditional switching DC-DC implementation, integrates the passive components and the DC-DC regulator into a single ‘solder-and-play’ module. As a complete package, this micro-module is a highly integrated, robust DC-DC solution, reducing component count by at least three components.
This device also allows designers to use an advanced, high-frequency DC-DC solution in their end applications, taking advantage of higher efficiency, robust DC-DC power, reducing the footprint by 40 percent and simplifying layout and applications validation testing, without lengthening design times and qualification cycles, and shortening overall time-to-market.
The FAN4603’s proprietary architecture consumes very low quiescent current and delivers ultra-fast transient response. With quiescent current of 35µA typ. in standby mode, this solution is able to provide best-in-class transient response, making it more reactive to fast changes in load requirements.
The FAN4603 is housed in a 4mm x 2.5mm MLP package.
Prices start at $1.15 @ 1K units. Samples are available now. Delivery takes 12 weeks.
Tuesday, June 29, 2010
Watch for a slowdown in semiconductor equipment sales
Dr. Robert Castellano, The Information Network
NEW TRIPOLI, USA: Our global leading indicators are pointing to a slowdown in semiconductor equipment sales over the next few months. In fact, we may have already seen most of the growth in the equipment market for 2010, as our leading indicators are showing signs of flattening.
There is increasing concern of slowing global recovery. This is particularly evident from comments made at last weeks G20 meeting, particularly when South Korean president Lee Myung-bak noted, "If European countries proceed with their fiscal austerity plans, the global economic turnaround may slow down." Coming into the meeting, US officials had urged that leaders not move too quickly to cut fiscal stimulus, while many European officials, alarmed by Greece's financial crisis, put more onus on austerity.
It is obvious that the semiconductor equipment industry is now a function of what’s happening on a macroeconomic level. This has always been recognized in a down economy when a CEO will proclaim “it’s the economy, stupid!”, but not always noted in an up economy when the same CEO would announce “I certainly did a great job and that fat bonus check I got was well deserved.”
Clearly time will tell, and we will be the one’s telling it in advance, based on our time proven (since 1995) leading indicators.
NEW TRIPOLI, USA: Our global leading indicators are pointing to a slowdown in semiconductor equipment sales over the next few months. In fact, we may have already seen most of the growth in the equipment market for 2010, as our leading indicators are showing signs of flattening.
There is increasing concern of slowing global recovery. This is particularly evident from comments made at last weeks G20 meeting, particularly when South Korean president Lee Myung-bak noted, "If European countries proceed with their fiscal austerity plans, the global economic turnaround may slow down." Coming into the meeting, US officials had urged that leaders not move too quickly to cut fiscal stimulus, while many European officials, alarmed by Greece's financial crisis, put more onus on austerity.
It is obvious that the semiconductor equipment industry is now a function of what’s happening on a macroeconomic level. This has always been recognized in a down economy when a CEO will proclaim “it’s the economy, stupid!”, but not always noted in an up economy when the same CEO would announce “I certainly did a great job and that fat bonus check I got was well deserved.”
Clearly time will tell, and we will be the one’s telling it in advance, based on our time proven (since 1995) leading indicators.
HDMI 1.4 transmitter enables portable multimedia designs to deliver flawless HD video for home entertainment systems
NORWOOD, USA: Analog Devices Inc. (ADI) has released the industry’s smallest, lowest power HDMI v1.4 transmit IC with integrated de-interlacer and on-chip CEC (consumer electronics control), enabling small, low-cost multimedia devices to provide flawless HD (high definition) video performance and easy connectivity.
The 150-MHz, Advantiv ADV7541 ultra low-power HDMI 1.4 transmitter with de-interlacer converts 480i/p and 1080i interlaced output into a progressive 1080p format, enabling portable multimedia devices to provide full HD resolution to home theater systems.
Offering 150 times less standby power and a ten percent smaller footprint (3.75 mm × 3.75 mm × 0.65 mm) than competing offerings, the ADV7541 HDMI 1.4 transmitter extends ADI’s Advantiv advanced TV solutions portfolio to ultra-slim, low-power designs, including digital still and DSLR cameras, camcorders, gaming consoles, media players, and mobile devices. Watch the ADV7541 video for more information on its features.
“As the world’s smallest and thinnest low-power HDMI 1.4 transmitter with de-interlacer, the ADV7541 provides designers with a complete solution for 1080p video and audio transmission on mobile devices,” said George Diniz, product line manager, video transmitter product line, Analog Devices.
“By delivering interlaced-to-progressive video conversion for both 480i and 1080i video formats, the ADV7541 offers designers a complete solution to bridge the gap between handheld multimedia designs and high definition 1080p home entertainment systems.”
The highly-integrated HDMI 1.4 transmitter integrates the de-interlacer, CEC controller, level shifters and microcontroller, enabling designers to accelerate the CEC and HDMI development process, lower development and manufacturing costs, and decrease time-to-market. In addition to reducing power consumption and footprint, and eliminating external memory requirements, the ADV7541 enables engineers to develop lower power designs that can use smaller, lighter batteries at lower cost.
Validated through successful compliance testing, the ADV7541 is pin- and software-compatible with previous video products, including the ADV7521NK low-power HDMI transmitter and ADV7524 low-power HDMI transmitter with CEC, and incorporates the industry’s leading connectivity standards including HDMI (supporting x.v.Color).
The HDMI transmitter provides complete audio support of S/PDIF (Sony/Philips digital interface format) for compressed audio, including Dolby Digital and DTS; and 2-channel I2S audio for transmitting stereo at sample rates up to 192 kHz. With the optional inclusion of embedded support for HDCP 1.3 (high-bandwidth digital content protection) processing, the ADV7541 HDMI 1.4 transmitter allows the secure transmission of protected content.
The 150-MHz, Advantiv ADV7541 ultra low-power HDMI 1.4 transmitter with de-interlacer converts 480i/p and 1080i interlaced output into a progressive 1080p format, enabling portable multimedia devices to provide full HD resolution to home theater systems.
Offering 150 times less standby power and a ten percent smaller footprint (3.75 mm × 3.75 mm × 0.65 mm) than competing offerings, the ADV7541 HDMI 1.4 transmitter extends ADI’s Advantiv advanced TV solutions portfolio to ultra-slim, low-power designs, including digital still and DSLR cameras, camcorders, gaming consoles, media players, and mobile devices. Watch the ADV7541 video for more information on its features.
“As the world’s smallest and thinnest low-power HDMI 1.4 transmitter with de-interlacer, the ADV7541 provides designers with a complete solution for 1080p video and audio transmission on mobile devices,” said George Diniz, product line manager, video transmitter product line, Analog Devices.
“By delivering interlaced-to-progressive video conversion for both 480i and 1080i video formats, the ADV7541 offers designers a complete solution to bridge the gap between handheld multimedia designs and high definition 1080p home entertainment systems.”
The highly-integrated HDMI 1.4 transmitter integrates the de-interlacer, CEC controller, level shifters and microcontroller, enabling designers to accelerate the CEC and HDMI development process, lower development and manufacturing costs, and decrease time-to-market. In addition to reducing power consumption and footprint, and eliminating external memory requirements, the ADV7541 enables engineers to develop lower power designs that can use smaller, lighter batteries at lower cost.
Validated through successful compliance testing, the ADV7541 is pin- and software-compatible with previous video products, including the ADV7521NK low-power HDMI transmitter and ADV7524 low-power HDMI transmitter with CEC, and incorporates the industry’s leading connectivity standards including HDMI (supporting x.v.Color).
The HDMI transmitter provides complete audio support of S/PDIF (Sony/Philips digital interface format) for compressed audio, including Dolby Digital and DTS; and 2-channel I2S audio for transmitting stereo at sample rates up to 192 kHz. With the optional inclusion of embedded support for HDCP 1.3 (high-bandwidth digital content protection) processing, the ADV7541 HDMI 1.4 transmitter allows the secure transmission of protected content.
TÜV SÜD certifies Mathworks Simulink PLC coder
BANGALORE, INDIIA: MathWorks announced the TÜV SÜD certification of Simulink PLC Coder. TÜV SÜD assessed Simulink PLC Coder as suitable for development processes that must comply with IEC 61508-3 and its process industry adaptation, IEC 61511-1.
As a result, engineers developing high-integrity control systems can streamline the certification of their industrial controllers programmed using IEC 61131-3 structured text generated by Simulink PLC Coder.
The TÜV SÜD certification is based on an audit of the software development, quality engineering, and customer bug reporting processes used by MathWorks in the development of Simulink PLC Coder. The certification requires that engineers using Simulink PLC Coder follow a verification and validation workflow that aids detection and prevention of potential errors in both generated structured text and third-party integrated development environment (IDE) that compiles the structured text.
By including the full implementation tool chain, this workflow is able to support a wide variety of industrial controllers and is not locked into a particular PLC or PAC device. The workflow is documented and available with the MathWorks IEC Certification Kit, which also includes the TÜV SÜD certificate and certification report.
“Simulink PLC Coder brings greater development efficiencies and now reduces certification costs for IEC 61508 and IEC 61151 projects,” said Tom Erkkinen, embedded application manager at MathWorks. “This certification adds to our growing list of products that can be certified or qualified to popular industry standards, all of which enable engineers to leverage the benefits of Model-Based Design for their high-integrity applications.”
As a result, engineers developing high-integrity control systems can streamline the certification of their industrial controllers programmed using IEC 61131-3 structured text generated by Simulink PLC Coder.
The TÜV SÜD certification is based on an audit of the software development, quality engineering, and customer bug reporting processes used by MathWorks in the development of Simulink PLC Coder. The certification requires that engineers using Simulink PLC Coder follow a verification and validation workflow that aids detection and prevention of potential errors in both generated structured text and third-party integrated development environment (IDE) that compiles the structured text.
By including the full implementation tool chain, this workflow is able to support a wide variety of industrial controllers and is not locked into a particular PLC or PAC device. The workflow is documented and available with the MathWorks IEC Certification Kit, which also includes the TÜV SÜD certificate and certification report.
“Simulink PLC Coder brings greater development efficiencies and now reduces certification costs for IEC 61508 and IEC 61151 projects,” said Tom Erkkinen, embedded application manager at MathWorks. “This certification adds to our growing list of products that can be certified or qualified to popular industry standards, all of which enable engineers to leverage the benefits of Model-Based Design for their high-integrity applications.”
Samsung to intro 32-Gigabyte performance-enhancing memory module for servers
SEOUL, SOUTH KOREA: Samsung Electronics Co. Ltd. has developed the industry's first 32 gigabyte (GB) load-reduced, dual-inline memory module (LRDIMM), for server applications.
Samsung will begin mass producing the 32GB LRDIMM in the second half of this year, giving it the largest family of DRAM offerings in the industry.
Using cutting-edge 40 nanometer-class*, four gigabit (4Gb) DDR3 chips, which Samsung introduced earlier this year, the new 32GB LRDIMM accommodates next generation servers designed for virtualization, cloud computing and other high-capacity applications.
“In developing the industry’s first load-reduced module with 40nm-class* DDR3 technology, we are underscoring our determination to combine the best of capacity and performance for the newest generation of servers,” said Dong-Soo Jun, executive vice president, memory marketing, Samsung Electronics.
Samsung’s 32GB LRDIMM prototype consists of 72 4Gb DDR3 chips and an additional memory buffer chip to help reduce the load on the memory subsystem by as much as 75 percent.
By using 32GB LRDIMMs, memory capacity can rise up to 384 gigabytes per CPU. In a two-way server system, capacity can be increased up to 768GB, or about 1.5 times that of a 512GB server system equipped with 32GB DDR3 RDIMMs.
A server equipped with LRDIMMs can process data at 1,333 megabit per second (Mbps), approximately 70 percent faster than the previous speed of 800 Mbps. Samsung’s LRDIMMs operate at 1.35 or 1.5 volts.
Samsung will begin mass producing the 32GB LRDIMM in the second half of this year, giving it the largest family of DRAM offerings in the industry.
Using cutting-edge 40 nanometer-class*, four gigabit (4Gb) DDR3 chips, which Samsung introduced earlier this year, the new 32GB LRDIMM accommodates next generation servers designed for virtualization, cloud computing and other high-capacity applications.
“In developing the industry’s first load-reduced module with 40nm-class* DDR3 technology, we are underscoring our determination to combine the best of capacity and performance for the newest generation of servers,” said Dong-Soo Jun, executive vice president, memory marketing, Samsung Electronics.
Samsung’s 32GB LRDIMM prototype consists of 72 4Gb DDR3 chips and an additional memory buffer chip to help reduce the load on the memory subsystem by as much as 75 percent.
By using 32GB LRDIMMs, memory capacity can rise up to 384 gigabytes per CPU. In a two-way server system, capacity can be increased up to 768GB, or about 1.5 times that of a 512GB server system equipped with 32GB DDR3 RDIMMs.
A server equipped with LRDIMMs can process data at 1,333 megabit per second (Mbps), approximately 70 percent faster than the previous speed of 800 Mbps. Samsung’s LRDIMMs operate at 1.35 or 1.5 volts.
EVE achieves record bookings of $19.9 million in Q4 FY2010
SAN JOSE, USA: EVE, the leader in hardware/software co-verification, announced that it closed the last fiscal quarter of 2010 on March 31 with record bookings of $19.9 million.
Further, since it began volume production in January 2010 of ZeBu-Server, its new billion-gate fast emulation platform, EVE has received purchase orders from eight semiconductor companies, including both new and long-time users of ZeBu platforms.
“We have been granted our wish to forget 2009 and the worst recession in history,” emphasizes Dr. Luc Burgun, EVE’s chief executive officer and president, who adds that this quarter marks the beginning of a strong recovery.
“The rapid ramp in ZeBu-Server orders over its first five months, some of which included multiple systems from long-time users of our ZeBu emulators, delivers another vote of confidence in the design and productivity of our state-of-the-art fast emulation systems.”
In fiscal 2010, EVE added multiple new customers in leading industries, including LG Electronics, Konica-Minolta, Fujitsu Microelectronics Solutions, Nokia-Siemens Networks among others. EVE expanded its installed base through several repeat orders from previous ZeBu users.
In January, EVE started volume production of ZeBu-Server, its sixth-generation scalable emulation system capable of handling up to one-billion ASIC gates. A high-capacity, highly scalable and very fast emulator, ZeBu-Server is suitable for hardware verification and hardware/software co-verification of current and next-generation system-on-chip (SoC) designs.
Over the past 12 months, EVE expanded its library of verification intellectual property (IP), adding several memory models and fast ZeBu transactors, such as HDMI, AXI and TLM 2.0, announced June 1. EVE delivered two major software releases that slashed set-up and compilation time for large designs and enhanced ZeBu-Server’s hardware debugging capabilities.
Further, since it began volume production in January 2010 of ZeBu-Server, its new billion-gate fast emulation platform, EVE has received purchase orders from eight semiconductor companies, including both new and long-time users of ZeBu platforms.
“We have been granted our wish to forget 2009 and the worst recession in history,” emphasizes Dr. Luc Burgun, EVE’s chief executive officer and president, who adds that this quarter marks the beginning of a strong recovery.
“The rapid ramp in ZeBu-Server orders over its first five months, some of which included multiple systems from long-time users of our ZeBu emulators, delivers another vote of confidence in the design and productivity of our state-of-the-art fast emulation systems.”
In fiscal 2010, EVE added multiple new customers in leading industries, including LG Electronics, Konica-Minolta, Fujitsu Microelectronics Solutions, Nokia-Siemens Networks among others. EVE expanded its installed base through several repeat orders from previous ZeBu users.
In January, EVE started volume production of ZeBu-Server, its sixth-generation scalable emulation system capable of handling up to one-billion ASIC gates. A high-capacity, highly scalable and very fast emulator, ZeBu-Server is suitable for hardware verification and hardware/software co-verification of current and next-generation system-on-chip (SoC) designs.
Over the past 12 months, EVE expanded its library of verification intellectual property (IP), adding several memory models and fast ZeBu transactors, such as HDMI, AXI and TLM 2.0, announced June 1. EVE delivered two major software releases that slashed set-up and compilation time for large designs and enhanced ZeBu-Server’s hardware debugging capabilities.
TowerJazz and Vishay Intertechnology enhance business relationship
MIGDAL HAEMEK, ISRAEL & MALVERN, USA: TowerJazz, the global specialty foundry leader, and Vishay Intertechnology Inc., the Siliconix division of which is the world leader in low-voltage power MOSFETs, announced that they are expanding their business relationship to include planar MOSFETs and super junction MOSFETs.
Production of these products under the terms of the expanded relationship between TowerJazz and Vishay is expected to result in tens of millions of dollars in additional yearly revenue. The excellent technical capabilities and the production indices that TowerJazz has achieved during the past years with its Trench technologies motivated Vishay Siliconix to expand its business with TowerJazz. As a result of these additional opportunities, Vishay Siliconix will continue to be one of TowerJazz’s top five customers.
New business between the two companies will include increased production of Vishay Siliconix high-voltage power MOSFETs. In addition, TowerJazz will manufacture Vishay Siliconix Super Junction FET Power MOSFETs. These devices, with very low RDS(on), provide lower conduction losses that save energy in power factor correction (PFC) and pulsewidth modulation (PWM) applications in a wide range of electronic systems, including LCD TVs, PCs, servers, switch mode power supplies (SMPS), and telecom systems.
“Along with the announcement of our new 600-V Super Junction FET power MOSFETs, our expanded foundry agreement will enable us to support the very significant demand that we expect for this device,” said Serge Jaunay, Senior Vice President, MOSFET division, Vishay Intertechnology. “The strong support, technical capabilities, and performance of TowerJazz have resulted in our expanded business relationship with the foundry.”
“We are very pleased with the recognition we have received from Vishay Siliconix to further our business together,” said Dr. Itzhak Edrei, Executive Vice President of Business Groups and Business Development, TowerJazz. “With the expansion of our foundry agreements, including the aforementioned new and strongly differentiated product platform families, Vishay Siliconix will remain one of our top customers, continuing to propel our overall first in foundry year-over-year growth. The work that was invested in the last couple of years has now matured to create this important business upside.”
Production of these products under the terms of the expanded relationship between TowerJazz and Vishay is expected to result in tens of millions of dollars in additional yearly revenue. The excellent technical capabilities and the production indices that TowerJazz has achieved during the past years with its Trench technologies motivated Vishay Siliconix to expand its business with TowerJazz. As a result of these additional opportunities, Vishay Siliconix will continue to be one of TowerJazz’s top five customers.
New business between the two companies will include increased production of Vishay Siliconix high-voltage power MOSFETs. In addition, TowerJazz will manufacture Vishay Siliconix Super Junction FET Power MOSFETs. These devices, with very low RDS(on), provide lower conduction losses that save energy in power factor correction (PFC) and pulsewidth modulation (PWM) applications in a wide range of electronic systems, including LCD TVs, PCs, servers, switch mode power supplies (SMPS), and telecom systems.
“Along with the announcement of our new 600-V Super Junction FET power MOSFETs, our expanded foundry agreement will enable us to support the very significant demand that we expect for this device,” said Serge Jaunay, Senior Vice President, MOSFET division, Vishay Intertechnology. “The strong support, technical capabilities, and performance of TowerJazz have resulted in our expanded business relationship with the foundry.”
“We are very pleased with the recognition we have received from Vishay Siliconix to further our business together,” said Dr. Itzhak Edrei, Executive Vice President of Business Groups and Business Development, TowerJazz. “With the expansion of our foundry agreements, including the aforementioned new and strongly differentiated product platform families, Vishay Siliconix will remain one of our top customers, continuing to propel our overall first in foundry year-over-year growth. The work that was invested in the last couple of years has now matured to create this important business upside.”
TSMC selects Sigrity as a reference flow 11.0 partner
CAMPBELL, USA: Sigrity Inc., the leader in signal and power integrity solutions, announced that TSMC has included three Sigrity chip, package and system co-design products – XtractIM, OrbitIO Planner and OptimizePI – in its new TSMC Reference Flow 11.0. Companies that rely on TSMC flow support now can benefit from streamlined IC package assessment, package model extraction, chip/system IO planning, and power delivery system optimization.
“Working closely with Sigrity, we are impressed by both the robust electromagnetic technology at the core of Sigrity tools, and by the company’s focus on making tools that can be readily used by designers,” said ST Juang, senior director of design infrastructure marketing, TSMC. “Incorporating Sigrity technology into the Reference Flow 11.0 enables designers to pinpoint potential reliability risks early and achieve faster time to market.”
“TSMC long has been recognized for IC manufacturing leadership and for providing practical design flow guidance for complex semiconductor products,” said Raymond Y. Chen, senior VP of engineering at Sigrity. “We are delighted to collaborate with TSMC to offer designers targeted solutions for rapid assessment of issues, and improved performance in chip, package and system-level designs.”
Sigrity’s XtractIM, OrbitIO Planner, and OptimizePI products included in TSMC Reference Flow 11.0 offer unique capabilities for customers:
* XtractIM provides an intuitive assessment of IC package performance that enables early identification of potential problems when changes can be made efficiently. It supports all package designs, including single die BGAs and multi-die SiP implementations.
It accurately models wirebond and flip-chip interconnects and also supports leadframe designs. The package model extraction capability in XtractIM produces single-stage IBIS and SPICE models as well as package models that are reliable over broadband frequencies. The package models can be connected to chip and board models easily for further chip/system signal- and power-integrity analysis.
* OrbitIO Planner gives designers visibility into complex physical IO interactions. It simplifies chip-level IO pad ring design tasks and supports RDL routing. For designs with multiple chips and packages, including those with stacked implementations, OrbitIO Planner also supports IO trade-offs across multiple structures for rapid route feasibility studies and overall system improvement.
* OptimizePI offers targeted power delivery system improvement with a high degree of automation to support IC package and system-level decoupling capacitor optimization. Chip-level data can be incorporated with package and system data in OptimizePI for automatic performance and cost optimization of the total design across the chip, package and system to meet customer targets efficiently.
“Working closely with Sigrity, we are impressed by both the robust electromagnetic technology at the core of Sigrity tools, and by the company’s focus on making tools that can be readily used by designers,” said ST Juang, senior director of design infrastructure marketing, TSMC. “Incorporating Sigrity technology into the Reference Flow 11.0 enables designers to pinpoint potential reliability risks early and achieve faster time to market.”
“TSMC long has been recognized for IC manufacturing leadership and for providing practical design flow guidance for complex semiconductor products,” said Raymond Y. Chen, senior VP of engineering at Sigrity. “We are delighted to collaborate with TSMC to offer designers targeted solutions for rapid assessment of issues, and improved performance in chip, package and system-level designs.”
Sigrity’s XtractIM, OrbitIO Planner, and OptimizePI products included in TSMC Reference Flow 11.0 offer unique capabilities for customers:
* XtractIM provides an intuitive assessment of IC package performance that enables early identification of potential problems when changes can be made efficiently. It supports all package designs, including single die BGAs and multi-die SiP implementations.
It accurately models wirebond and flip-chip interconnects and also supports leadframe designs. The package model extraction capability in XtractIM produces single-stage IBIS and SPICE models as well as package models that are reliable over broadband frequencies. The package models can be connected to chip and board models easily for further chip/system signal- and power-integrity analysis.
* OrbitIO Planner gives designers visibility into complex physical IO interactions. It simplifies chip-level IO pad ring design tasks and supports RDL routing. For designs with multiple chips and packages, including those with stacked implementations, OrbitIO Planner also supports IO trade-offs across multiple structures for rapid route feasibility studies and overall system improvement.
* OptimizePI offers targeted power delivery system improvement with a high degree of automation to support IC package and system-level decoupling capacitor optimization. Chip-level data can be incorporated with package and system data in OptimizePI for automatic performance and cost optimization of the total design across the chip, package and system to meet customer targets efficiently.
Quarter-end effect impact on mild 1-6 percent decline for 2HJune mainstream NAND Flash contract price
TAIWAN: 2HJune mainstream NAND Flash contract price mildly decline 1-6 percent while others prices remain flat. Although some suppliers receive the stable orders from some system product customers to partially ease the impact from slow season and quarter-end effect, yet vendors adopt price promotion to handle the inventory adjustment in quarter-end.
That is, 2HJune 64Gb & 32Gb MLC NAND Flash contract prices decline 4-6 percent while 64Gb and 32Gb TLC NAND Flash contract price mildly drop 1-3 percent, according to DRAMeXchange, the research division of TRENDFORCE.
Source: DRAMeXchange.
Impact by the dynamics from some European financial markets in 2Q10, the slow season effect is expected to last into July. However, DRAMeXchange see restock demand from system products and memory cards will gradually warm up in late July as downstream clients’ inventory level will gradually lower as well.
Also, satisfactory iPad and iPhone 4 launch sales will also trigger other competitors to develop & launch new tablet PCs and smart phones in 2H10. DRAMeXchange expect those new products to help digest the increasing output portion of 3X & 2X nm process technologies as well as TLC products in 2H10.
This situation will turn the sufficiency of NAND Flash market from slight over-supply in 1H10 to mild shortage in 2H10. That is, DRAMeXchange forecast mainstream NAND Flash contract price will likely stabilize and rebound after July.
Source: DRAMeXchange.
That is, 2HJune 64Gb & 32Gb MLC NAND Flash contract prices decline 4-6 percent while 64Gb and 32Gb TLC NAND Flash contract price mildly drop 1-3 percent, according to DRAMeXchange, the research division of TRENDFORCE.
Source: DRAMeXchange.Impact by the dynamics from some European financial markets in 2Q10, the slow season effect is expected to last into July. However, DRAMeXchange see restock demand from system products and memory cards will gradually warm up in late July as downstream clients’ inventory level will gradually lower as well.
Also, satisfactory iPad and iPhone 4 launch sales will also trigger other competitors to develop & launch new tablet PCs and smart phones in 2H10. DRAMeXchange expect those new products to help digest the increasing output portion of 3X & 2X nm process technologies as well as TLC products in 2H10.
This situation will turn the sufficiency of NAND Flash market from slight over-supply in 1H10 to mild shortage in 2H10. That is, DRAMeXchange forecast mainstream NAND Flash contract price will likely stabilize and rebound after July.
Source: DRAMeXchange.
Siltronic evaluating Altatech Semiconductor's wafer-inspection system
MONTBONNOT, FRANCE: Siltronic AG, one of the leading suppliers of silicon wafers, is evaluating an AltaSight SL300 inspection system from Altatech Semiconductor S.A. to verify the tool's capabilities for use in wafer manufacturing.
The 300 mm system's combined capabilities in reflectivity, topographical and dark-field inspection as well as its 100-wafers-per-hour throughput and reliability in a cleanroom environment are being tested at Siltronic's facility in Burghausen, Germany.
AltaSight's system architecture incorporates several different inspection technologies, which are used in combination to precisely identify, locate and classify a wide range of defects on semiconductor wafers. Altatech's patented phase-shift illumination technology generates topographical maps with nanometer resolution.
In addition, a global light-absorption analyzer measures the amplitude of multiple wavelengths of light, searching for any non-topographical defects. Ultrafast dark-field technology is used to inspect each wafer's surfaces for particles and scratches, while Altatech's patented EyeEdge optical sensors identify defects along a wafer's edge.
The data collected from these complementary inspection methods is then compared and analyzed to produce a comprehensive wafer map in less than 25 seconds.
AltaSight's automated defect-classification capabilities are specifically designed to address the needs of silicon wafer suppliers such as Siltronic. The system can detect slip lines inside a wafer's crystalline structure with a vertical sensitivity of 2 nm as well as perform front-side, back-side and edge inspection in one pass. Wafers pass vertically through AltaSight's Class 1 measurement chamber, where full-field optics can detect defects as small as 2 nm.
"Siltronic's close examination of our AltaSight platform's overall performance is a major step toward proving its production-worthiness," said Jean-Luc Delcarri, president of Altatech Semiconductor.
To date, Altatech has installed multiple AltaSight units at customers' facilities worldwide, where they are being used in R&D and pilot-line productions.
"As a leading silicon wafer producer, our manufacturing process also comprises highly sophisticated inspection steps to verify and secure outgoing product quality in order to constantly meet our customers' specific requirements," said Dr. Frank Laube, senior manager, wafer surface inspection at Siltronic. "The high-speed defect-detection and classification technologies offered by Altatech have been shown to be an attractive and powerful new method for wafer inspection."
"We've worked closely with Siltronic to understand all of the requirements for silicon wafer production. In terms of inspection capabilities as well as the silicon wafer manufacturing process flow and cost-of-ownership models, we believe we provide a very attractive solution," Delcarri said.
The 300 mm system's combined capabilities in reflectivity, topographical and dark-field inspection as well as its 100-wafers-per-hour throughput and reliability in a cleanroom environment are being tested at Siltronic's facility in Burghausen, Germany.
AltaSight's system architecture incorporates several different inspection technologies, which are used in combination to precisely identify, locate and classify a wide range of defects on semiconductor wafers. Altatech's patented phase-shift illumination technology generates topographical maps with nanometer resolution.
In addition, a global light-absorption analyzer measures the amplitude of multiple wavelengths of light, searching for any non-topographical defects. Ultrafast dark-field technology is used to inspect each wafer's surfaces for particles and scratches, while Altatech's patented EyeEdge optical sensors identify defects along a wafer's edge.
The data collected from these complementary inspection methods is then compared and analyzed to produce a comprehensive wafer map in less than 25 seconds.
AltaSight's automated defect-classification capabilities are specifically designed to address the needs of silicon wafer suppliers such as Siltronic. The system can detect slip lines inside a wafer's crystalline structure with a vertical sensitivity of 2 nm as well as perform front-side, back-side and edge inspection in one pass. Wafers pass vertically through AltaSight's Class 1 measurement chamber, where full-field optics can detect defects as small as 2 nm.
"Siltronic's close examination of our AltaSight platform's overall performance is a major step toward proving its production-worthiness," said Jean-Luc Delcarri, president of Altatech Semiconductor.
To date, Altatech has installed multiple AltaSight units at customers' facilities worldwide, where they are being used in R&D and pilot-line productions.
"As a leading silicon wafer producer, our manufacturing process also comprises highly sophisticated inspection steps to verify and secure outgoing product quality in order to constantly meet our customers' specific requirements," said Dr. Frank Laube, senior manager, wafer surface inspection at Siltronic. "The high-speed defect-detection and classification technologies offered by Altatech have been shown to be an attractive and powerful new method for wafer inspection."
"We've worked closely with Siltronic to understand all of the requirements for silicon wafer production. In terms of inspection capabilities as well as the silicon wafer manufacturing process flow and cost-of-ownership models, we believe we provide a very attractive solution," Delcarri said.
TI delivers industry's first discrete SuperSpeed USB 3.0 transceiver, offering over 10 times speed of USB 2.0
DALLAS, USA: Texas Instruments Inc. (TI) has introduced the industry's first SuperSpeed USB (USB 3.0) transceiver, which is capable of lightning-fast data transfers when compared to USB High-Speed devices (USB 2.0).
Featuring receiver sensitivity that is twice as good as required by the USB 3.0 specification, the TUSB1310's PIPE3 and ULPI interfaces enable USB 3.0 functionality when used in conjunction with the integrated application processor digital cores.
The 5-gigabits-per-second (Gbps) USB 3.0 physical layer transceiver operates from a single crystal or external reference clock with selectable frequencies from 20, 25, 30 and 40 MHz. This allows the TUSB1310 to provide a cost-effective USB 3.0 solution with few external components and minimum implementation cost.
"End users are demanding the ability to store huge photo and high-definition video files on their portable consumer devices with ease and speed," said Steve Anderson, senior vice president over TI's High-Performance Analog business unit. "The TUSB1310 is capable of completing data transfers of a 27 Gigabit Blu-ray disc in less than 90 seconds, versus nearly 15 minutes with USB 2.0. Using TI's complete SuperSpeed USB portfolio, engineers can design faster, more cost-effective and user-friendly consumer products for today and in the future."
The TUSB1310 supports many applications, including surveillance cameras, multimedia handsets, smartphones, digital still cameras, portable media players, personal navigation devices, audio docks, video IP phones, wireless IP phones and software defined radios. TI offers the industry's most expansive portfolio of SuperSpeed USB devices.
Key available devices are the SN65LVPE502, a dual-channel USB 3.0 redriver/equalizer; the TPD2EUSB30, a two-channel ESD solution for SuperSpeed USB 3.0 interface; and the highly accurate TPS25xx series of USB power switches. Future offerings include peripherals, bridges, hubs, and hosts.
Key features and benefits
* Receiver sensitivity of less than 50 mV differential peak-to-peak for detecting weak signals is twice as good as the specification requirement, allowing use of longer cables and easing board layout challenges.
* Flexible, integrated spread-spectrum clocking can reduce BOM cost by five percent or more.
* Industry-standard link layer interfaces (PIPE3 for USB 3.0 & ULPI for USB 2.0 compatibility) enable easy system integration to a wide variety of attached digital cores.
The TUSB1310, TPD2EUSB30 and SN65LVPE502 are available now from TI and its authorized distributors. The TUSB1310 is packaged in a 175BGA and pricing starts at $6.00 in 1,000-unit quantities; the TPD2EUSB30 is packaged in a SOT (DRT) and pricing starts at $0.15 in 1,000-unit quantities; and the SN65LVPE502 is packaged in a QFN and pricing starts at $4.25 in 1,000-unit quantities.
Featuring receiver sensitivity that is twice as good as required by the USB 3.0 specification, the TUSB1310's PIPE3 and ULPI interfaces enable USB 3.0 functionality when used in conjunction with the integrated application processor digital cores.
The 5-gigabits-per-second (Gbps) USB 3.0 physical layer transceiver operates from a single crystal or external reference clock with selectable frequencies from 20, 25, 30 and 40 MHz. This allows the TUSB1310 to provide a cost-effective USB 3.0 solution with few external components and minimum implementation cost.
"End users are demanding the ability to store huge photo and high-definition video files on their portable consumer devices with ease and speed," said Steve Anderson, senior vice president over TI's High-Performance Analog business unit. "The TUSB1310 is capable of completing data transfers of a 27 Gigabit Blu-ray disc in less than 90 seconds, versus nearly 15 minutes with USB 2.0. Using TI's complete SuperSpeed USB portfolio, engineers can design faster, more cost-effective and user-friendly consumer products for today and in the future."
The TUSB1310 supports many applications, including surveillance cameras, multimedia handsets, smartphones, digital still cameras, portable media players, personal navigation devices, audio docks, video IP phones, wireless IP phones and software defined radios. TI offers the industry's most expansive portfolio of SuperSpeed USB devices.
Key available devices are the SN65LVPE502, a dual-channel USB 3.0 redriver/equalizer; the TPD2EUSB30, a two-channel ESD solution for SuperSpeed USB 3.0 interface; and the highly accurate TPS25xx series of USB power switches. Future offerings include peripherals, bridges, hubs, and hosts.
Key features and benefits
* Receiver sensitivity of less than 50 mV differential peak-to-peak for detecting weak signals is twice as good as the specification requirement, allowing use of longer cables and easing board layout challenges.
* Flexible, integrated spread-spectrum clocking can reduce BOM cost by five percent or more.
* Industry-standard link layer interfaces (PIPE3 for USB 3.0 & ULPI for USB 2.0 compatibility) enable easy system integration to a wide variety of attached digital cores.
The TUSB1310, TPD2EUSB30 and SN65LVPE502 are available now from TI and its authorized distributors. The TUSB1310 is packaged in a 175BGA and pricing starts at $6.00 in 1,000-unit quantities; the TPD2EUSB30 is packaged in a SOT (DRT) and pricing starts at $0.15 in 1,000-unit quantities; and the SN65LVPE502 is packaged in a QFN and pricing starts at $4.25 in 1,000-unit quantities.
WiSpry and IBM to develop next-generation of tunable mobile terminal front-end technology
IRVINE, USA: WiSpry Inc., a leader in tunable RF semiconductor products for the wireless industry, announced that it is working with IBM to develop MEMS process technology and manufacture its tunable RF product roadmap.
This development includes WiSpry's current generation of tunable impedance matching products, slated for production with a major tier-one OEM this fall, as well as future generations of highly integrated products for the entire mobile terminal front-end.
Enabled by proprietary micro-electromechanical machine systems (MEMS), WiSpry's tunable RF devices deliver unparalleled levels of performance; providing over 3dB of link resilience as well as up to 25 percent increased talk or web surfing time on a mobile device. IBM's standard 0.18m process allows for WiSpry to integrate previously unintegratable functions, providing a smaller footprint and lowering BOM costs.
WiSpry's monolithic integration is targeted towards high-growth applications such as 3G multi-mode, multi-band mobile wireless devices; broadband communications, and 4G LTE terminals and infrastructure equipment.
IBM, a global leader in the development and manufacturing of semiconductors and process technologies, offers a rich roadmap of digital, analog-mixed signal and specialty process technologies.
"Our joint development will enable handset OEMs to provide broadband tunability today, and provides a future-proof roadmap to monolithic tunable front-end devices," stated Jeff Hilbert, WiSpry's president and founder. "Working with IBM provides access to high volume and high performance silicon and to a roadmap synergistic with ours. In less than 18 months, we have developed an integrated RF-CMOS MEMS manufacturing process, achieved first pass functional integrated CMOS/MEMS silicon and demonstrated product performance that exceeds our initial customer specifications. IBM's execution has been flawless."
"IBM has a rich portfolio of specialty technology solutions for the RF/wireless market, that we plan to deploy as we enable the WiSpry RF-MEMS technology," said Michael Cadigan, general manager, IBM Microelectronics. "We believe that tunability will be a key enabler for the future of wireless front-ends and we support WiSpry's vision of RF-MEMS solutions for this market."
This development includes WiSpry's current generation of tunable impedance matching products, slated for production with a major tier-one OEM this fall, as well as future generations of highly integrated products for the entire mobile terminal front-end.
Enabled by proprietary micro-electromechanical machine systems (MEMS), WiSpry's tunable RF devices deliver unparalleled levels of performance; providing over 3dB of link resilience as well as up to 25 percent increased talk or web surfing time on a mobile device. IBM's standard 0.18m process allows for WiSpry to integrate previously unintegratable functions, providing a smaller footprint and lowering BOM costs.
WiSpry's monolithic integration is targeted towards high-growth applications such as 3G multi-mode, multi-band mobile wireless devices; broadband communications, and 4G LTE terminals and infrastructure equipment.
IBM, a global leader in the development and manufacturing of semiconductors and process technologies, offers a rich roadmap of digital, analog-mixed signal and specialty process technologies.
"Our joint development will enable handset OEMs to provide broadband tunability today, and provides a future-proof roadmap to monolithic tunable front-end devices," stated Jeff Hilbert, WiSpry's president and founder. "Working with IBM provides access to high volume and high performance silicon and to a roadmap synergistic with ours. In less than 18 months, we have developed an integrated RF-CMOS MEMS manufacturing process, achieved first pass functional integrated CMOS/MEMS silicon and demonstrated product performance that exceeds our initial customer specifications. IBM's execution has been flawless."
"IBM has a rich portfolio of specialty technology solutions for the RF/wireless market, that we plan to deploy as we enable the WiSpry RF-MEMS technology," said Michael Cadigan, general manager, IBM Microelectronics. "We believe that tunability will be a key enabler for the future of wireless front-ends and we support WiSpry's vision of RF-MEMS solutions for this market."
Global Unichip selects TranSwitch for next-generation HDMI supporting full-rate 3-D HDTV
SHELTON USA & HSINCHU, TAIWAN: TranSwitch Corp., a leading provider of semiconductor solutions for the converging voice, data and video network, announced that Global Unichip Corp., the world’s-leading fabless ASIC service provider, adopted TranSwitch’s HD-PXL-1.4 IP cores supporting the latest HDMI 1.4 specifications.
Global Unichip will incorporate TranSwitch’s IP cores in its ASIC service offering for Consumer Electronics applications.
“We have selected TranSwitch’s IP for HDMI primarily because TranSwitch meets the full HDMI 1.4 rate requirement including support for full-rate 3D HDTV,” said Dr. Keh-Ching Huang, Director of Marketing and IP Sourcing of GUC. “TranSwitch’s field-proven track record in providing world-class intellectual property cores for high speed interfaces gives us high confidence that it will accelerate the silicon success for our customers, and we look forward to working closely with TranSwitch going forward on this and future technologies.”
“Our HD-PXL-1.4 cores have a major performance advantage over competitors as we are the only IP provider that meets the full requirement of HDMI 1.4 including full-rate 3-D television,” said Amir Bar-Niv, Vice President for Systems and Applications at TranSwitch.
“The transmitter and receiver HD-PXL-1.4 cores are available today in the TSMC 65nm process, and will be offered in 40nm version later this year. In addition, we plan to introduce an HDMI 1.4 Ethernet Channel (HEC) offering based on our widely deployed industry standard Ethernet PHY IP cores,” concluded Bar-Niv.
Global Unichip will incorporate TranSwitch’s IP cores in its ASIC service offering for Consumer Electronics applications.
“We have selected TranSwitch’s IP for HDMI primarily because TranSwitch meets the full HDMI 1.4 rate requirement including support for full-rate 3D HDTV,” said Dr. Keh-Ching Huang, Director of Marketing and IP Sourcing of GUC. “TranSwitch’s field-proven track record in providing world-class intellectual property cores for high speed interfaces gives us high confidence that it will accelerate the silicon success for our customers, and we look forward to working closely with TranSwitch going forward on this and future technologies.”
“Our HD-PXL-1.4 cores have a major performance advantage over competitors as we are the only IP provider that meets the full requirement of HDMI 1.4 including full-rate 3-D television,” said Amir Bar-Niv, Vice President for Systems and Applications at TranSwitch.
“The transmitter and receiver HD-PXL-1.4 cores are available today in the TSMC 65nm process, and will be offered in 40nm version later this year. In addition, we plan to introduce an HDMI 1.4 Ethernet Channel (HEC) offering based on our widely deployed industry standard Ethernet PHY IP cores,” concluded Bar-Niv.
CHAD Industries to display latest WaferMate Workcell and WaferWare software
SEMICON West 2010, ANAHEIM, USA: CHAD Industries will be demonstrating the next generation of WaferMate workcell and WaferWare operating software during SemiconWest 2010 in San Francisco next month.
The WaferMate workcell has been redesigned for ease of manufacture while remaining flexible for rapid customization to meet different OEM requirements. The redesigned frame and integration components simplify the assembly process across the WaferMate family.
The design has a specific focus to provide all of the standard feature sets customers require and is also easily adaptable to new design features required by our OEM’s to address the latest non-standard wafer handling challenges. Ultimately the system can provide enormous flexibility while still maintaining a short build schedule.
CHAD will also be demonstrating the latest WaferWare software operating system for WaferMate workcells. The WaferWare software GUI design is based upon SEMI Std E-95, and features simple to use screens for ease of operator use. The software has been developed with a focus on flexibility and ease of adapting the WaferMate workcell to new process challenges, and to reducing the software development for new applications.
Wayne Rapp, CHAD’s Vice-President of Engineering, explains the importance of the new WaferMate design and WaferWare software: “The new workcell design is important to meet the needs of our OEM customers for lower cost wafer handler systems with faster delivery time. The new WaferWare software was developed to provide a simpler, and more flexible, graphical user interface for our customers.
“The GUI design makes it more familiar to new operators, and easier for technicians to use. This is extremely important as CHAD continues to penetrate new markets and territories through our OEM customers and distributors. This combination of mechanical, controls, and software flexibility truly provides CHAD with a standard platform to handle non-standard applications.”
The WaferMate workcell has been redesigned for ease of manufacture while remaining flexible for rapid customization to meet different OEM requirements. The redesigned frame and integration components simplify the assembly process across the WaferMate family.
The design has a specific focus to provide all of the standard feature sets customers require and is also easily adaptable to new design features required by our OEM’s to address the latest non-standard wafer handling challenges. Ultimately the system can provide enormous flexibility while still maintaining a short build schedule.
CHAD will also be demonstrating the latest WaferWare software operating system for WaferMate workcells. The WaferWare software GUI design is based upon SEMI Std E-95, and features simple to use screens for ease of operator use. The software has been developed with a focus on flexibility and ease of adapting the WaferMate workcell to new process challenges, and to reducing the software development for new applications.
Wayne Rapp, CHAD’s Vice-President of Engineering, explains the importance of the new WaferMate design and WaferWare software: “The new workcell design is important to meet the needs of our OEM customers for lower cost wafer handler systems with faster delivery time. The new WaferWare software was developed to provide a simpler, and more flexible, graphical user interface for our customers.
“The GUI design makes it more familiar to new operators, and easier for technicians to use. This is extremely important as CHAD continues to penetrate new markets and territories through our OEM customers and distributors. This combination of mechanical, controls, and software flexibility truly provides CHAD with a standard platform to handle non-standard applications.”
Microsemi launches fifth-generation CoolMOS family
IRVINE, USA: Microsemi Corp., a leading manufacturer of high performance analog mixed-signal integrated circuits, high reliability semiconductors and RF subsystems, has expanded its CoolMOS product line with eight new high voltage superjunction MOSFETs designed for highest efficiency and power density.
Designated the C6 Series, the new 600V CoolMOS devices feature fifth-generation high voltage superjunction technology for extremely low conduction and switching losses, thus enabling the design of switching systems having new levels of efficiency and power density.
The new C6 Series MOSFETs are easy to design in. They are well suited for high power, high performance switch mode applications that include power factor correction, server and telecom power systems, solar inverters, arc welding, plasma cutting, battery chargers, medical, semiconductor capital equipment and induction heating.
"With energy efficiency a primary concern for next generation system designs, our new C6 devices enable CoolMOS ease-of-use, as well as performance advantages to reduce both switching and conduction losses over our previous C3 Series technologies," said Philip Zuk, Product Marketing Manager for the discrete Power Products Group. "We see this technology as being a leader in such markets as alternative energy."
Designated the C6 Series, the new 600V CoolMOS devices feature fifth-generation high voltage superjunction technology for extremely low conduction and switching losses, thus enabling the design of switching systems having new levels of efficiency and power density.
The new C6 Series MOSFETs are easy to design in. They are well suited for high power, high performance switch mode applications that include power factor correction, server and telecom power systems, solar inverters, arc welding, plasma cutting, battery chargers, medical, semiconductor capital equipment and induction heating.
"With energy efficiency a primary concern for next generation system designs, our new C6 devices enable CoolMOS ease-of-use, as well as performance advantages to reduce both switching and conduction losses over our previous C3 Series technologies," said Philip Zuk, Product Marketing Manager for the discrete Power Products Group. "We see this technology as being a leader in such markets as alternative energy."
iPhone 4 carries BOM of $187.51: iSuppli
EL SEGUNDO, USA: The iPhone 4’s design may be radically different—but the strategy remains the same, with the latest member of the product line carrying a Bill of Materials (BOM) that should continue to generate high profit margins for Apple Inc., according to iSuppli Corp.’s Teardown Analysis service.
The 16Gbyte version of the iPhone 4 carries a BOM of $187.51, based on a preliminary cost estimate derived from a physical teardown of the product.
“Just as it did with the iPad, Apple has thrown away the electronics playbook with the iPhone 4, reaching new heights in terms of industrial design, electronics integration and user interface,” said Kevin Keller, principal analyst, teardown services, for iSuppli.
“However, the BOM of the fourth-generation model closely aligns with those of previous iPhones. With the iPhone maintaining its existing pricing, Apple will be able to maintain the prodigious margins that have allowed it to build up a colossal cash reserve—one whose size is exceeded only by Microsoft Corp.”
iSuppli estimated the BOM of the 3GS in 2009 at $170.80; the 3G in 2008 at $166.31
and the first iPhone in 2007 at $217.73.
The figure presents the results of iSuppli’s preliminary teardown estimate. Please note that the BOM accounts only for hardware costs and does not include other expenses such as manufacturing, software, marketing, distribution and royalties and licensing fees.
Source: iSuppli, USA.
Housing complex
One of the most apparent examples of the iPhone 4’s design innovation is its completely redesigned housing. Unlike the unibody housing of previous models, the iPhone 4’s enclosure is composed of multiple pieces, allowing it to accommodate a considerably larger battery as well as the much-discussed integrated antenna.
“The metal housing of the outer enclosure serves as a physical antenna, a tough task to design and manufacture because antennae pieces have to be insulated from other parts, and yet be rigid around the perimeter,” Keller said. “This adds more complexity and cost, but elegantly uses every possible cubic millimeter of the iPhone for function, and not just form. The tight intertwining of form and function is an area where Apple has always excelled.”
Less is more in wireless
The wireless subsection of the iPhone 4 is far smaller than in previous members of the line because of greatly increased integration of the Radio Frequency (RF) functionality into the core chipset components, despite the presence of an additional air standard: High-Speed Uplink Packet Access (HSUPA), which allows the uploading of bandwidth-intensive HD video.
“Out of the nearly 300 cell phones torn down by iSuppli, the iPhone comes the closest to integrating the entire wireless interface—including all the supporting Radio Frequency (RF) modules—on a single chip,” Keller said. “This further enhances the iPhone 4’s space efficiency and serves as yet another testament to the advanced state of Apple’s design.”
Design winners
The LCD display represents the single most expensive component in the iPhone 4, costing $28.50 and accounting for 15.2 percent of the product’s total BOM. The 3.5-inch display uses advanced Low-Temperature Polysilicon (LTPS) and In-Plane Switching (IPS) technology, and features a 960 by 630 resolution—four times that of the iPhone 3GS.
While the display is not labeled, iSuppli believes the most likely supplier is LG Display. Toshiba Mobile Display (TMD) also could serve as a source for the part.
The next most expensive single component is the NAND-type flash memory. In the 16Gbyte version of the iPhone 4, the NAND costs $27 and accounts for 14.4 percent of the BOM. In the individual iPhone 4 torn down by iSuppli, the NAND flash was supplied by Samsung Electronics Co. Ltd., although Apple could be employing other sources as well.
Samsung also supplies the next costliest part, the 4Gbits of mobile Double Data Rate (DDR) SDRAM, priced at $13.80, or 7.4 percent of the BOM.
Following on the value ranking is the baseband Integrated Circuit (IC), at $11.72, or 6.3 percent of the BOM. Infineon Technologies AG is the supplier of this part, iSuppli’s teardown reveals.
Next on the component cost countdown is the A4 applications processor, manufactured by Samsung but using Apple’s Intellectual Property (IP). iSuppli estimates the cost of the A4 at $10.75, or 5.7 percent of the iPhone 4’s BOM.
Other parts and suppliers
Subsequent on the cost list is the capacitive touch screen with reinforced glass, at $10.00, or 5.3 percent of the BOM. While the supplier of the touch screen is not labeled and thus cannot be determined through a teardown analysis, iSuppli believes the source is TPK and/or Balda.
The main camera on the iPhone, a 5-megapixel autofocus device, costs $9.75, and accounts for 5.2 percent of the BOM. Like the touch screen, the camera cannot be identified from a teardown.
The Wi-Fi Bluetooth controller IC, priced at $7.80 and representing 4.2 percent of the BOM, is supplied by Broadcom Corp.
Other parts in the iPhone 4 include:
* The $5.80 battery, with an unknown supplier.
* NOR flash, supplied by Intel Corp./Numonyx; and Double Data Rate (DDR) mobile DRAM, provided by Elpida Memory Inc., at a combined cost of $2.70.
* A $2.60 microelectromechanical (MEMS) gyroscope, supplied by STMicroelectronics.
* Infineon’s $2.33 quad-band GSM/Edge transceiver.
* The $2.03 main power-management IC from Dialog Semiconductor.
* A Global Positioning System (GPS) chip from Broadcom, costing $1.75.
* Texas Instruments Inc.’s touch screen controller IC, at $1.23.
* Cirrus Logic’s $1.15 audio codec.
* An e-compass from AKM Semiconductor Inc., at 70 cents.
* The accelerometer, provided by STMicroelectronics, and costing 65 cents.
Source: iSuppli, USA
The 16Gbyte version of the iPhone 4 carries a BOM of $187.51, based on a preliminary cost estimate derived from a physical teardown of the product.
“Just as it did with the iPad, Apple has thrown away the electronics playbook with the iPhone 4, reaching new heights in terms of industrial design, electronics integration and user interface,” said Kevin Keller, principal analyst, teardown services, for iSuppli.
“However, the BOM of the fourth-generation model closely aligns with those of previous iPhones. With the iPhone maintaining its existing pricing, Apple will be able to maintain the prodigious margins that have allowed it to build up a colossal cash reserve—one whose size is exceeded only by Microsoft Corp.”
iSuppli estimated the BOM of the 3GS in 2009 at $170.80; the 3G in 2008 at $166.31
and the first iPhone in 2007 at $217.73.
The figure presents the results of iSuppli’s preliminary teardown estimate. Please note that the BOM accounts only for hardware costs and does not include other expenses such as manufacturing, software, marketing, distribution and royalties and licensing fees.
Source: iSuppli, USA.Housing complex
One of the most apparent examples of the iPhone 4’s design innovation is its completely redesigned housing. Unlike the unibody housing of previous models, the iPhone 4’s enclosure is composed of multiple pieces, allowing it to accommodate a considerably larger battery as well as the much-discussed integrated antenna.
“The metal housing of the outer enclosure serves as a physical antenna, a tough task to design and manufacture because antennae pieces have to be insulated from other parts, and yet be rigid around the perimeter,” Keller said. “This adds more complexity and cost, but elegantly uses every possible cubic millimeter of the iPhone for function, and not just form. The tight intertwining of form and function is an area where Apple has always excelled.”
Less is more in wireless
The wireless subsection of the iPhone 4 is far smaller than in previous members of the line because of greatly increased integration of the Radio Frequency (RF) functionality into the core chipset components, despite the presence of an additional air standard: High-Speed Uplink Packet Access (HSUPA), which allows the uploading of bandwidth-intensive HD video.
“Out of the nearly 300 cell phones torn down by iSuppli, the iPhone comes the closest to integrating the entire wireless interface—including all the supporting Radio Frequency (RF) modules—on a single chip,” Keller said. “This further enhances the iPhone 4’s space efficiency and serves as yet another testament to the advanced state of Apple’s design.”
Design winners
The LCD display represents the single most expensive component in the iPhone 4, costing $28.50 and accounting for 15.2 percent of the product’s total BOM. The 3.5-inch display uses advanced Low-Temperature Polysilicon (LTPS) and In-Plane Switching (IPS) technology, and features a 960 by 630 resolution—four times that of the iPhone 3GS.
While the display is not labeled, iSuppli believes the most likely supplier is LG Display. Toshiba Mobile Display (TMD) also could serve as a source for the part.
The next most expensive single component is the NAND-type flash memory. In the 16Gbyte version of the iPhone 4, the NAND costs $27 and accounts for 14.4 percent of the BOM. In the individual iPhone 4 torn down by iSuppli, the NAND flash was supplied by Samsung Electronics Co. Ltd., although Apple could be employing other sources as well.
Samsung also supplies the next costliest part, the 4Gbits of mobile Double Data Rate (DDR) SDRAM, priced at $13.80, or 7.4 percent of the BOM.
Following on the value ranking is the baseband Integrated Circuit (IC), at $11.72, or 6.3 percent of the BOM. Infineon Technologies AG is the supplier of this part, iSuppli’s teardown reveals.
Next on the component cost countdown is the A4 applications processor, manufactured by Samsung but using Apple’s Intellectual Property (IP). iSuppli estimates the cost of the A4 at $10.75, or 5.7 percent of the iPhone 4’s BOM.
Other parts and suppliers
Subsequent on the cost list is the capacitive touch screen with reinforced glass, at $10.00, or 5.3 percent of the BOM. While the supplier of the touch screen is not labeled and thus cannot be determined through a teardown analysis, iSuppli believes the source is TPK and/or Balda.
The main camera on the iPhone, a 5-megapixel autofocus device, costs $9.75, and accounts for 5.2 percent of the BOM. Like the touch screen, the camera cannot be identified from a teardown.
The Wi-Fi Bluetooth controller IC, priced at $7.80 and representing 4.2 percent of the BOM, is supplied by Broadcom Corp.
Other parts in the iPhone 4 include:
* The $5.80 battery, with an unknown supplier.
* NOR flash, supplied by Intel Corp./Numonyx; and Double Data Rate (DDR) mobile DRAM, provided by Elpida Memory Inc., at a combined cost of $2.70.
* A $2.60 microelectromechanical (MEMS) gyroscope, supplied by STMicroelectronics.
* Infineon’s $2.33 quad-band GSM/Edge transceiver.
* The $2.03 main power-management IC from Dialog Semiconductor.
* A Global Positioning System (GPS) chip from Broadcom, costing $1.75.
* Texas Instruments Inc.’s touch screen controller IC, at $1.23.
* Cirrus Logic’s $1.15 audio codec.
* An e-compass from AKM Semiconductor Inc., at 70 cents.
* The accelerometer, provided by STMicroelectronics, and costing 65 cents.
Source: iSuppli, USA
Broadcom CEO Scott McGregor elected to Ingram Micro board of directors
SANTA ANA, USA: Ingram Micro Inc., the world's largest technology distributor, has announced that its board of directors elected Scott A. McGregor, president and chief executive officer of Broadcom Corp., to serve as an independent director effective June 25, 2010.
"As the leader of one of the most respected semiconductor companies in the technology industry, Scott will be an excellent addition to the board," said Dale R. Laurance, chairman of the board, Ingram Micro Inc. "Ingram Micro will benefit from his nearly 30 years of technology experience, ranging from software development to semiconductor design, as well as his valuable expertise as a corporate CEO and director. We look forward to his leadership and counsel."
In his current role at Broadcom, McGregor is the top executive and a board director for the global leader in semiconductors for wired and wireless communications, generating $4.5 billion in 2009 revenues with 7,400 employees worldwide. He joined Broadcom in January 2005 after serving as the president and CEO of Philips Semiconductor, a $6-billion subsidiary of the Netherlands-based Royal Philips Electronics.
His seven-year tenure at Philips began as the head of the subsidiary's Emerging Business unit, which focused on the rapidly growing market for smart cards, networking, digital media and radio-frequency identification (RFID). Prior to Philips, McGregor was senior vice president and general manager of Santa Cruz Operation Inc., a provider of network computing solutions, and served in senior management positions at Digital Equipment Corp., Microsoft Corp. and Xerox Corp.
McGregor received a Bachelor's of Arts degree in psychology and a master's degree in computer science and computer engineering from Stanford University.
"As the leader of one of the most respected semiconductor companies in the technology industry, Scott will be an excellent addition to the board," said Dale R. Laurance, chairman of the board, Ingram Micro Inc. "Ingram Micro will benefit from his nearly 30 years of technology experience, ranging from software development to semiconductor design, as well as his valuable expertise as a corporate CEO and director. We look forward to his leadership and counsel."
In his current role at Broadcom, McGregor is the top executive and a board director for the global leader in semiconductors for wired and wireless communications, generating $4.5 billion in 2009 revenues with 7,400 employees worldwide. He joined Broadcom in January 2005 after serving as the president and CEO of Philips Semiconductor, a $6-billion subsidiary of the Netherlands-based Royal Philips Electronics.
His seven-year tenure at Philips began as the head of the subsidiary's Emerging Business unit, which focused on the rapidly growing market for smart cards, networking, digital media and radio-frequency identification (RFID). Prior to Philips, McGregor was senior vice president and general manager of Santa Cruz Operation Inc., a provider of network computing solutions, and served in senior management positions at Digital Equipment Corp., Microsoft Corp. and Xerox Corp.
McGregor received a Bachelor's of Arts degree in psychology and a master's degree in computer science and computer engineering from Stanford University.
Conexant and Nu Horizons announce design wins for audio-enabled products
NEWPORT BEACH, USA: Conexant Systems Inc., a leading supplier of innovative semiconductor solutions for imaging, audio, embedded modem, and video surveillance applications, and Nu Horizons Electronics Corp., a leading global distributor of advanced technology semiconductors, display, illumination, power, system, and telecom solutions, have jointly secured multiple audio design-wins for intercoms, kiosks, and home automation applications.
These new products are all based on Conexant’s family of award-winning speakers-on-a-chip audio solutions, which feature proprietary technical innovations that significantly improve audio and voice quality.
“In the growing embedded audio segment, we leverage our extensive expertise in audio and voice algorithms to deliver high-performance solutions for products that require audio and voice functionality,” said Lou Ganci, vice president of Americas sales for Conexant. “Collaborating with Nu Horizons’ sales and technical teams during the last year has allowed us to penetrate a broader customer base in this emerging segment, and respond more quickly to customer requests. We will continue to concentrate on capturing new platforms with Nu Horizons, and building on the success we have achieved to date.”
“Helping our customers get to market faster with better, more cost-effective solutions is a top priority for us,” said Rita Megling, senior vice president of marketing for Nu Horizons. “Working with the Conexant team ensures our customers have the semiconductor solutions and support required to maximize the success of their products.”
Conexant’s highly integrated speakers-on-a-chip audio solutions include an integrated digital audio/voice processor multi-bit codec, digital and analog input/output interfaces, and a Class-D amplifier to drive stereo speakers or optional pulse-width modulation and differential line-out for external speaker system amplifiers.
These innovative devices are targeted at growing audio opportunities in intercoms, kiosks, multimedia IP phones, personal navigation devices, portable media players, and mobile Internet devices. The speakers-on-a-chip devices are also well-suited for products including PC speaker systems, audio headsets, and voice-over-IP telephony applications. The audio chips are offered in a wide variety of configurations and, depending on the feature-set, support advanced features including:
BrightSound: A comprehensive suite of parametric equalization, dynamic range compression, and digital crossover algorithms that optimize speaker frequency response, boost loudness without clipping, and match speakers for up to 2.5 watt channel configuration.
Sub-band acoustic and line echo cancellation: Eliminates speaker-to-microphone feedback and echo from twisted-pair crossover, and enables the capture of a broader range of voice signals resulting in more natural sounding speech.
Noise reduction: Suppresses ambient near- and far-end sound, which improves voice clarity by eliminating interfering speech and background noise.
Nu Horizons is Conexant’s exclusive distributor in North America and Mexico. The company distributes Conexant’s entire line of imaging, audio, embedded modem, and video surveillance devices, as well as complete evaluation kits and reference designs to further simplify and speed product design-efforts.
These new products are all based on Conexant’s family of award-winning speakers-on-a-chip audio solutions, which feature proprietary technical innovations that significantly improve audio and voice quality.
“In the growing embedded audio segment, we leverage our extensive expertise in audio and voice algorithms to deliver high-performance solutions for products that require audio and voice functionality,” said Lou Ganci, vice president of Americas sales for Conexant. “Collaborating with Nu Horizons’ sales and technical teams during the last year has allowed us to penetrate a broader customer base in this emerging segment, and respond more quickly to customer requests. We will continue to concentrate on capturing new platforms with Nu Horizons, and building on the success we have achieved to date.”
“Helping our customers get to market faster with better, more cost-effective solutions is a top priority for us,” said Rita Megling, senior vice president of marketing for Nu Horizons. “Working with the Conexant team ensures our customers have the semiconductor solutions and support required to maximize the success of their products.”
Conexant’s highly integrated speakers-on-a-chip audio solutions include an integrated digital audio/voice processor multi-bit codec, digital and analog input/output interfaces, and a Class-D amplifier to drive stereo speakers or optional pulse-width modulation and differential line-out for external speaker system amplifiers.
These innovative devices are targeted at growing audio opportunities in intercoms, kiosks, multimedia IP phones, personal navigation devices, portable media players, and mobile Internet devices. The speakers-on-a-chip devices are also well-suited for products including PC speaker systems, audio headsets, and voice-over-IP telephony applications. The audio chips are offered in a wide variety of configurations and, depending on the feature-set, support advanced features including:
BrightSound: A comprehensive suite of parametric equalization, dynamic range compression, and digital crossover algorithms that optimize speaker frequency response, boost loudness without clipping, and match speakers for up to 2.5 watt channel configuration.
Sub-band acoustic and line echo cancellation: Eliminates speaker-to-microphone feedback and echo from twisted-pair crossover, and enables the capture of a broader range of voice signals resulting in more natural sounding speech.
Noise reduction: Suppresses ambient near- and far-end sound, which improves voice clarity by eliminating interfering speech and background noise.
Nu Horizons is Conexant’s exclusive distributor in North America and Mexico. The company distributes Conexant’s entire line of imaging, audio, embedded modem, and video surveillance devices, as well as complete evaluation kits and reference designs to further simplify and speed product design-efforts.
ISMI ESH experts present industry data on energy and resource conservation for sustainable manufacturing
HSINCHU, TAIWAN: In the effort to conserve energy resources and reduce costs of semiconductor manufacturing operations, ISMI Environment, Safety & Health (ESH) experts reported on energy efficient strategies, addressing both fab facilities and processing equipment for semiconductor manufacturing operations at the International High Technology Environment, Safety and Health Conference (IHTESH) on June 20- 24, 2010 in Hsinchu, Taiwan. The IHTESH is a multi-industry conference, attended by Semiconductor, PV, LED and TFT-LCD industries as well as government.
Researchers at ISMI’s ESH Technology Center are focusing on new ways to recycle and reuse products both internally and externally while decreasing the amount of new materials needed for manufacturing. ISMI presentations at IHTESH outlined green building technologies and design, idle mode energy reduction methodology and process results, and approaches to development of key environmental performance indicators (KEPIs).
In an opening-day keynote speech ISMI’s director, Joe Draina, outlined a historical perspective of ISMI initiatives and semiconductor ESH challenges ahead. Draina noted that in the next five years, some of the “same” ESH issues will continue, such as compliance with existing regulations, reduction of harmful fab emissions, and conservation of energy, water and chemical resources.
Draina acknowledged that although semiconductor manufacturers have different needs, to effectively reduce ESH impacts manufacturers need to engage in cooperative projects to pursue a wide range of initiatives for sustainable manufacturing, industry environmental standards and green practices. In conclusion, Draina highlighted ISMI’s ESH Center and its key role in continuing to lead and drive the industry’s ESH efforts.
Additionally, in a series of three presentations, a team of ISMI ESH experts addressed the semiconductor-specific processes and energy reduction strategies, including:
Benefits to implementation of potential credit towards LEED certification. LEED is a rating system developed by the United States Green Building Council (USGBC) that has emerged as the de facto approach to green building certification. Recognizing the critical importance of proactive environmental design for its members’ fabs, ISMI reported on the development of fab-specific environmental performance criteria, including green building guidance for designers and operators of fabs.
Process equipment energy reduction efforts have also focused on characterizing process equipment energy use during idle and processing modes, and demonstrating a low utility consumption idle mode for vacuum pumps and point-of-use abatement systems. The process equipment energy studies include the application of the SEMI S23 standard - A Guide for Conservation of Energy, Utilities and Materials Used by Semiconductor Manufacturing Equipment.
One of the steps needed to advance energy reduction efforts was to develop a set of environmental performance indicators that quantify the key environmental impacts associated with the manufacture, use, and disposal of a product. ISMI reported a status on a set of KEPIs that quantitatively measures the environmental impact of semiconductor products. The KEPIs capture global warming, water use, chemical use, and waste generation impacts. When applied, they will provide the industry with a consistent set of product key environmental performance indicators.
For over a decade, the ESH Energy program at SEMATECH/ISMI has characterized energy consumption in semiconductor facilities at both the fab and process level. To further dedicate itself to providing green technology solutions that lead to reduced energy consumption, ISMI formed the EHS Technology Center in 2009. The Center provides a broad-based, collaborative platform for developing better environmental practices for the industry, with goals of increasing efficiency and reducing costs in semiconductor operations.
Researchers at ISMI’s ESH Technology Center are focusing on new ways to recycle and reuse products both internally and externally while decreasing the amount of new materials needed for manufacturing. ISMI presentations at IHTESH outlined green building technologies and design, idle mode energy reduction methodology and process results, and approaches to development of key environmental performance indicators (KEPIs).
In an opening-day keynote speech ISMI’s director, Joe Draina, outlined a historical perspective of ISMI initiatives and semiconductor ESH challenges ahead. Draina noted that in the next five years, some of the “same” ESH issues will continue, such as compliance with existing regulations, reduction of harmful fab emissions, and conservation of energy, water and chemical resources.
Draina acknowledged that although semiconductor manufacturers have different needs, to effectively reduce ESH impacts manufacturers need to engage in cooperative projects to pursue a wide range of initiatives for sustainable manufacturing, industry environmental standards and green practices. In conclusion, Draina highlighted ISMI’s ESH Center and its key role in continuing to lead and drive the industry’s ESH efforts.
Additionally, in a series of three presentations, a team of ISMI ESH experts addressed the semiconductor-specific processes and energy reduction strategies, including:
Benefits to implementation of potential credit towards LEED certification. LEED is a rating system developed by the United States Green Building Council (USGBC) that has emerged as the de facto approach to green building certification. Recognizing the critical importance of proactive environmental design for its members’ fabs, ISMI reported on the development of fab-specific environmental performance criteria, including green building guidance for designers and operators of fabs.
Process equipment energy reduction efforts have also focused on characterizing process equipment energy use during idle and processing modes, and demonstrating a low utility consumption idle mode for vacuum pumps and point-of-use abatement systems. The process equipment energy studies include the application of the SEMI S23 standard - A Guide for Conservation of Energy, Utilities and Materials Used by Semiconductor Manufacturing Equipment.
One of the steps needed to advance energy reduction efforts was to develop a set of environmental performance indicators that quantify the key environmental impacts associated with the manufacture, use, and disposal of a product. ISMI reported a status on a set of KEPIs that quantitatively measures the environmental impact of semiconductor products. The KEPIs capture global warming, water use, chemical use, and waste generation impacts. When applied, they will provide the industry with a consistent set of product key environmental performance indicators.
For over a decade, the ESH Energy program at SEMATECH/ISMI has characterized energy consumption in semiconductor facilities at both the fab and process level. To further dedicate itself to providing green technology solutions that lead to reduced energy consumption, ISMI formed the EHS Technology Center in 2009. The Center provides a broad-based, collaborative platform for developing better environmental practices for the industry, with goals of increasing efficiency and reducing costs in semiconductor operations.
Microchip PIC MCUs integrate USB and large RAM
CHANDLER, USA: Microchip Technology Inc., a leading provider of microcontroller, analog and Flash-IP solutions, announced the four-member PIC24FJ256GB210 microcontroller family, which integrates USB for Embedded Host/Peripheral/On-the-Go and 96 Kbytes of RAM.
This large RAM enables the buffering of sizeable amounts of data and better overall throughput, for applications such as Ethernet connectivity, remote sensing, data logging and audio streaming. It can also be used to store generated images or data for dynamic content, such as real-time, remote sensor data graphs. In combination with Microchip’s free USB software library and TCP/IP stack, these MCUs lower system costs and footprints in a broad range of industrial, instrumentation/measurement, medical and consumer applications.
The requirements for embedded designs are rapidly expanding, including the widespread and growing adoption of connectivity and the ability to buffer large amounts of data. At the same time, the pressure to reduce cost and size is constant. Microchip integrates a USB peripheral and large amounts of RAM into a single microcontroller as small as 64 pins, along with Peripheral Pin Select to provide designers the flexibility to remap digital I/O pins.
Additional peripherals include 24 channels of mTouch capacitive touch sensing, along with a free touch software library, and the 16-bit Enhanced Parallel Master/Slave Port, which enables wider peripheral selection and improved bandwidth when connecting to off-chip resources.
“Microchip doesn’t stop at providing embedded designers with high levels of microcontroller integration and performance—we also help them get to market quickly via industry-leading software support and configuration tools, training and development boards,” said Mitch Obolsky, vice president of Microchip’s Advanced Microcontroller Architecture Division.
“Maximum flexibility is ensured by Microchip’s unparalleled migration strategy, which allows designers to move among our large portfolio of 8/16/32-bit PIC microcontrollers through code compatibility and one universal MPLAB integrated development environment.”
Development tools
This new microcontroller family easily integrates into Microchip’s long-standing, modular development-board system. A new $25 PIC24FJ256GB210 Plug-in Module (part #MA240021) is available today, which readily connects to the proven Explorer 16 Modular Development Board and its companion USB PICtail Plus daughter card.
All four members of the PIC24FJ256GB210 16-bit microcontroller family are available today for general sampling and volume production, starting at $4.10 each in 10,000-unit quantities. The PIC24FJ128GB206 and PIC24FJ256GB206 come in 64-pin TQFP and QFN packages, while the PIC24FJ128GB210 and PIC24FJ256GB210 are available in 100-pin TQFP and 121-pin BGA packages.
This large RAM enables the buffering of sizeable amounts of data and better overall throughput, for applications such as Ethernet connectivity, remote sensing, data logging and audio streaming. It can also be used to store generated images or data for dynamic content, such as real-time, remote sensor data graphs. In combination with Microchip’s free USB software library and TCP/IP stack, these MCUs lower system costs and footprints in a broad range of industrial, instrumentation/measurement, medical and consumer applications.
The requirements for embedded designs are rapidly expanding, including the widespread and growing adoption of connectivity and the ability to buffer large amounts of data. At the same time, the pressure to reduce cost and size is constant. Microchip integrates a USB peripheral and large amounts of RAM into a single microcontroller as small as 64 pins, along with Peripheral Pin Select to provide designers the flexibility to remap digital I/O pins.
Additional peripherals include 24 channels of mTouch capacitive touch sensing, along with a free touch software library, and the 16-bit Enhanced Parallel Master/Slave Port, which enables wider peripheral selection and improved bandwidth when connecting to off-chip resources.
“Microchip doesn’t stop at providing embedded designers with high levels of microcontroller integration and performance—we also help them get to market quickly via industry-leading software support and configuration tools, training and development boards,” said Mitch Obolsky, vice president of Microchip’s Advanced Microcontroller Architecture Division.
“Maximum flexibility is ensured by Microchip’s unparalleled migration strategy, which allows designers to move among our large portfolio of 8/16/32-bit PIC microcontrollers through code compatibility and one universal MPLAB integrated development environment.”
Development tools
This new microcontroller family easily integrates into Microchip’s long-standing, modular development-board system. A new $25 PIC24FJ256GB210 Plug-in Module (part #MA240021) is available today, which readily connects to the proven Explorer 16 Modular Development Board and its companion USB PICtail Plus daughter card.
All four members of the PIC24FJ256GB210 16-bit microcontroller family are available today for general sampling and volume production, starting at $4.10 each in 10,000-unit quantities. The PIC24FJ128GB206 and PIC24FJ256GB206 come in 64-pin TQFP and QFN packages, while the PIC24FJ128GB210 and PIC24FJ256GB210 are available in 100-pin TQFP and 121-pin BGA packages.
BEST reports improved in-field critical current performance of second gen high-temperature superconductor YBCO tapes
HANAU, GERMANY: Bruker Energy & Supercon Technologies, Inc. (BEST) has reported in-field high magnetic field test results for its second-generation (2G) high temperature superconductor (HTS) tape, demonstrating enhanced performance as a result of improvements to its proprietary manufacturing technology.
Recently, the 2G HTS coated conductors (YBCO material) produced by BEST have achieved a new record critical current of 1,925 Amperes (A) in a 4 millimeter (mm) wide tape tested at a temperature of 4.2 Kelvin (K) in an 18 Tesla (T) magnetic field parallel to the tape surface.
This current corresponds to 4,810 A per cm-width and a superconductor current density of 27 MA/cm2. With a perpendicular field orientation, the critical current reached 1,000 A in a 7 T magnetic field, and 732 A in a 10 T field. These critical current test results were verified in collaboration with the high magnetic field test laboratory at the Karlsruhe Institute of Technology (KIT), Germany.
Dr. Alexander Usoskin, R&D Manager for 2G HTS materials and superconducting fault current limiters (SFCL) at BEST, commented: “We believe these new critical current test values are more than twice the highest critical currents previously observed in 4 mm wide HTS coated conductors in such magnetic fields. The results were obtained from 5 to 10 meter long tapes that we consider to be representative samples of our large scale YBCO manufacturing process. With our new proprietary deposition technique based on multi-beam pulsed laser deposition, the manufacturing of such ‘high-field’ HTS tapes is now feasible, and we also expect these processes to be more robust for increasing processing yields.”
Dr. Klaus Schlenga, CTO at BEST, added: “These in-field critical current test results are especially impressive since the high current capacity is accompanied by high intrinsic mechanical tape strength, without the need for any additional reinforcement, for example with steel tapes. Significantly improved in-field performance should positively influence high magnetic field applications that are tightly linked to the technical critical current density of the YBCO superconductor, such as superconducting dipole magnets, Nuclear Magnetic Resonance (NMR) ultra-high field superconducting magnets, and other new superconducting magnet designs in energy research.”
Professor Dr. Mathias Noe, Director of the Institute for Technical Physics of the Karlsruhe Institute for Technology (KIT), said: “We are glad to confirm the measured data with BEST HTS tapes. Our HOMER high field test facility allows high resolution measurements of critical currents in a fully superconducting magnet up to 20 T, and our plans are to go for even higher fields in the future with HTS tapes. The measured tapes are particularly strong candidates for such a high field insert. These improved critical current test results are another highlight in our long-lasting partnership with BEST in various fields of applied superconductivity.”
Recently, the 2G HTS coated conductors (YBCO material) produced by BEST have achieved a new record critical current of 1,925 Amperes (A) in a 4 millimeter (mm) wide tape tested at a temperature of 4.2 Kelvin (K) in an 18 Tesla (T) magnetic field parallel to the tape surface.
This current corresponds to 4,810 A per cm-width and a superconductor current density of 27 MA/cm2. With a perpendicular field orientation, the critical current reached 1,000 A in a 7 T magnetic field, and 732 A in a 10 T field. These critical current test results were verified in collaboration with the high magnetic field test laboratory at the Karlsruhe Institute of Technology (KIT), Germany.
Dr. Alexander Usoskin, R&D Manager for 2G HTS materials and superconducting fault current limiters (SFCL) at BEST, commented: “We believe these new critical current test values are more than twice the highest critical currents previously observed in 4 mm wide HTS coated conductors in such magnetic fields. The results were obtained from 5 to 10 meter long tapes that we consider to be representative samples of our large scale YBCO manufacturing process. With our new proprietary deposition technique based on multi-beam pulsed laser deposition, the manufacturing of such ‘high-field’ HTS tapes is now feasible, and we also expect these processes to be more robust for increasing processing yields.”
Dr. Klaus Schlenga, CTO at BEST, added: “These in-field critical current test results are especially impressive since the high current capacity is accompanied by high intrinsic mechanical tape strength, without the need for any additional reinforcement, for example with steel tapes. Significantly improved in-field performance should positively influence high magnetic field applications that are tightly linked to the technical critical current density of the YBCO superconductor, such as superconducting dipole magnets, Nuclear Magnetic Resonance (NMR) ultra-high field superconducting magnets, and other new superconducting magnet designs in energy research.”
Professor Dr. Mathias Noe, Director of the Institute for Technical Physics of the Karlsruhe Institute for Technology (KIT), said: “We are glad to confirm the measured data with BEST HTS tapes. Our HOMER high field test facility allows high resolution measurements of critical currents in a fully superconducting magnet up to 20 T, and our plans are to go for even higher fields in the future with HTS tapes. The measured tapes are particularly strong candidates for such a high field insert. These improved critical current test results are another highlight in our long-lasting partnership with BEST in various fields of applied superconductivity.”
PLX sampling industry’s highest-performance USB SuperSpeed 3.0 controllers
SUNNYVALE, USA: PLX Technology Inc., a leader in connectivity solutions for the data center and the home, announced the sampling of three new USB SuperSpeed 3.0-to-SATA controllers targeting the rapidly expanding consumer storage market.
The new PLX trio includes the OXU3102, OXU3101 and OXU3100, which provide the highest performance of direct attached storage (DAS) products using the emerging USB SuperSpeed standard. USB SuperSpeed-enabled external storage peripherals are expected to drive the considerable demand for this new high-speed connectivity among PCs and peripherals.
PLX’s new OXU3102 DAS controller, the flagship member of the family, targets the “prosumer” (professional- and power-consumer) market segment and combines USB SuperSpeed’s 5Gbps interface with dual high-speed SATA hard disk drive (HDD) ports. The midrange OXU3101 for portable computing and desktops offers the same features but bridges to a single SATA HDD.
Both the OXU3102 and OXU3101 feature integrated AES-256 encryption/decryption capabilities to ensure the highest level of data security. The entry-level OXU3100 provides the essential features for basic SuperSpeed-to-SATA designs.
Industry-leading performance is exemplified with the OXU3101, which is 8MB/s faster than the closest solution for single-disk systems. All three devices are strengthened with support for USB Attached SCSI (UAS), which helps deliver up to 35 percent faster performance.
The OXU3102 is capable of saturating the USB 3.0 link, thanks to hardware RAID 0 (or disk striping) where the data is split across the HDDs, and each HDD is accessed in turn to maximize throughput and reduce bottlenecks. Up to 27 integrated general-purpose I/O (GPIO) ports allow designers to easily customize their products and differentiate them with new features.
The silicon is brought to life with feature-rich firmware and best-in-class host applications. PLX’s robust firmware enables OEMs to launch products with features that consumers find truly compelling. This includes an intelligent power management feature, which reduces power consumption according to usage where the device core will turn off to match the PC’s sleep and hibernation states. This environmentally friendly asset meets the latest European power recommendations.
Another powerful feature for encryption systems is auto-install, where the password application can be stored on the HDD, thus freeing the consumer to use multiple PCs without having to find the CD that originally shipped with the product.
As with all PLX DAS solutions, the new controllers are supported by a comprehensive support package that includes evaluation boards, reference designs, software development kit (SDK) and, for the first time, PLX’s exclusive ISIS-branded toolkit.
The ISIS toolkit provides designers with easy access to device and firmware configurations, thus simplifying encryption settings, RAID configuration, power settings, and HDD monitoring – all creating a self-contained virtual help desk. In addition, the ISIS toolkit includes an end-user tool called Gateway for simple administration of passwords in secure systems -- as well as a single-click “in-field” firmware update utility.
“With more than 14 years of experience in USB development, PLX is dramatically expanding the options for designers needing USB support with the latest incarnation in SuperSpeed 3.0 performance,” said David Raun, PLX vice president of marketing and business development.
“The consumer storage market is quickly migrating to USB 3.0, since it is significantly faster, while both maintaining backward compatibility with USB 2.0 and minimizing additional costs. We are seeing very good traction for our USB 3.0 products not only in storage designs, but also across other consumer designs, as well as the enterprise business segments, as we expand our product portfolio.”
The OXU310x family is priced from $1.50 to $3.00 in large volumes. The products are sampling today and will be in full production in late Q3’10.
The new PLX trio includes the OXU3102, OXU3101 and OXU3100, which provide the highest performance of direct attached storage (DAS) products using the emerging USB SuperSpeed standard. USB SuperSpeed-enabled external storage peripherals are expected to drive the considerable demand for this new high-speed connectivity among PCs and peripherals.
PLX’s new OXU3102 DAS controller, the flagship member of the family, targets the “prosumer” (professional- and power-consumer) market segment and combines USB SuperSpeed’s 5Gbps interface with dual high-speed SATA hard disk drive (HDD) ports. The midrange OXU3101 for portable computing and desktops offers the same features but bridges to a single SATA HDD.
Both the OXU3102 and OXU3101 feature integrated AES-256 encryption/decryption capabilities to ensure the highest level of data security. The entry-level OXU3100 provides the essential features for basic SuperSpeed-to-SATA designs.
Industry-leading performance is exemplified with the OXU3101, which is 8MB/s faster than the closest solution for single-disk systems. All three devices are strengthened with support for USB Attached SCSI (UAS), which helps deliver up to 35 percent faster performance.
The OXU3102 is capable of saturating the USB 3.0 link, thanks to hardware RAID 0 (or disk striping) where the data is split across the HDDs, and each HDD is accessed in turn to maximize throughput and reduce bottlenecks. Up to 27 integrated general-purpose I/O (GPIO) ports allow designers to easily customize their products and differentiate them with new features.
The silicon is brought to life with feature-rich firmware and best-in-class host applications. PLX’s robust firmware enables OEMs to launch products with features that consumers find truly compelling. This includes an intelligent power management feature, which reduces power consumption according to usage where the device core will turn off to match the PC’s sleep and hibernation states. This environmentally friendly asset meets the latest European power recommendations.
Another powerful feature for encryption systems is auto-install, where the password application can be stored on the HDD, thus freeing the consumer to use multiple PCs without having to find the CD that originally shipped with the product.
As with all PLX DAS solutions, the new controllers are supported by a comprehensive support package that includes evaluation boards, reference designs, software development kit (SDK) and, for the first time, PLX’s exclusive ISIS-branded toolkit.
The ISIS toolkit provides designers with easy access to device and firmware configurations, thus simplifying encryption settings, RAID configuration, power settings, and HDD monitoring – all creating a self-contained virtual help desk. In addition, the ISIS toolkit includes an end-user tool called Gateway for simple administration of passwords in secure systems -- as well as a single-click “in-field” firmware update utility.
“With more than 14 years of experience in USB development, PLX is dramatically expanding the options for designers needing USB support with the latest incarnation in SuperSpeed 3.0 performance,” said David Raun, PLX vice president of marketing and business development.
“The consumer storage market is quickly migrating to USB 3.0, since it is significantly faster, while both maintaining backward compatibility with USB 2.0 and minimizing additional costs. We are seeing very good traction for our USB 3.0 products not only in storage designs, but also across other consumer designs, as well as the enterprise business segments, as we expand our product portfolio.”
The OXU310x family is priced from $1.50 to $3.00 in large volumes. The products are sampling today and will be in full production in late Q3’10.
Cortina announces industry's smallest quad 10G EDC device
SUNNYVALE, USA: Cortina Systems Inc. (Cortina), delivering innovative technologies that link people and networks worldwide, announced CS4340, the industry’s smallest quad 10G Electronic Dispersion Compensation (EDC) device.
The Cortina CS4340 is a programmable 4-port SFP+ PHY with integrated EDC and is available in a small 15 mm x 15 mm BGA package that optimizes system design options. Its density and performance enables 48-port 10G or 12-port 40G line cards supporting both optical and copper links and compliant to the industry standards.
Like the previous 2 generations of Cortina EDC devices, the CS4340 PHY maximizes datacenter, server, and switching efficiency with its low power, low latency implementation of the PHY functionality. Due to its hybrid DSP analog architecture, the CS4340 PHY has latency of less than 1 nsec. Competing solutions can be anywhere from 80 to 240 nsec.
The CS4340 PHY versatile design and industry leading performance with full compliance to industry standards allows it to be used in either a standalone operation or programmed to optimize application specific performance and power.
Its interoperability has been proven at industry plugfest, such as Ethernet Alliance’s SFP+ Direct Attach Copper interoperability tests performed at UNH-IOL. By exceeding the industry’s standards requirements, the CS4340 PHY increases application margins and link distances.
“EDC enabled 10G and 40G links are now a reality; system architects need standard compliant devices that can be deployed in datacenter switches, core routers, and KR Backplanes,” said Scott Feller, product line director at Cortina. “With our proven industry leading solution, standards compliance, and small form factor, the CS4340 PHY meets these needs and enables a single system design that addresses the complete spectrum of applications.”
The CS4340 PHY functionality supports four full duplex 10G links. Both transmit and receive paths include Clock and Data Recovery (CDR) circuits. The device has a wide operating frequency range covering 1GbE, 1G FC, 2G FC, 4G FC, 8G FC, SONET (9.5 – 11.3G), and 10GbE. EDC capability allows the device to operate with linear SFP+ optical modules to support 10Gbase-LRM and Direct Attach Copper.
The transmit path includes a 10Gbase-KR compliant 3 tap transmit pre-emphasis capability. The transmit pre-emphasis in conjunction with the receive EDC enables the device to support 10Gbase-KR, 8G FC and telecom backplane applications. The device is fully autonomous and does not require external processors to control the initial convergence or the dynamic adaption of the dispersion compensation. In addition, the device includes extensive debug features and I/Os for device monitoring and control.
The Cortina CS4214 is a low power variant of the CS4340 PHY targeted to 10G SR/LR SFP+ line card, and 10G/40G Clock and Data Recovery (CDR) applications. The device contains all the features included in the CS4340 PHY. The SFI equalizer on the CS4214 PHY is capable of compensating loss introduced by the module connector and host board trace.
The CS4214 PHY is complaint to SFF8431 limited interface and IEEE 802.3ba nPPI specifications. It enables 10G SR/LR SFP+, 40GBase-SR4/LR4 CFP and QSFP modules.
The Cortina CS4340 and CS4214 are sampling. Pricing is available upon request.
The Cortina CS4340 is a programmable 4-port SFP+ PHY with integrated EDC and is available in a small 15 mm x 15 mm BGA package that optimizes system design options. Its density and performance enables 48-port 10G or 12-port 40G line cards supporting both optical and copper links and compliant to the industry standards.
Like the previous 2 generations of Cortina EDC devices, the CS4340 PHY maximizes datacenter, server, and switching efficiency with its low power, low latency implementation of the PHY functionality. Due to its hybrid DSP analog architecture, the CS4340 PHY has latency of less than 1 nsec. Competing solutions can be anywhere from 80 to 240 nsec.
The CS4340 PHY versatile design and industry leading performance with full compliance to industry standards allows it to be used in either a standalone operation or programmed to optimize application specific performance and power.
Its interoperability has been proven at industry plugfest, such as Ethernet Alliance’s SFP+ Direct Attach Copper interoperability tests performed at UNH-IOL. By exceeding the industry’s standards requirements, the CS4340 PHY increases application margins and link distances.
“EDC enabled 10G and 40G links are now a reality; system architects need standard compliant devices that can be deployed in datacenter switches, core routers, and KR Backplanes,” said Scott Feller, product line director at Cortina. “With our proven industry leading solution, standards compliance, and small form factor, the CS4340 PHY meets these needs and enables a single system design that addresses the complete spectrum of applications.”
The CS4340 PHY functionality supports four full duplex 10G links. Both transmit and receive paths include Clock and Data Recovery (CDR) circuits. The device has a wide operating frequency range covering 1GbE, 1G FC, 2G FC, 4G FC, 8G FC, SONET (9.5 – 11.3G), and 10GbE. EDC capability allows the device to operate with linear SFP+ optical modules to support 10Gbase-LRM and Direct Attach Copper.
The transmit path includes a 10Gbase-KR compliant 3 tap transmit pre-emphasis capability. The transmit pre-emphasis in conjunction with the receive EDC enables the device to support 10Gbase-KR, 8G FC and telecom backplane applications. The device is fully autonomous and does not require external processors to control the initial convergence or the dynamic adaption of the dispersion compensation. In addition, the device includes extensive debug features and I/Os for device monitoring and control.
The Cortina CS4214 is a low power variant of the CS4340 PHY targeted to 10G SR/LR SFP+ line card, and 10G/40G Clock and Data Recovery (CDR) applications. The device contains all the features included in the CS4340 PHY. The SFI equalizer on the CS4214 PHY is capable of compensating loss introduced by the module connector and host board trace.
The CS4214 PHY is complaint to SFF8431 limited interface and IEEE 802.3ba nPPI specifications. It enables 10G SR/LR SFP+, 40GBase-SR4/LR4 CFP and QSFP modules.
The Cortina CS4340 and CS4214 are sampling. Pricing is available upon request.
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