Arasan Chip Systems' participation at IP & ESC'09

SAN JOSE, USA: Arasan Chip Systems Inc., a leading provider of Total Intellectual Property (IP) Solutions, concluded its participation in the recent IP-ESC 2009 (IP-Embedded Systems Conference) in Grenoble France, where speakers confirmed the need for Semiconductor IP companies to provide a Total IP Solution for SoC designs.

Participating in the well attended panel titled "Total IP Solutions for Enabling Technology Adoption", Ram Gopalan, Senior Director of Marketing at Arasan emphasized the scope of IP collateral being provided by Arasan that enables technology adoption for today's increasingly complex interconnects.

Responding to a question on IP customization, Ram said: "A cookie-cutter approach to IP rarely works as customers require an IP tuned to their SoC architecture. Arasan provides such customization services to help SoC teams realize the true benefit of their IP based design methodology."

The panel examined all components required to integrate an IP into a SoC-synthesizable RTL IP, verification IPs, software drivers and stacks, hardware development kits and design services for customization. Arasan, nSys and Cadence provided the vendor perspective and representative from ST Ericsson, provided the designer's perspective of the benefit of the total solution.

"At the well attended IP & ESC'09, the growing importance of providing complete IP solutions was confirmed as the next stage in the evolution of the semiconductor IP industry," said Gabriele Saucier, Chairperson and CEO of Design & Reuse and organizer of IP & ESC '09. "Arasan provided further evidence of this trend in their panel and paper presentations."

Presenters observed that on some SoCs, as much as 85 percent of silicon real estate is made up of third-party IP with a large percentage dedicated to peripheral interface IP - SD, SDIO, USB, and MIPI.

Arasan was well represented in focused sessions as well. In the session - Analog Design, Ignatius Bezzam, Senior Director, Analog and Mixed Signal Division at Arasan presented "Design Methodology using Verilog Models", emphasizing the importance of early modeling and architectural analysis of Analog IP, leveraged to improve the quality of the physical IP implementation.

During the IP Business Model & Standardization session, Somnath Viswanath, Product Marketing Manager at Arasan presented "MIPI Alliance - Fostering Innovation with Standardized Interconnect" in which he highlighted the collateral assisting the rapid adoption of MIPI® interfaces using Arasan's SLIMBus IP portfolio as a case study.

Involved from the early days of MIPI's standardization effort, Arasan is a leading provider of MIPI IP with a portfolio encompassing controllers, PHYs, software stacks and analyzers. Participating in the session - Forum on Design, Somnath presented "Evolving to a Total IP Solution to Accelerate SoC Design", where he showed the evolution of SoC design to its current state on relying on a one stop shop for sourcing semiconductor IP collateral, thereby reducing design risk and time to market.