ACTON, USA: MediaTek Inc., a leading fabless semiconductor company for wireless communications and digital media solutions, and Carbon Design Systems, the leading supplier of system level modeling and validation tools for system-on-chip (SoC) design, have entered into a multi-year strategic partnership to deploy Carbon Model Studio™ and Carbonized models of third-party intellectual property (IP) within Mediatek.
Over the past year, Mediatek engineers have successfully adopted Carbon’s system-level modeling to speedup electronic system level (ESL) platform buildup. During this time, architects adopted Carbon’s solutions for performance analysis and optimization of various subsystems in their advanced SoC designs.
Scott Seaton, vice president of sales and marketing at Carbon Design Systems, says: “This multi-year, strategic relationship between MediaTek and Carbon shows a deepening commitment by MediaTek to deploy system-level solutions to reduce time to market.
“It confirms our conviction that pre-built and pre-tested models of third-party IP and model generation tools are efficient to implement virtual platforms for architectural analysis/optimization and pre-silicon system validation.”
Saturday, October 31, 2009
Friday, October 30, 2009
MEMS-chip business struggles with growing pains
USA: The big, bright market potential of semiconductors built with microelectromechanical systems (MEMS) technology is indisputable. Annual sales of MEMS-based sensor and actuator devices are expected to nearly double in four years, reaching $7.3 billion in 2013, according to IC Insights' new Special Study: MEMS 2010—A Realistic Look Beyond the Hype.
However, it's erroneous to portray the burgeoning MEMS segment as a utopian market opportunity, says the 80+ page report, which reviews factors that have impaired MEMS sales growth in recent years and provides a detailed forecast of revenues, unit shipments, and average selling prices (ASPs) for sensor and actuator product categories through 2013.
To be certain, 2009 was the first major setback for the MEMS-based semiconductor market since it began spreading into high-volume commercial systems applications from its traditional base in military/aerospace and automotive electronics.
IC Insights' new report shows worldwide sales of MEMS-based sensors and actuators falling 13 percent in 2009 to an estimated $3.8 billion from $4.4 billion in 2008. The drop is mostly due to the effects of the severe economic recession that pounded the entire semiconductor industry starting in 4Q08.
MEMS-based semiconductor sales are expected to rebound 17 percent in 2010 to $4.4 billion, followed by strong 21 percent and 22 percent increases in 2011 and 2012, respectively, according to the new report.
Fig. 1 ranks the sales performances of MEMS-product categories in 2009 and compares that to the report's projected 2008-2013 CAGR. The MEMS market overall is expected to increase by a CAGR of nearly 11% between 2008 and 2013 compared to a CAGR of just 6 percent for IC revenues, based on IC Insights' forecast.
Fig. 1
Source: IC Insights, USA
While the stage is set for strong increases in MEMS product sales during the next four years, it is important to recognize that this fledgling market segment remains vulnerable to periods of oversupply and price erosion—just like any other integrated circuit or discrete semiconductor category.
The new report shows that prior to 2009, the MEMS sensor/actuator segment suffered sales declines in two of the previous four years (in 2005 and 2007) strictly due to market/inventory corrections and steep price erosions in several key MEMS product categories.
These two down years for MEMS sales occurred when overall semiconductor revenues grew in 2005 and 2007. In recession-battered 2009, MEMS-based devices and ICs are expected to share equally in the pain of the semiconductor downturn with both markets forecast to decline 13 percent.
MEMS chip sales suffered greatly in 2009 because key automotive and new consumer applications have been hit especially hard by the global economic downturn.
IC Insights' 2010 MEMS report says the expanding MEMS market continues to face growing pains as suppliers attempt to serve new high-volume commercial systems applications. Ironically, a major challenge facing the MEMS semiconductor segment is the amount of attention and wafer-production capacity that's being heaped onto the business worldwide.
With traditional IC categories seeing a slowdown in annual growth rates since the late 1990s, more major semiconductor companies, pure-play IC foundries, and wafer fab equipment suppliers are shifting attention to the MEMS arena in order to boost revenues.
The entry of large device suppliers into market segments pioneered by MEMS start-up companies is radically changing the dynamics of many emerging niches. In many cases, the increased competition is intensifying pricing pressure in product categories that have promised substantial annual revenue growth rates.
Source: IC Insights
However, it's erroneous to portray the burgeoning MEMS segment as a utopian market opportunity, says the 80+ page report, which reviews factors that have impaired MEMS sales growth in recent years and provides a detailed forecast of revenues, unit shipments, and average selling prices (ASPs) for sensor and actuator product categories through 2013.
To be certain, 2009 was the first major setback for the MEMS-based semiconductor market since it began spreading into high-volume commercial systems applications from its traditional base in military/aerospace and automotive electronics.
IC Insights' new report shows worldwide sales of MEMS-based sensors and actuators falling 13 percent in 2009 to an estimated $3.8 billion from $4.4 billion in 2008. The drop is mostly due to the effects of the severe economic recession that pounded the entire semiconductor industry starting in 4Q08.
MEMS-based semiconductor sales are expected to rebound 17 percent in 2010 to $4.4 billion, followed by strong 21 percent and 22 percent increases in 2011 and 2012, respectively, according to the new report.
Fig. 1 ranks the sales performances of MEMS-product categories in 2009 and compares that to the report's projected 2008-2013 CAGR. The MEMS market overall is expected to increase by a CAGR of nearly 11% between 2008 and 2013 compared to a CAGR of just 6 percent for IC revenues, based on IC Insights' forecast.
Fig. 1
Source: IC Insights, USAWhile the stage is set for strong increases in MEMS product sales during the next four years, it is important to recognize that this fledgling market segment remains vulnerable to periods of oversupply and price erosion—just like any other integrated circuit or discrete semiconductor category.
The new report shows that prior to 2009, the MEMS sensor/actuator segment suffered sales declines in two of the previous four years (in 2005 and 2007) strictly due to market/inventory corrections and steep price erosions in several key MEMS product categories.
These two down years for MEMS sales occurred when overall semiconductor revenues grew in 2005 and 2007. In recession-battered 2009, MEMS-based devices and ICs are expected to share equally in the pain of the semiconductor downturn with both markets forecast to decline 13 percent.
MEMS chip sales suffered greatly in 2009 because key automotive and new consumer applications have been hit especially hard by the global economic downturn.
IC Insights' 2010 MEMS report says the expanding MEMS market continues to face growing pains as suppliers attempt to serve new high-volume commercial systems applications. Ironically, a major challenge facing the MEMS semiconductor segment is the amount of attention and wafer-production capacity that's being heaped onto the business worldwide.
With traditional IC categories seeing a slowdown in annual growth rates since the late 1990s, more major semiconductor companies, pure-play IC foundries, and wafer fab equipment suppliers are shifting attention to the MEMS arena in order to boost revenues.
The entry of large device suppliers into market segments pioneered by MEMS start-up companies is radically changing the dynamics of many emerging niches. In many cases, the increased competition is intensifying pricing pressure in product categories that have promised substantial annual revenue growth rates.
Source: IC Insights
Semiconductor opportunities in power grid applications
USA: Given the current urgency of rising energy costs, increased energy consumption, and climate change, it comes as little surprise that both the private and government sectors are increasing activities with regard to the energy grid, the so called electricity network supporting energy generation, transmission, and distribution.
Add to that, digital control for the infrastructure that monitors usage, the market opportunity is growing significantly for system providers as well as the component suppliers.
Energy grids in their current state are considered particularly inefficient, especially in the US, because arguably there are a large number of regulations and cost prohibitive roadblocks that have stalled its development over the last 40 years.
It’s a fact that a whopping 40 percent of all energy produced in the US is lost as heat as it travels over the wires to its final destination, while at the same time ever increasing power outages are costing the US roughly $150 billion annually.
As the demand for energy increases by an estimated 40 percent in the next 20 years according to some sources, it will become increasingly imperative that we recognize these issues and seek to solve them and in economic terms, this spells “opportunity” for electronics suppliers.
The technology industry has already addressed the smart metering segment of the electric power market and it continues to see success as the industry transitions into digital control through meter upgrades and new installations.
Companies such as Texas Instruments, STMicroelectronics, Microchip, and Teridian Semiconductor have been providing SOCs, AFEs, power, and microcontrollers into this growing application area.
Some 120 million smart meters are expected to ship this year, which provides an opportunity of $1.1B for silicon suppliers annually as there is just under $10.00 worth of silicon in each unit. These new meters go a long way in creating a more efficient grid by providing power companies with better data which can be used to regulate pricing during peak usage. They also provide the consumer with energy consumption information on power hungry appliances.
In addition, there is considerable room to improve the grid structure itself. As the new infrastructure build out continues for alternative sources of fuel outside of coal (solar, wind, and water), the grid is being retrofitted with additional systems such as PV arrays, PV inverters, programmable grid controllers, and simulation systems.
In the field, there is significant opportunity for electronics that will retrofit current transformers and switching substations with intelligent control and communications to be used as the infrastructure is decentralized due to the additional power generation coming online from micro-grids.
While the volumes are much lower on these applications, the silicon content is high and the required devices are priced much higher than those found in the AMR application.
Worldwide Semiconductor Revenue Forecast for AMR
databeans estimates
Source: Databeans
Add to that, digital control for the infrastructure that monitors usage, the market opportunity is growing significantly for system providers as well as the component suppliers.
Energy grids in their current state are considered particularly inefficient, especially in the US, because arguably there are a large number of regulations and cost prohibitive roadblocks that have stalled its development over the last 40 years.
It’s a fact that a whopping 40 percent of all energy produced in the US is lost as heat as it travels over the wires to its final destination, while at the same time ever increasing power outages are costing the US roughly $150 billion annually.
As the demand for energy increases by an estimated 40 percent in the next 20 years according to some sources, it will become increasingly imperative that we recognize these issues and seek to solve them and in economic terms, this spells “opportunity” for electronics suppliers.
The technology industry has already addressed the smart metering segment of the electric power market and it continues to see success as the industry transitions into digital control through meter upgrades and new installations.
Companies such as Texas Instruments, STMicroelectronics, Microchip, and Teridian Semiconductor have been providing SOCs, AFEs, power, and microcontrollers into this growing application area.
Some 120 million smart meters are expected to ship this year, which provides an opportunity of $1.1B for silicon suppliers annually as there is just under $10.00 worth of silicon in each unit. These new meters go a long way in creating a more efficient grid by providing power companies with better data which can be used to regulate pricing during peak usage. They also provide the consumer with energy consumption information on power hungry appliances.
In addition, there is considerable room to improve the grid structure itself. As the new infrastructure build out continues for alternative sources of fuel outside of coal (solar, wind, and water), the grid is being retrofitted with additional systems such as PV arrays, PV inverters, programmable grid controllers, and simulation systems.
In the field, there is significant opportunity for electronics that will retrofit current transformers and switching substations with intelligent control and communications to be used as the infrastructure is decentralized due to the additional power generation coming online from micro-grids.
While the volumes are much lower on these applications, the silicon content is high and the required devices are priced much higher than those found in the AMR application.
Worldwide Semiconductor Revenue Forecast for AMR
databeans estimatesSource: Databeans
SMIC and Cadence announce 65nm low power reference flow 4.0
SAN JOSE, USA: Cadence Design Systems Inc. announced that it has delivered a comprehensive low-power design flow for engineers targeting the 65-nanometer process at Semiconductor Manufacturing International Corp..
Based on the Cadence(R) Low-Power Solution, the flow enables faster design of leading-edge, low-power semiconductors using a single, comprehensive design platform.
"Power is now a critical design constraint, as important as timing and area from both a technology and cost standpoint," said Max Liu, Vice President of the Design Services Center at SMIC. "The SMIC-Cadence Reference Flow 4.0 addresses the need for power-efficient design innovation with an advanced, automated low-power design capability."
Validation of the flow was accomplished through implementation of low-power chips utilizing SMIC's in-house-designed 65-nanometer libraries, including effective current source model (ECSM) standard cells, power management cells, PLLs, SRAMs and I/O libraries.
Low-power technologies employed in the design include power gating and multi-supply/multi-voltage (MSMV) techniques to reduce leakage and dynamic power consumption.
"Power efficiency is a key requirement for many new semiconductors, yet designers sometimes think it's too new and therefore too risky," said Steve Carlson, vice president of product marketing at Cadence. "The Cadence Low-Power Solution provides a complete, silicon-validated front-to-back flow for designers targeting SMIC's 65-nanometer process technology, including functional and structural verification, while increasing productivity. It's fast, easy and proven."
The SMIC 65-nanometer low-power Reference Flow 4.0 includes the Cadence Low-Power Solution, with Encounter Conformal Low Power, Incisive Enterprise Simulator, Encounter RTL Compiler, Encounter Digital Implementation System, Cadence QRC Extraction, Encounter Timing System and Encounter Power System.
Based on the Cadence(R) Low-Power Solution, the flow enables faster design of leading-edge, low-power semiconductors using a single, comprehensive design platform.
"Power is now a critical design constraint, as important as timing and area from both a technology and cost standpoint," said Max Liu, Vice President of the Design Services Center at SMIC. "The SMIC-Cadence Reference Flow 4.0 addresses the need for power-efficient design innovation with an advanced, automated low-power design capability."
Validation of the flow was accomplished through implementation of low-power chips utilizing SMIC's in-house-designed 65-nanometer libraries, including effective current source model (ECSM) standard cells, power management cells, PLLs, SRAMs and I/O libraries.
Low-power technologies employed in the design include power gating and multi-supply/multi-voltage (MSMV) techniques to reduce leakage and dynamic power consumption.
"Power efficiency is a key requirement for many new semiconductors, yet designers sometimes think it's too new and therefore too risky," said Steve Carlson, vice president of product marketing at Cadence. "The Cadence Low-Power Solution provides a complete, silicon-validated front-to-back flow for designers targeting SMIC's 65-nanometer process technology, including functional and structural verification, while increasing productivity. It's fast, easy and proven."
The SMIC 65-nanometer low-power Reference Flow 4.0 includes the Cadence Low-Power Solution, with Encounter Conformal Low Power, Incisive Enterprise Simulator, Encounter RTL Compiler, Encounter Digital Implementation System, Cadence QRC Extraction, Encounter Timing System and Encounter Power System.
ST's innovative SoC simplifies multimedia monitor design
GENEVA, SWITZERLAND: STMicroelectronics is the first to combine a DisplayPort 1.1a and HDMI 1.3 receiver to support full-high-definition sources, such as Blu-Ray, while providing comprehensive analog-video and audio connectivity.
The new STDP8028 SoC from ST simplifies the design of high-end Full-HD multimedia displays with its unique integration of video inputs, advanced video quality and usability features such as Picture-In-Picture (PIP) and Picture-By-Picture (PBP). The SoC is being designed into multi-function monitors and public displays by leading OEMs around the world.
While many chips targeting the multimedia monitor segment offer limited image-quality functions and interface choices, the STDP8028 delivers the highest functionality and comprehensive video-quality features, In addition, it also boasts the highest integration of various interfaces, making it suitable for large public-display monitors as well as superior-quality home audio/visual equipment.
The STDP8208 is DisplayPort 1.1a certified. DisplayPort, the open digital-interface standard for displays developed by VESA (Video Electronics Standards Association), enables high-bandwidth audio-video signal transmission using fewer signal lines than conventional display interfaces used in multimedia-monitor applications.
The device's integrated features include: multi-standard worldwide 3D video decoders for both standard- and high-definition inputs over CVBS, S-Video, and Component inputs; advanced Faroudja DCDi Cinema® technology to deliver high-performance; a high-quality video experience; and multi-standard digital audio decoders. In addition, the device's Game-Mode Support enables crisp graphics for gaming applications by maintaining less than one frame of delay.
Maximizing the value of its broad multimedia compatibility, the new SoC ensures high picture quality from various video sources by supporting Faroudja RealColor® technology and extended color gamut mapping support. Faroudja RealColor supports Adaptive Contrast Control II (ACC II) and Active Color Management-3D (ACM-3D), leading to exceptional video quality. This level of video quality technology, only previously seen on Faroudja Home Theater Systems, is now available in a single-chip solution.
Faroudja DCDi Cinema supports advanced format conversion up to 1080p resolution with pixel-based MADi (Motion Adaptive De-Interlacing). Implementing this MADi performance, the areas of an image that are not moving will be fully static (flicker free) and moving objects will have smooth edges.
The STDP8028 is in volume production and is available in a 409-ball HSBGA package.
The new STDP8028 SoC from ST simplifies the design of high-end Full-HD multimedia displays with its unique integration of video inputs, advanced video quality and usability features such as Picture-In-Picture (PIP) and Picture-By-Picture (PBP). The SoC is being designed into multi-function monitors and public displays by leading OEMs around the world.
While many chips targeting the multimedia monitor segment offer limited image-quality functions and interface choices, the STDP8028 delivers the highest functionality and comprehensive video-quality features, In addition, it also boasts the highest integration of various interfaces, making it suitable for large public-display monitors as well as superior-quality home audio/visual equipment.
The STDP8208 is DisplayPort 1.1a certified. DisplayPort, the open digital-interface standard for displays developed by VESA (Video Electronics Standards Association), enables high-bandwidth audio-video signal transmission using fewer signal lines than conventional display interfaces used in multimedia-monitor applications.
The device's integrated features include: multi-standard worldwide 3D video decoders for both standard- and high-definition inputs over CVBS, S-Video, and Component inputs; advanced Faroudja DCDi Cinema® technology to deliver high-performance; a high-quality video experience; and multi-standard digital audio decoders. In addition, the device's Game-Mode Support enables crisp graphics for gaming applications by maintaining less than one frame of delay.
Maximizing the value of its broad multimedia compatibility, the new SoC ensures high picture quality from various video sources by supporting Faroudja RealColor® technology and extended color gamut mapping support. Faroudja RealColor supports Adaptive Contrast Control II (ACC II) and Active Color Management-3D (ACM-3D), leading to exceptional video quality. This level of video quality technology, only previously seen on Faroudja Home Theater Systems, is now available in a single-chip solution.
Faroudja DCDi Cinema supports advanced format conversion up to 1080p resolution with pixel-based MADi (Motion Adaptive De-Interlacing). Implementing this MADi performance, the areas of an image that are not moving will be fully static (flicker free) and moving objects will have smooth edges.
The STDP8028 is in volume production and is available in a 409-ball HSBGA package.
TranSwitch ships over 1 million Mustang EPON ONU chips
SHELTON, USA: TranSwitch Corp. announced that it has shipped over 1 million chips from its Mustang product family, a class of Ethernet passive optical network (EPON) protocol system-on-chips (SoC) for optical networking unit (ONU) applications.
The Mustang devices provide the core functionality for the ONU equipment being deployed by Japan’s leading telecommunications service provider as part of its fiber-to-the-home (FTTH) strategy for offering triple-play (voice, internet and television) services.
“We are pleased to report this impressive milestone for our Mustang chips,” said Dr. Santanu Das, TranSwitch’s President and CEO. “The Mustang product family is integral to TranSwitch’s focus on offering a comprehensive platform of Access and Customer Premises Equipment (CPE) due to the high growth characteristics of this market segment. We look forward to leveraging our success in Japan as we accelerate the sales and marketing initiatives of our network edge products throughout Asia as well as other fast growing markets.”
The number of FTTH subscribers grew by 15 percent in the first six months of 2009, with more than 5.5 million new subscribers added worldwide, according to the latest update to the global ranking of FTTH economies, jointly issued by the three FTTH Councils of Asia-Pacific, Europe and North America.
According to industry analysts at ABI Research in their report PON and Active Ethernet FTTH Deployments, 55 percent percent of the world’s homes that will make their broadband connection over FTTH will receive video services by 2011. This figure is up from the 4 percent in 2005.
Japan and South Korea are ranked the highest in FTTH deployment, according to the report, with China possessing the greatest growth potential and one of the largest market opportunities. The build up of FTTH (and related deployments) in Europe has been growing with 120 new projects added in the last six months to a total of 233 projects at the end of June 2009, according to European telecom/IT consulting firm iDate.
Expanding TranSwitch’s end-to-end FTTH semiconductor portfolio, Mustang is a family of fully integrated, single chip, mixed-signal SoCs for gigabit EPON ONU applications.
This family of highly-integrated and low power EPON ONU SoCs is ideal for service providers deploying next generation networks (NGN) which support premium triple play services such as bandwidth-intensive IPTV while meeting government targets for reduced power consumption. These products enable new capabilities for television entertainment including interactivity, integration with voice and data communications, and value-added services while maintaining the highest quality of service.
The Mustang ONU simplifies service provider deployments by supporting interoperability with a variety of vendor optical line terminals (OLT) and supporting full compliance with relevant standards including IEEE 802.3ah and the NTT gigabit EPON Gist specification to ensure error-free, low latency, bandwidth efficient data transmission.
The Mustang product line, combined with TranSwitch’s Colt EPON OLT SoC and Atlanta 100 and 2000 communications processor families, reinforces TranSwitch’s market position as the only silicon vendor with complete, end-to-end EPON solutions for the “last mile.”
The Mustang devices provide the core functionality for the ONU equipment being deployed by Japan’s leading telecommunications service provider as part of its fiber-to-the-home (FTTH) strategy for offering triple-play (voice, internet and television) services.
“We are pleased to report this impressive milestone for our Mustang chips,” said Dr. Santanu Das, TranSwitch’s President and CEO. “The Mustang product family is integral to TranSwitch’s focus on offering a comprehensive platform of Access and Customer Premises Equipment (CPE) due to the high growth characteristics of this market segment. We look forward to leveraging our success in Japan as we accelerate the sales and marketing initiatives of our network edge products throughout Asia as well as other fast growing markets.”
The number of FTTH subscribers grew by 15 percent in the first six months of 2009, with more than 5.5 million new subscribers added worldwide, according to the latest update to the global ranking of FTTH economies, jointly issued by the three FTTH Councils of Asia-Pacific, Europe and North America.
According to industry analysts at ABI Research in their report PON and Active Ethernet FTTH Deployments, 55 percent percent of the world’s homes that will make their broadband connection over FTTH will receive video services by 2011. This figure is up from the 4 percent in 2005.
Japan and South Korea are ranked the highest in FTTH deployment, according to the report, with China possessing the greatest growth potential and one of the largest market opportunities. The build up of FTTH (and related deployments) in Europe has been growing with 120 new projects added in the last six months to a total of 233 projects at the end of June 2009, according to European telecom/IT consulting firm iDate.
Expanding TranSwitch’s end-to-end FTTH semiconductor portfolio, Mustang is a family of fully integrated, single chip, mixed-signal SoCs for gigabit EPON ONU applications.
This family of highly-integrated and low power EPON ONU SoCs is ideal for service providers deploying next generation networks (NGN) which support premium triple play services such as bandwidth-intensive IPTV while meeting government targets for reduced power consumption. These products enable new capabilities for television entertainment including interactivity, integration with voice and data communications, and value-added services while maintaining the highest quality of service.
The Mustang ONU simplifies service provider deployments by supporting interoperability with a variety of vendor optical line terminals (OLT) and supporting full compliance with relevant standards including IEEE 802.3ah and the NTT gigabit EPON Gist specification to ensure error-free, low latency, bandwidth efficient data transmission.
The Mustang product line, combined with TranSwitch’s Colt EPON OLT SoC and Atlanta 100 and 2000 communications processor families, reinforces TranSwitch’s market position as the only silicon vendor with complete, end-to-end EPON solutions for the “last mile.”
Juniper Networks unveils new silicon with breakthrough '3D Scaling' technology
NEW YORK, USA: Juniper Networks announced a new Junos One family of processors that represent an unprecedented integration of silicon and software to push the boundaries of high-performance networking.
The Junos One family combines Juniper’s experience and investments in silicon, software, systems and architecture to deliver industry-first “network instruction sets” that are purpose-built to meet the needs of networking at massive scale in multiple dimensions. Junos One chipsets will be embedded into a broad array of Juniper’s future routing, switching and security products.
Kicking off the new family, Juniper introduced the Junos Trio chipset with revolutionary 3D Scaling technology that enables networks to scale dynamically for more bandwidth, subscribers and services – all at the same time without compromise.
Junos Trio also yields breakthroughs for delivering rich business, residential and mobile services at massive scale – all while using half as much power per gigabit.i The new chipset includes more than 30 patent-pending innovations in silicon architecture, packet processing, quality of service and energy efficiency.
“Junos Trio with 3D Scaling is the only chipset of its kind on the planet,” said Pradeep Sindhu, Juniper’s founder, vice chairman and CTO. “We invested more than $80 million over the last five years to develop Junos Trio, yielding a fundamental advance in performance, flexibility and power efficiency to meet the Internet’s massive three-dimensional scaling needs. This will dramatically change the economics for our customers, while helping them create new and better experiences for their customers. This is the platform for the next decade.”
Junos Trio represents Juniper’s fourth generation of purpose-built silicon, and is the industry’s first “network instruction set” – a new silicon architecture unlike traditional application-specific integrated circuits (ASICs) and network processing units (NPUs).
The new architecture leverages customized “network instructions” that are designed into silicon to maximize performance and functionality, while working closely with Junos software to ensure programmability of network resources. The new Junos One family thus combines the performance benefits of ASICs and the flexibility of network processors to break the standard trade-offs between the two.
Built in 65-nanometer technology, Junos Trio includes four chips with a total of 1.5 billion transistors and 320 simultaneous processes, yielding total router throughput up to 2.6 terabits per second and up to 2.3 million subscribers per rackii – far exceeding the performance and scale possible through off-the-shelf silicon.
Junos Trio includes advanced forwarding, queuing, scheduling, synchronization and end-to-end resiliency features, helping customers provide service-level guarantees for voice, video, and data delivery. Junos Trio also incorporates significant power efficiency features to enable more environmentally conscious data center and service provider networks.
“From its start, Juniper has been a silicon technology leader with an impressive set of innovations through the years,” said Michael Howard, co-founder and principal analyst, Infonetics Research. “It is always exciting to see technology leaps such as those embedded in the Junos Trio chipset, which anticipates carrier edge and aggregation requirements across multiple dimensions for the next several years.”
Starting immediately, Junos Trio will be delivered in Juniper’s new MX 3D products that provide “universal edge” routing for business, residential and mobile services at massive scale on a single network. The new products include new modular line cards, new applications and new metro aggregation routers for Juniper’s MX Series routers.
The MX 3D products directly address enterprise and service provider needs for more flexible technology and business models, providing them with unprecedented dynamic control, open application platforms and revolutionary economics validated through a commissioned study conducted by an independent third party.
The Junos One family combines Juniper’s experience and investments in silicon, software, systems and architecture to deliver industry-first “network instruction sets” that are purpose-built to meet the needs of networking at massive scale in multiple dimensions. Junos One chipsets will be embedded into a broad array of Juniper’s future routing, switching and security products.
Kicking off the new family, Juniper introduced the Junos Trio chipset with revolutionary 3D Scaling technology that enables networks to scale dynamically for more bandwidth, subscribers and services – all at the same time without compromise.
Junos Trio also yields breakthroughs for delivering rich business, residential and mobile services at massive scale – all while using half as much power per gigabit.i The new chipset includes more than 30 patent-pending innovations in silicon architecture, packet processing, quality of service and energy efficiency.
“Junos Trio with 3D Scaling is the only chipset of its kind on the planet,” said Pradeep Sindhu, Juniper’s founder, vice chairman and CTO. “We invested more than $80 million over the last five years to develop Junos Trio, yielding a fundamental advance in performance, flexibility and power efficiency to meet the Internet’s massive three-dimensional scaling needs. This will dramatically change the economics for our customers, while helping them create new and better experiences for their customers. This is the platform for the next decade.”
Junos Trio represents Juniper’s fourth generation of purpose-built silicon, and is the industry’s first “network instruction set” – a new silicon architecture unlike traditional application-specific integrated circuits (ASICs) and network processing units (NPUs).
The new architecture leverages customized “network instructions” that are designed into silicon to maximize performance and functionality, while working closely with Junos software to ensure programmability of network resources. The new Junos One family thus combines the performance benefits of ASICs and the flexibility of network processors to break the standard trade-offs between the two.
Built in 65-nanometer technology, Junos Trio includes four chips with a total of 1.5 billion transistors and 320 simultaneous processes, yielding total router throughput up to 2.6 terabits per second and up to 2.3 million subscribers per rackii – far exceeding the performance and scale possible through off-the-shelf silicon.
Junos Trio includes advanced forwarding, queuing, scheduling, synchronization and end-to-end resiliency features, helping customers provide service-level guarantees for voice, video, and data delivery. Junos Trio also incorporates significant power efficiency features to enable more environmentally conscious data center and service provider networks.
“From its start, Juniper has been a silicon technology leader with an impressive set of innovations through the years,” said Michael Howard, co-founder and principal analyst, Infonetics Research. “It is always exciting to see technology leaps such as those embedded in the Junos Trio chipset, which anticipates carrier edge and aggregation requirements across multiple dimensions for the next several years.”
Starting immediately, Junos Trio will be delivered in Juniper’s new MX 3D products that provide “universal edge” routing for business, residential and mobile services at massive scale on a single network. The new products include new modular line cards, new applications and new metro aggregation routers for Juniper’s MX Series routers.
The MX 3D products directly address enterprise and service provider needs for more flexible technology and business models, providing them with unprecedented dynamic control, open application platforms and revolutionary economics validated through a commissioned study conducted by an independent third party.
Thursday, October 29, 2009
Tilera announces world's first 100-core processor with TILE-Gx family
SAN JOSE, USA: Tilera Corp. announced its new TILE-Gx family -- four new processors from Tilera including the world's first 100-core processor: the TILE-Gx100.
The TILE-Gx100 offers the highest performance of any microprocessor yet announced by a factor of four. Moreover, the entire TILE-Gx family raises the bar for performance-per-watt to new levels with ten times better compute efficiency compared to Intel's next generation Westmere processor.
And Tilera has simplified many-core programming with its breakthrough Multicore Development Environment (MDE) together with a growing ecosystem of operating system and software partners to enable rapid product deployment.
The TILE-Gx family -- available with 16, 36, 64 and 100 cores -- employs Tilera's unique architecture that scales well beyond the core count of traditional microprocessors.
Tilera's two-dimensional iMesh interconnect eliminates the need for an on-chip bus and its Dynamic Distributed Cache (DDC) system allows each cores' local cache to be shared coherently across the entire chip. These two key technologies enable the TILE Architecture performance to scale linearly with the number of cores on the chip -- a feat that is currently unmatched.
“"The launch of the TILE-Gx family, including the world's first 100-core microprocessor, ushers in a new era of many-core processing. We believe this next generation of high-core count, ultra high-performance chips will open completely new computing possibilities,” said Omid Tahernia, Tilera's CEO.
“Customers will be able to replace an entire board presently using a dozen or more chips with just one of our TILE-Gx processors, greatly simplifying the system architecture and resulting in reduced cost, power consumption, and PC board area. This is truly a remarkable technology achievement.”
Leading evolution to many-core
Tilera's breakthroughs in scalable multicore computing are changing the model of computing. Many-core processors enable a wide range of new opportunities including:
Consolidation of functions: A single many-core processor can absorb functions that previously required multiple processors, thus lowering system cost and providing a single software tool chain and programming model for developers.
Granularity of compute: Processing resources can be allocated to functions in precise increments, optimizing performance and saving power.
Deterministic compute: Enables processor cores to be dedicated to specific tasks, including cache-coherent islands of compute, for highly predictable performance.
“At various points in microprocessor history there have been breakthroughs that have enabled significant advances in computing, such as when the barrier of single-core clock speed was overcome by the introduction of multicore,” said Sergis Mushell, principal research analyst, Gartner.
“Cloud computing and virtualization have ushered in a new era of processing power optimization and utilization, which has accelerated the roadmaps for multicore architectures and changed the paradigm from a clock frequency discussion of the past to a new discussion about number of cores and core optimization.”
The TILE-Gx100 offers the highest performance of any microprocessor yet announced by a factor of four. Moreover, the entire TILE-Gx family raises the bar for performance-per-watt to new levels with ten times better compute efficiency compared to Intel's next generation Westmere processor.
And Tilera has simplified many-core programming with its breakthrough Multicore Development Environment (MDE) together with a growing ecosystem of operating system and software partners to enable rapid product deployment.
The TILE-Gx family -- available with 16, 36, 64 and 100 cores -- employs Tilera's unique architecture that scales well beyond the core count of traditional microprocessors.
Tilera's two-dimensional iMesh interconnect eliminates the need for an on-chip bus and its Dynamic Distributed Cache (DDC) system allows each cores' local cache to be shared coherently across the entire chip. These two key technologies enable the TILE Architecture performance to scale linearly with the number of cores on the chip -- a feat that is currently unmatched.
“"The launch of the TILE-Gx family, including the world's first 100-core microprocessor, ushers in a new era of many-core processing. We believe this next generation of high-core count, ultra high-performance chips will open completely new computing possibilities,” said Omid Tahernia, Tilera's CEO.
“Customers will be able to replace an entire board presently using a dozen or more chips with just one of our TILE-Gx processors, greatly simplifying the system architecture and resulting in reduced cost, power consumption, and PC board area. This is truly a remarkable technology achievement.”
Leading evolution to many-core
Tilera's breakthroughs in scalable multicore computing are changing the model of computing. Many-core processors enable a wide range of new opportunities including:
Consolidation of functions: A single many-core processor can absorb functions that previously required multiple processors, thus lowering system cost and providing a single software tool chain and programming model for developers.
Granularity of compute: Processing resources can be allocated to functions in precise increments, optimizing performance and saving power.
Deterministic compute: Enables processor cores to be dedicated to specific tasks, including cache-coherent islands of compute, for highly predictable performance.
“At various points in microprocessor history there have been breakthroughs that have enabled significant advances in computing, such as when the barrier of single-core clock speed was overcome by the introduction of multicore,” said Sergis Mushell, principal research analyst, Gartner.
“Cloud computing and virtualization have ushered in a new era of processing power optimization and utilization, which has accelerated the roadmaps for multicore architectures and changed the paradigm from a clock frequency discussion of the past to a new discussion about number of cores and core optimization.”
Synopsys unveils 30 percent smaller area, low power USB 2.0 PHY IP for 28-nm processes
MOUNTAIN VIEW, USA: Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the addition of the new DesignWare USB 2.0 picoPHY IP to its USB 2.0 PHY IP product line that has been successfully deployed in more than 300 customer designs, and in more than 50 different process technologies ranging from 180-nanometer (nm) to 32-nm.
Targeted at mobile and high-volume consumer applications such as feature-rich smartphones, mobile internet devices and netbooks, the DesignWare USB 2.0 picoPHY supports advanced 28-nm processes in a 1.8V architecture, is 30 percent smaller than the previous USB 2.0 PHY generation, and offers reduced pin count and low standby power consumption.
The DesignWare USB 2.0 picoPHY IP is the first PHY IP to support the new Battery Charging version 1.1 and USB On-the-Go (OTG) version 2.0 specifications from the USB Implementer's Forum (USB-IF).
The Battery Charging v 1.1 specification allows mobile devices to draw up to 1.8 A of current when connected to a wall charger. The Battery Charging specification enables portable devices to distinguish among various power sources, such as a wall charger, standard host port and USB charging port, and selects the most efficient method to charge the device.
By supporting the USB OTG version 2.0 specification, the DesignWare USB 2.0 picoPHY incorporates the new Attached Detection Protocol (ADP) feature, which improves the power efficiency of portable devices that communicate directly to USB peripherals without the need for a PC Host.
In addition, the DesignWare USB 2.0 picoPHY supports advanced power management features, such as power supply gating and support for ultra-low standby current to help designers lower the leakage power of mobile system-on-chips (SoCs) while maintaining the integrity of the USB 2.0 connection.
"Delivery of USB IP solutions from providers like Synopsys helps system designers benefit from the latest functionality offered by USB technology," said Jeff Ravencraft, president and chairman of the USB Implementers Forum.
"With the prevalence of USB on mobile devices, IP solutions like Synopsys' new DesignWare USB 2.0 picoPHY IP will enable designers to quickly incorporate this technology into their SoCs designs and bring new USB-enabled products to the market quickly."
"For nearly a decade, designers have successfully incorporated Synopsys' high-quality DesignWare USB 2.0 PHY IP into their SoCs which they have shipped in hundreds of millions of units," said John Koeter, vice president of marketing of the Solutions Group at Synopsys. "The addition of the new DesignWare USB 2.0 picoPHY IP to this already widely adopted product line provides designers with a competitive edge through our continued innovation and support for the latest processes and specifications."
The DesignWare USB 2.0 picoPHY IP is expected to be available to early adopters starting in Q4 2009 for 28-nm processes, with a roadmap for 40- and 32-nm.
Targeted at mobile and high-volume consumer applications such as feature-rich smartphones, mobile internet devices and netbooks, the DesignWare USB 2.0 picoPHY supports advanced 28-nm processes in a 1.8V architecture, is 30 percent smaller than the previous USB 2.0 PHY generation, and offers reduced pin count and low standby power consumption.
The DesignWare USB 2.0 picoPHY IP is the first PHY IP to support the new Battery Charging version 1.1 and USB On-the-Go (OTG) version 2.0 specifications from the USB Implementer's Forum (USB-IF).
The Battery Charging v 1.1 specification allows mobile devices to draw up to 1.8 A of current when connected to a wall charger. The Battery Charging specification enables portable devices to distinguish among various power sources, such as a wall charger, standard host port and USB charging port, and selects the most efficient method to charge the device.
By supporting the USB OTG version 2.0 specification, the DesignWare USB 2.0 picoPHY incorporates the new Attached Detection Protocol (ADP) feature, which improves the power efficiency of portable devices that communicate directly to USB peripherals without the need for a PC Host.
In addition, the DesignWare USB 2.0 picoPHY supports advanced power management features, such as power supply gating and support for ultra-low standby current to help designers lower the leakage power of mobile system-on-chips (SoCs) while maintaining the integrity of the USB 2.0 connection.
"Delivery of USB IP solutions from providers like Synopsys helps system designers benefit from the latest functionality offered by USB technology," said Jeff Ravencraft, president and chairman of the USB Implementers Forum.
"With the prevalence of USB on mobile devices, IP solutions like Synopsys' new DesignWare USB 2.0 picoPHY IP will enable designers to quickly incorporate this technology into their SoCs designs and bring new USB-enabled products to the market quickly."
"For nearly a decade, designers have successfully incorporated Synopsys' high-quality DesignWare USB 2.0 PHY IP into their SoCs which they have shipped in hundreds of millions of units," said John Koeter, vice president of marketing of the Solutions Group at Synopsys. "The addition of the new DesignWare USB 2.0 picoPHY IP to this already widely adopted product line provides designers with a competitive edge through our continued innovation and support for the latest processes and specifications."
The DesignWare USB 2.0 picoPHY IP is expected to be available to early adopters starting in Q4 2009 for 28-nm processes, with a roadmap for 40- and 32-nm.
Intel, Numonyx achieve research milestone with stacked, cross point phase change memory technology
SANTA CLARA, USA & GENEVA, SWITZERLAND: Intel Corp. and Numonyx B.V. today announced a key breakthrough in the research of phase change memory (PCM), a new non-volatile memory technology that combines many of the benefits of today's various memory types.
For the first time, researchers have demonstrated a 64Mb test chip that enables the ability to stack, or place, multiple layers of PCM arrays within a single die. These findings pave the way for building memory devices with greater capacity, lower power consumption and optimal space savings for random access non-volatile memory and storage applications.
The achievements are a result of an ongoing joint research program between Numonyx and Intel that has been focusing on the exploration of multi-layered or stacked PCM cell arrays.
Intel and Numonyx researchers are now able to demonstrate a vertically integrated memory cell -– called PCMS (phase change memory and switch). PCMS is comprised of one PCM element layered with a newly used Ovonic Threshold Switch (OTS) in a true cross point array.
The ability to layer or stack arrays of PCMS provides the scalability to higher memory densities while maintaining the performance characteristics of PCM, a challenge that is becoming increasingly more difficult to maintain with traditional memory technologies.
"We continue to develop the technology pipeline for memories in order to advance the computing platform,” said Al Fazio, Intel Fellow and director, memory technology development. “We are encouraged by this research milestone and see future memory technologies, such as PCMS, as critical for extending the role of memory in computing solutions and in expanding the capabilities for performance and memory scaling.”
"The results are extremely promising,” said Greg Atwood, senior technology fellow at Numonyx. “The results show the potential for higher density, scalable arrays and NAND-like usage models for PCM products in the future. This is important as traditional flash memory technologies face certain physical limits and reliability issues, yet demand for memory continues to rise in everything from mobile phones to data centers.”
Memory cells are built by stacking a storage element and a selector, with several cells creating memory arrays. Intel and Numonyx researchers were able to deploy a thin film, two-terminal OTS as the selector, matching the physical and electrical properties for PCM scaling.
With the compatibility of thin-film PCMS, multiple layers of cross point memory arrays are now possible. Once integrated together and embedded in a true cross point array, layered arrays are combined with CMOS circuits for decoding, sensing and logic functions.
For the first time, researchers have demonstrated a 64Mb test chip that enables the ability to stack, or place, multiple layers of PCM arrays within a single die. These findings pave the way for building memory devices with greater capacity, lower power consumption and optimal space savings for random access non-volatile memory and storage applications.
The achievements are a result of an ongoing joint research program between Numonyx and Intel that has been focusing on the exploration of multi-layered or stacked PCM cell arrays.
Intel and Numonyx researchers are now able to demonstrate a vertically integrated memory cell -– called PCMS (phase change memory and switch). PCMS is comprised of one PCM element layered with a newly used Ovonic Threshold Switch (OTS) in a true cross point array.
The ability to layer or stack arrays of PCMS provides the scalability to higher memory densities while maintaining the performance characteristics of PCM, a challenge that is becoming increasingly more difficult to maintain with traditional memory technologies.
"We continue to develop the technology pipeline for memories in order to advance the computing platform,” said Al Fazio, Intel Fellow and director, memory technology development. “We are encouraged by this research milestone and see future memory technologies, such as PCMS, as critical for extending the role of memory in computing solutions and in expanding the capabilities for performance and memory scaling.”
"The results are extremely promising,” said Greg Atwood, senior technology fellow at Numonyx. “The results show the potential for higher density, scalable arrays and NAND-like usage models for PCM products in the future. This is important as traditional flash memory technologies face certain physical limits and reliability issues, yet demand for memory continues to rise in everything from mobile phones to data centers.”
Memory cells are built by stacking a storage element and a selector, with several cells creating memory arrays. Intel and Numonyx researchers were able to deploy a thin film, two-terminal OTS as the selector, matching the physical and electrical properties for PCM scaling.
With the compatibility of thin-film PCMS, multiple layers of cross point memory arrays are now possible. Once integrated together and embedded in a true cross point array, layered arrays are combined with CMOS circuits for decoding, sensing and logic functions.
UMC invests 10 percent stake in DRAMeXchange
TAIWAN: Research institution DRAMeXchange announced that United Microelectronic Corp. (UMC) has taken a 10 percent stake in the company.
DRAMeXchange chairman Dr C.L. Liu believes that market intelligence has been gaining increasing attention nowadays and this investment through UMC's venture capital subsidiary is a true testament to this trend in the technology sector.
To stay ahead of the game and to seize new opportunities, industry players need to grasp the latest market dynamics and future trends. Dr. Liu added that, intelligence and culture are both intangible assets, which can be brought to their full potential through incisive analyses from various perspectives. For years, DRAMeXchange has successfully established its industry leader position and its high brand value by providing keen insights and reliable market information.
Unlike other Taiwan-based research institutions, 80 percent of DRAMeXchange’s revenue comes from analyses and strategic consulting it provides to leading global enterprises such as Goldman Sachs, Morgan Stanley, Bloomberg, Intel, Apple and Samsung.
DRAMeXchange was established in 2000, initially to provide DRAM market information and real-time quotes. Currently, there are four major research departments, namely, DRAMeXchange, WitsView, LEDinside and ENERGY, which are all leading research providers in their respective fields. Areas of research covered by DRAMeXchange are DRAM, NAND flash memory, PC, display panel, LED (light-emitting diodes), and the green energy.
Dr. Liu noted that DRAMeXchange is committed to providing crucial information to facilitate growth and internationalization of businesses in Taiwan.
UMC has been nurturing emerging enterprises that have the potential to internationalize, and DRAMeXchange is a vital intelligence provider for technology industries across the globe, it is also the first to profit among its competitors. After Taiwan witnessed the boom in the manufacturing and technology field, market intelligence and digital information will the next rising star.
In support of the government’s plans to carry out industry restructuring, and to promote the six key emerging industries, DRAMeXchange continues to innovate and to enhance the quality of its digital information. As a global leading brand, DRAMeXchange is slated to list on the OTC market in Taiwan’s bourse in the near future.
Source: DRAMeXchange
DRAMeXchange chairman Dr C.L. Liu believes that market intelligence has been gaining increasing attention nowadays and this investment through UMC's venture capital subsidiary is a true testament to this trend in the technology sector.
To stay ahead of the game and to seize new opportunities, industry players need to grasp the latest market dynamics and future trends. Dr. Liu added that, intelligence and culture are both intangible assets, which can be brought to their full potential through incisive analyses from various perspectives. For years, DRAMeXchange has successfully established its industry leader position and its high brand value by providing keen insights and reliable market information.
Unlike other Taiwan-based research institutions, 80 percent of DRAMeXchange’s revenue comes from analyses and strategic consulting it provides to leading global enterprises such as Goldman Sachs, Morgan Stanley, Bloomberg, Intel, Apple and Samsung.
DRAMeXchange was established in 2000, initially to provide DRAM market information and real-time quotes. Currently, there are four major research departments, namely, DRAMeXchange, WitsView, LEDinside and ENERGY, which are all leading research providers in their respective fields. Areas of research covered by DRAMeXchange are DRAM, NAND flash memory, PC, display panel, LED (light-emitting diodes), and the green energy.
Dr. Liu noted that DRAMeXchange is committed to providing crucial information to facilitate growth and internationalization of businesses in Taiwan.
UMC has been nurturing emerging enterprises that have the potential to internationalize, and DRAMeXchange is a vital intelligence provider for technology industries across the globe, it is also the first to profit among its competitors. After Taiwan witnessed the boom in the manufacturing and technology field, market intelligence and digital information will the next rising star.
In support of the government’s plans to carry out industry restructuring, and to promote the six key emerging industries, DRAMeXchange continues to innovate and to enhance the quality of its digital information. As a global leading brand, DRAMeXchange is slated to list on the OTC market in Taiwan’s bourse in the near future.
Source: DRAMeXchange
Arasan and Cadence collaborate to extend verification best practices
SAN JOSE, USA: Arasan Chip Systems today announced an agreement with Cadence Design Systems to collaborate on delivering functional verification best practices.
Under the agreement, Cadence will engineer Arasan's MIPI design IP into the Cadence Incisive Verification Kit, which incorporates Cadence-developed MIPI-based verification IP, example flows, user workshops and documented best practices.
The collaboration will enable potential MIPI users to see first hand a comprehensive working environment with hands-on workshops and labs that demonstrate the industry-standard Open Verification Methodology (OVM). Cadence will distribute the kit as part of its Incisive verification solution.
Richard Timpa, Executive Vice President for Arasan Chip Systems, said: "We provide a complete suite to enable SOC designers to build their solution by way of IP cores, software drivers and verification/validation utilities.
"Many of our customers prefer the Cadence Incisive functional verification platform and the OVM-ready verification IP provided by Cadence to achieve the goals of first-time success with their SoC. This symbiotic relationship enables both Cadence and Arasan Chip Systems to provide the best possible solutions to our customers, "said .
Michal Siwinski, Group Marketing Director for Cadence Design Systems, added: "We see a major trend emerging around SoC integration, leveraging third-party design IP from companies like Arasan. This collaboration simplifies the challenge of verification at the SoC level, and offers a systematic approach to making sure that the protocol design IP can functionally connect and distribute transactions to devices supporting the protocol."
"Engineers can easily modify the pre-built executable verification plan to accommodate the particular configuration used in their integrated design and can add other elements from the Cadence Verification IP Portfolio of 30-plus protocols."
Further, Siwinski explained: "The Incisive Verification Kit effectively teaches these flows and use models by example, enabling our mutual customers to achieve significantly more complete verification results using the Incisive metric-driven verification techniques."
The integrated solution will be available with the Incisive Verification Kit, part of the Incisive Enterprise Simulator and Incisive Enterprise Verifier products, both of which are available now. The solution's initial focus is on the MIPI CSI protocol, but plans are in place to expand to MIPI DSI and USB 3.0, as well.
Under the agreement, Cadence will engineer Arasan's MIPI design IP into the Cadence Incisive Verification Kit, which incorporates Cadence-developed MIPI-based verification IP, example flows, user workshops and documented best practices.
The collaboration will enable potential MIPI users to see first hand a comprehensive working environment with hands-on workshops and labs that demonstrate the industry-standard Open Verification Methodology (OVM). Cadence will distribute the kit as part of its Incisive verification solution.
Richard Timpa, Executive Vice President for Arasan Chip Systems, said: "We provide a complete suite to enable SOC designers to build their solution by way of IP cores, software drivers and verification/validation utilities.
"Many of our customers prefer the Cadence Incisive functional verification platform and the OVM-ready verification IP provided by Cadence to achieve the goals of first-time success with their SoC. This symbiotic relationship enables both Cadence and Arasan Chip Systems to provide the best possible solutions to our customers, "said .
Michal Siwinski, Group Marketing Director for Cadence Design Systems, added: "We see a major trend emerging around SoC integration, leveraging third-party design IP from companies like Arasan. This collaboration simplifies the challenge of verification at the SoC level, and offers a systematic approach to making sure that the protocol design IP can functionally connect and distribute transactions to devices supporting the protocol."
"Engineers can easily modify the pre-built executable verification plan to accommodate the particular configuration used in their integrated design and can add other elements from the Cadence Verification IP Portfolio of 30-plus protocols."
Further, Siwinski explained: "The Incisive Verification Kit effectively teaches these flows and use models by example, enabling our mutual customers to achieve significantly more complete verification results using the Incisive metric-driven verification techniques."
The integrated solution will be available with the Incisive Verification Kit, part of the Incisive Enterprise Simulator and Incisive Enterprise Verifier products, both of which are available now. The solution's initial focus is on the MIPI CSI protocol, but plans are in place to expand to MIPI DSI and USB 3.0, as well.
CSR and TSMC collaboration reaches new milestones
BANGALORE, INDIA: CSR plc announced that it has shipped more than 1.5 billion units and processed more than one million wafers from foundry partner Taiwan Semiconductor Manufacturing Co.
CSR also announced that it is collaborating with TSMC on a leading edge 40nm low power (LP) RF process technology and that CSR has validated a broad range of proprietary connectivity IP blocks at this node for incorporation into their next generation Connectivity Centre SoCs.
As the pioneer in bringing single die Bluetooth products on RFCMOS technology, CSR has worked closely with TSMC over multiple generations of technologies and delivered a broad range of innovative products to mainstream consumer markets. CSR has shipped more than 1.5 billion products that drive connectivity across multiple markets including mobile phones, automobiles, computers and consumer electronics devices.
CSR's Connectivity Centre SoCs require a small form factor and lower power consumption to deliver seamless connectivity for next-generation wireless devices.
TSMC’s 40nm LP RF process technology enables CSR to meet these objectives with highly integrated multi radio devices that allow the seamless coexistence of Bluetooth, GPS, Wi-Fi and FM radios. The two companies are leveraging their long relationship to help CSR achieve 40nm leadership with its multifunction radio integrated silicon platforms.
“TSMC consistently delivers cutting edge technology platforms that include integrated design collaterals and ecosystems. Our 40nm platform supports the high performance, low power, and high density RF products that will help CSR deliver next-generation experiences,” said Mark Liu, Vice President of Advanced Technology Business at TSMC.
“CSR is a demonstrated wireless technology leader because of their unique ability to bring these news experiences to reality.”
“CSR’s close collaboration with TSMC is key to our ability to deliver significant
advantages to our customers through industry-leading integration, power efficiency and cost efficiency of our products. We enable our customers to do more for less by selecting the technology nodes appropriate for the platform architecture we are delivering,” said Mark Redford, Vice President Advanced Process Technology Development of CSR.
“CSR’s highly integrated designs, with its portfolio of technology node optimized proprietary IP blocks, bring the best connectivity experience possible to wireless users worldwide.”
CSR also announced that it is collaborating with TSMC on a leading edge 40nm low power (LP) RF process technology and that CSR has validated a broad range of proprietary connectivity IP blocks at this node for incorporation into their next generation Connectivity Centre SoCs.
As the pioneer in bringing single die Bluetooth products on RFCMOS technology, CSR has worked closely with TSMC over multiple generations of technologies and delivered a broad range of innovative products to mainstream consumer markets. CSR has shipped more than 1.5 billion products that drive connectivity across multiple markets including mobile phones, automobiles, computers and consumer electronics devices.
CSR's Connectivity Centre SoCs require a small form factor and lower power consumption to deliver seamless connectivity for next-generation wireless devices.
TSMC’s 40nm LP RF process technology enables CSR to meet these objectives with highly integrated multi radio devices that allow the seamless coexistence of Bluetooth, GPS, Wi-Fi and FM radios. The two companies are leveraging their long relationship to help CSR achieve 40nm leadership with its multifunction radio integrated silicon platforms.
“TSMC consistently delivers cutting edge technology platforms that include integrated design collaterals and ecosystems. Our 40nm platform supports the high performance, low power, and high density RF products that will help CSR deliver next-generation experiences,” said Mark Liu, Vice President of Advanced Technology Business at TSMC.
“CSR is a demonstrated wireless technology leader because of their unique ability to bring these news experiences to reality.”
“CSR’s close collaboration with TSMC is key to our ability to deliver significant
advantages to our customers through industry-leading integration, power efficiency and cost efficiency of our products. We enable our customers to do more for less by selecting the technology nodes appropriate for the platform architecture we are delivering,” said Mark Redford, Vice President Advanced Process Technology Development of CSR.
“CSR’s highly integrated designs, with its portfolio of technology node optimized proprietary IP blocks, bring the best connectivity experience possible to wireless users worldwide.”
FormFactor unveils next-generation 300mm full-wafer test solution for NAND flash
LIVERMORE, USA: FormFactor Inc. has unveiled the TouchMatrix probe solution -- its latest-generation 300-mm full-wafer contact probe card for NAND Flash devices. Built on a new, proprietary architecture that leverages FormFactor's MicroSpring MEMS contact technology, the TouchMatrix solution offers chip manufacturers superior product performance with a substantially reduced production lead time.
The TouchMatrix probe card is specifically designed for today's cost sensitive test flows and enables testing of Flash devices down to sub 32-nm process nodes, including those integrating three-bit and four-bit memory cell architectures.
"While under enormous manufacturing cost pressures, Flash memory manufacturers must test each device to ensure its functional performance and quality," stated Adrian Wilson, general manager of the Flash Business Unit at FormFactor.
"Our Flash customers need innovative solutions that can lower their cost of test and this was the focus and goal of our TouchMatrix solution. Cost and performance are equally important to them. Our TouchMatrix solution provides superior electrical and probe contact performance, and its new architecture also has the benefit of manufacturing efficiency, which allows us to pass savings along to our customers."
As Flash memory devices migrate to the 32-nm node and employ smaller, multi-level cell architectures, increasing noise and crosstalk can affect test signals, making the role of the interconnect between the wafer and tester ever-more critical.
TouchMatrix cards utilize FormFactor's proprietary MicroSpring technology which provides low noise and stable contact resistance -- enabling reliable testing of smaller Flash device architectures and ensuring high test yield.
The MicroSpring contacts are manufactured using semiconductor lithography processes, making them highly scalable to Flash manufacturers' roadmaps as they migrate to smaller device features. FormFactor's self-cleaning MEMS probe tips also require less maintenance -- further extending test uptime and improving test cell efficiency.
The TouchMatrix solution features an innovative architecture that significantly improves manufacturing efficiency and reduces the delivery lead time for the TouchMatrix probe card, allowing customers greater flexibility in determining the type and volume of product to ramp at a given time.
The TouchMatrix architecture does not require the full wafer map to initiate production, which means manufacturing can begin as early as first silicon. Probe card repair is also made easier since the card can be easily disassembled and reassembled without planarity or x/y position adjustments.
The TouchMatrix probe card is designed for improved thermal performance that enables it to quickly reach and maintain test temperatures -- improving throughput and extending uptime. The card can also be enhanced with FormFactor's patented RapidSoak technology to achieve near-zero soak time and superior scrub performance.
FormFactor's TouchMatrix probe cards are now in qualification testing at several Flash device manufacturers and are available for shipping.
The TouchMatrix probe card is specifically designed for today's cost sensitive test flows and enables testing of Flash devices down to sub 32-nm process nodes, including those integrating three-bit and four-bit memory cell architectures.
"While under enormous manufacturing cost pressures, Flash memory manufacturers must test each device to ensure its functional performance and quality," stated Adrian Wilson, general manager of the Flash Business Unit at FormFactor.
"Our Flash customers need innovative solutions that can lower their cost of test and this was the focus and goal of our TouchMatrix solution. Cost and performance are equally important to them. Our TouchMatrix solution provides superior electrical and probe contact performance, and its new architecture also has the benefit of manufacturing efficiency, which allows us to pass savings along to our customers."
As Flash memory devices migrate to the 32-nm node and employ smaller, multi-level cell architectures, increasing noise and crosstalk can affect test signals, making the role of the interconnect between the wafer and tester ever-more critical.
TouchMatrix cards utilize FormFactor's proprietary MicroSpring technology which provides low noise and stable contact resistance -- enabling reliable testing of smaller Flash device architectures and ensuring high test yield.
The MicroSpring contacts are manufactured using semiconductor lithography processes, making them highly scalable to Flash manufacturers' roadmaps as they migrate to smaller device features. FormFactor's self-cleaning MEMS probe tips also require less maintenance -- further extending test uptime and improving test cell efficiency.
The TouchMatrix solution features an innovative architecture that significantly improves manufacturing efficiency and reduces the delivery lead time for the TouchMatrix probe card, allowing customers greater flexibility in determining the type and volume of product to ramp at a given time.
The TouchMatrix architecture does not require the full wafer map to initiate production, which means manufacturing can begin as early as first silicon. Probe card repair is also made easier since the card can be easily disassembled and reassembled without planarity or x/y position adjustments.
The TouchMatrix probe card is designed for improved thermal performance that enables it to quickly reach and maintain test temperatures -- improving throughput and extending uptime. The card can also be enhanced with FormFactor's patented RapidSoak technology to achieve near-zero soak time and superior scrub performance.
FormFactor's TouchMatrix probe cards are now in qualification testing at several Flash device manufacturers and are available for shipping.
Intersil and Georgia Institute of Technology in joint alliance for high-performance semiconductor development
MILPITAS & ATLANTA, USA: Intersil Corp., a world leader in the design and manufacture of high-performance analog and mixed-signal semiconductors, announced a broad alliance with the Georgia Institute of Technology.
The announcement includes the opening of a major new development facility and the kickoff of several new programs dedicated to the research and development of advanced power management semiconductor technologies.
This unique alliance involves an on-campus Analog Processing Center of Excellence (ACE) and world-class research efforts across multiple Georgia Tech facilities. A keystone of the alliance will be the opening of a new 4,300 square-foot ACE Center on campus. At the Georgia Electronic Design Center (GEDC), Intersil engineers, along with Georgia Tech students and faculty, will focus on creating advanced power management circuit designs.
Intersil and the Institute will also engage in joint development through a strategic alliance on advanced process technology development for semiconductors used in high-voltage power management and distribution. The new center will also utilize a technique developed at a Georgia Tech-founded company known as collaborative signal processing that removes performance-limiting impairments such as signal loss, dispersion, skew and noise.
This initiative is expected to spawn significant power savings in the electrical grid and tomorrow's data centers. The partnership is built on Intersil's longstanding leadership as an expert in the development of power management technologies and recent research advances in semiconductor fabrication processes.
"The clean and efficient generation, transmission and storage of power are key challenges of the twenty-first century," said Dave Bell, CEO, Intersil. "Intersil is delighted to be working closely with one of the world's finest educational institutions to develop innovative technologies that will meet our needs for smarter, greener and more efficient power solutions."
As energy costs soar and greenhouse gases accumulate, there is an increasing need for higher-voltage, higher-performance semiconductor technologies for power grids worldwide. Intersil and Georgia Tech are creating a strategic alliance to co-develop high-voltage power management circuits using breakthrough process technologies. In addition, Intersil will fund two graduate fellowships in electrical engineering.
"Georgia Tech's partnership with Intersil is an ideal example of academic and industrial leaders joining forces to co-develop advanced real-world technologies," said Georgia Tech President G.P. 'Bud' Peterson. "Working together, we will develop sustainable energy solutions and create jobs."
The new Analog Processing Center of Excellence (ACE) is a spinout of the Georgia Electronic Design Center and is located in the Centergy One building in Technology Square on the Georgia Tech campus. The facility already employs eight engineers who use state-of-the-art computer-aided design (CAD) tools to do complex analog systems simulation.
The announcement includes the opening of a major new development facility and the kickoff of several new programs dedicated to the research and development of advanced power management semiconductor technologies.
This unique alliance involves an on-campus Analog Processing Center of Excellence (ACE) and world-class research efforts across multiple Georgia Tech facilities. A keystone of the alliance will be the opening of a new 4,300 square-foot ACE Center on campus. At the Georgia Electronic Design Center (GEDC), Intersil engineers, along with Georgia Tech students and faculty, will focus on creating advanced power management circuit designs.
Intersil and the Institute will also engage in joint development through a strategic alliance on advanced process technology development for semiconductors used in high-voltage power management and distribution. The new center will also utilize a technique developed at a Georgia Tech-founded company known as collaborative signal processing that removes performance-limiting impairments such as signal loss, dispersion, skew and noise.
This initiative is expected to spawn significant power savings in the electrical grid and tomorrow's data centers. The partnership is built on Intersil's longstanding leadership as an expert in the development of power management technologies and recent research advances in semiconductor fabrication processes.
"The clean and efficient generation, transmission and storage of power are key challenges of the twenty-first century," said Dave Bell, CEO, Intersil. "Intersil is delighted to be working closely with one of the world's finest educational institutions to develop innovative technologies that will meet our needs for smarter, greener and more efficient power solutions."
As energy costs soar and greenhouse gases accumulate, there is an increasing need for higher-voltage, higher-performance semiconductor technologies for power grids worldwide. Intersil and Georgia Tech are creating a strategic alliance to co-develop high-voltage power management circuits using breakthrough process technologies. In addition, Intersil will fund two graduate fellowships in electrical engineering.
"Georgia Tech's partnership with Intersil is an ideal example of academic and industrial leaders joining forces to co-develop advanced real-world technologies," said Georgia Tech President G.P. 'Bud' Peterson. "Working together, we will develop sustainable energy solutions and create jobs."
The new Analog Processing Center of Excellence (ACE) is a spinout of the Georgia Electronic Design Center and is located in the Centergy One building in Technology Square on the Georgia Tech campus. The facility already employs eight engineers who use state-of-the-art computer-aided design (CAD) tools to do complex analog systems simulation.
Mentor Graphics delivers must-have reference for Open Verification methodology (OVM)
WILSONVILLE, USA: Mentor Graphics Corp. announced the availability of the latest edition of the Open Verification Methodology (OVM) Cookbook by Mark Glasser, Methodology Architect at Mentor Graphics. The OVM Cookbook is written for researchers and practitioners concerned with functional verification and published by Springer, one of the leading publishers in the fields of science, technology and medicine.
Definitive resource for OVM users
The Open Verification Methodology, based on IEEE Std. 1800-2005 SystemVerilog standard, is the first open, language-interoperable SystemVerilog verification methodology in the industry.
It provides a methodology and accompanying library that allows users to create modular, reusable verification environments in which components communicate with each other via standard transaction-level modeling interfaces. It also enables intra- and inter-company reuse through a common methodology and classes for sequential stimulus and block-to-system reuse.
The OVM Cookbook is designed to help both novice and experienced verification engineers master the OVM. It describes basic verification principles, explains the essentials of transaction-level modeling (TLM), and leads readers from a simple connection of a producer and a consumer through complete self-checking testbenches.
The OVM Cookbook takes a practical approach to learning about testbench construction and provides a series of examples, each of which solves a particular verification problem. The examples are thoroughly documented, complete and delivered with build and run scripts that allow you to execute them in a simulator and observe their behavior. All examples and code in the OVM Cookbook have been validated with the Questa platform.
The OVM Cookbook also presents the examples in a linear progression — from the most basic testbench, with just a pin-level stimulus generator, monitor, and DUT — to fairly sophisticated uses that involve stacked protocols, coverage, and automated testbench control. Each example in the progression introduces new concepts and shows how to implement those concepts in a straightforward manner.
Definitive resource for OVM users
The Open Verification Methodology, based on IEEE Std. 1800-2005 SystemVerilog standard, is the first open, language-interoperable SystemVerilog verification methodology in the industry.
It provides a methodology and accompanying library that allows users to create modular, reusable verification environments in which components communicate with each other via standard transaction-level modeling interfaces. It also enables intra- and inter-company reuse through a common methodology and classes for sequential stimulus and block-to-system reuse.
The OVM Cookbook is designed to help both novice and experienced verification engineers master the OVM. It describes basic verification principles, explains the essentials of transaction-level modeling (TLM), and leads readers from a simple connection of a producer and a consumer through complete self-checking testbenches.
The OVM Cookbook takes a practical approach to learning about testbench construction and provides a series of examples, each of which solves a particular verification problem. The examples are thoroughly documented, complete and delivered with build and run scripts that allow you to execute them in a simulator and observe their behavior. All examples and code in the OVM Cookbook have been validated with the Questa platform.
The OVM Cookbook also presents the examples in a linear progression — from the most basic testbench, with just a pin-level stimulus generator, monitor, and DUT — to fairly sophisticated uses that involve stacked protocols, coverage, and automated testbench control. Each example in the progression introduces new concepts and shows how to implement those concepts in a straightforward manner.
Cypress Envirosystems, Adura to bring smart control of HVAC and lighting systems to existing commercial buildings
SAN JOSE & SAN FRANCISCO, USA: Cypress Envirosystems, a subsidiary of Cypress Semiconductor Corp., and Adura Technologies, which creates turn-key wireless lighting management systems for commercial facilities, have formed a strategic sales and technology partnership.
As part of the partnership, both companies will sell a fully compatible solution that combines Cypress Envirosystems’ Wireless Pneumatic Thermostat (WPT) and the Adura LightPoint System (ALPS). The combined solutions can save between 30 and 50 percent of the overall energy use in a commercial building and enable facilities to connect to a Smart Grid.
HVAC and lighting are the top two energy users in most commercial buildings, typically representing 60 percent or more of the total energy use, and provide the biggest opportunities for energy savings.
Cypress Envirosystems' WPT system brings “smart” communication to widely used pneumatic HVAC thermostats at a fraction of the cost and disruption of conventional retrofits, providing an automated method to cut air-conditioning or heating during peak periods. This relieves strain on the electrical grid and reduces demand during periods of high usage – a key goal of Smart Grid implementation.
Similarly, ALPS is a cost-effective system for monitoring and managing lighting in existing buildings that is easy to install and use. ALPS provides a solution that scales from the individual light fixture to a floor, building or even a campus and enables automatic connection to the Smart Grid. The result is designed to reduce both costs and carbon emissions.
“Our partnership with Adura means customers can rely on a single vendor to deliver an integrated solution to control both HVAC and lighting,” said Harry Sim, CEO of Cypress Envirosystems. “The combined solution makes it easier than ever before to connect older commercial buildings to a Smart Grid.”
“Cypress Envirosystems’ wireless pneumatic thermostat is a great pairing for our ALPS solution because the two can be installed simultaneously with minimal disruption to occupants,” said Zach Gentry, Adura chief strategy officer and co-founder.
“The partnership helps advance Adura’s goal of extending the reach of its technology beyond lighting to other electrical devices throughout existing commercial buildings. With the current green technology incentives from the U.S. government and utilities, the solution provides an even faster return-on-investment.”
As part of the partnership, both companies will sell a fully compatible solution that combines Cypress Envirosystems’ Wireless Pneumatic Thermostat (WPT) and the Adura LightPoint System (ALPS). The combined solutions can save between 30 and 50 percent of the overall energy use in a commercial building and enable facilities to connect to a Smart Grid.
HVAC and lighting are the top two energy users in most commercial buildings, typically representing 60 percent or more of the total energy use, and provide the biggest opportunities for energy savings.
Cypress Envirosystems' WPT system brings “smart” communication to widely used pneumatic HVAC thermostats at a fraction of the cost and disruption of conventional retrofits, providing an automated method to cut air-conditioning or heating during peak periods. This relieves strain on the electrical grid and reduces demand during periods of high usage – a key goal of Smart Grid implementation.
Similarly, ALPS is a cost-effective system for monitoring and managing lighting in existing buildings that is easy to install and use. ALPS provides a solution that scales from the individual light fixture to a floor, building or even a campus and enables automatic connection to the Smart Grid. The result is designed to reduce both costs and carbon emissions.
“Our partnership with Adura means customers can rely on a single vendor to deliver an integrated solution to control both HVAC and lighting,” said Harry Sim, CEO of Cypress Envirosystems. “The combined solution makes it easier than ever before to connect older commercial buildings to a Smart Grid.”
“Cypress Envirosystems’ wireless pneumatic thermostat is a great pairing for our ALPS solution because the two can be installed simultaneously with minimal disruption to occupants,” said Zach Gentry, Adura chief strategy officer and co-founder.
“The partnership helps advance Adura’s goal of extending the reach of its technology beyond lighting to other electrical devices throughout existing commercial buildings. With the current green technology incentives from the U.S. government and utilities, the solution provides an even faster return-on-investment.”
Silicon Labs intros high-performance touch sense MCUs
AUSTIN, USA: Silicon Laboratories Inc., a leader in high-performance, analog-intensive, mixed-signal ICs, announced its entry into the human interface market with the introduction of the QuickSense portfolio, featuring the new C8051F800 microcontroller (MCU) family offering the industry’s fastest capacitive touch sense capability.
Leveraging Silicon Labs’ patent-pending sensing technology, the F800 family enables developers to add sophisticated touch sense interfaces to a wide range of consumer and industrial electronics products such as set-top boxes, residential light controls, thermostat controls, home security panels, commercial point-of-sale (POS) interfaces, portable electronic devices and small appliances.
The F800 MCU family features a patent-pending capacitance-to-digital converter (CDC) that enables best-in-class touch sensing in end products. The high-resolution CDC, which features a 40 microsecond acquisition time combined with a 25 MIPS CPU, provides sophisticated and highly responsive touch sense functions to replace mechanical buttons, sliders and wheels.
Advanced 16-bit resolution enables the CDC and firmware to compensate for changes in geometry and laminates that may occur between prototyping and production, making the F800 MCUs accurate but forgiving and improving end-product reliability. The CDC requires very little CPU overhead, allowing the MCU to perform other tasks and improving system efficiency.
Most electronic systems are being optimized to reduce power consumption, which is often a challenge when adding features like touch sensing. The F800 offers an innovative wake-on-touch capability, enabling the MCU to be placed in power-saving modes, yet wake quickly upon a touch sense event, ultimately saving overall system power.
The F800 touch sense MCU family is supported by the QuickSense Studio, a common development environment for all of the QuickSense devices including the F700 high-pin count touch sense MCUs and the Si1102/Si1120 proximity and ambient light sensors.
The QuickSense Studio configuration wizard allows designers, using an intuitive software GUI, to select which functions they want implemented such as capacitive touch sense buttons, sliders and wheels, and then easily auto-generate the software to set up and calibrate these functions. Designers can also test their implementation and review a graphical display of the system performance.
“Silicon Labs’ touch sense MCU family delivers accurate and fast performance along with a host of features that reduce system cost and improve reliability in space-constrained applications,” said Mark Thompson, vice president and general manager of Silicon Laboratories.
“When paired with our infrared sensors, our touch sense MCUs also enable smart motion sensing and deliver power savings, which translates into longer battery life and improved system efficiency. Supported by a common development environment, the QuickSense devices enable designers to quickly and reliably add advanced human interface features to their end products.”
Pricing and availability
The QuickSense F800 touch sense MCUs are supported by a low-cost development kit, the C8051F800DK. Priced at $99.99 (USD), the kit includes everything required to immediately begin system design including the QuickSense Studio, IDE, target board, cables and power supply. Reference designs and evaluation boards are also available at www.silabs.com/pr/QuickSense.
The F800 is available now in an SOIC16, QFN20 or QSOP24 package. Pricing begins at $1.56 (USD) in 10k quantities depending on pin out.
Leveraging Silicon Labs’ patent-pending sensing technology, the F800 family enables developers to add sophisticated touch sense interfaces to a wide range of consumer and industrial electronics products such as set-top boxes, residential light controls, thermostat controls, home security panels, commercial point-of-sale (POS) interfaces, portable electronic devices and small appliances.
The F800 MCU family features a patent-pending capacitance-to-digital converter (CDC) that enables best-in-class touch sensing in end products. The high-resolution CDC, which features a 40 microsecond acquisition time combined with a 25 MIPS CPU, provides sophisticated and highly responsive touch sense functions to replace mechanical buttons, sliders and wheels.
Advanced 16-bit resolution enables the CDC and firmware to compensate for changes in geometry and laminates that may occur between prototyping and production, making the F800 MCUs accurate but forgiving and improving end-product reliability. The CDC requires very little CPU overhead, allowing the MCU to perform other tasks and improving system efficiency.
Most electronic systems are being optimized to reduce power consumption, which is often a challenge when adding features like touch sensing. The F800 offers an innovative wake-on-touch capability, enabling the MCU to be placed in power-saving modes, yet wake quickly upon a touch sense event, ultimately saving overall system power.
The F800 touch sense MCU family is supported by the QuickSense Studio, a common development environment for all of the QuickSense devices including the F700 high-pin count touch sense MCUs and the Si1102/Si1120 proximity and ambient light sensors.
The QuickSense Studio configuration wizard allows designers, using an intuitive software GUI, to select which functions they want implemented such as capacitive touch sense buttons, sliders and wheels, and then easily auto-generate the software to set up and calibrate these functions. Designers can also test their implementation and review a graphical display of the system performance.
“Silicon Labs’ touch sense MCU family delivers accurate and fast performance along with a host of features that reduce system cost and improve reliability in space-constrained applications,” said Mark Thompson, vice president and general manager of Silicon Laboratories.
“When paired with our infrared sensors, our touch sense MCUs also enable smart motion sensing and deliver power savings, which translates into longer battery life and improved system efficiency. Supported by a common development environment, the QuickSense devices enable designers to quickly and reliably add advanced human interface features to their end products.”
Pricing and availability
The QuickSense F800 touch sense MCUs are supported by a low-cost development kit, the C8051F800DK. Priced at $99.99 (USD), the kit includes everything required to immediately begin system design including the QuickSense Studio, IDE, target board, cables and power supply. Reference designs and evaluation boards are also available at www.silabs.com/pr/QuickSense.
The F800 is available now in an SOIC16, QFN20 or QSOP24 package. Pricing begins at $1.56 (USD) in 10k quantities depending on pin out.
MontaVista announces additional platform support with MontaVista Linux 6
SANTA CLARA, USA: MontaVista Software Inc., the leader in embedded Linux commercialization, announced more new Market Specific Distributions (MSDs) for MontaVista Linux 6.
The new MSDs continue to expand the market specific focus of MVL6, delivering support for industrial automation, automotive, Android, portable multimedia devices, and multicore networking applications. All the new MSDs will be available this quarter and support processors from Cavium, Freescale, Intel, and Texas Instruments.
Market Specific Distributions are built on a common framework, and optimized for the respective hardware platform and its target market. Each MSD is feature compatible with the semiconductor Linux technology for that processor, and is fully tested and supported by MontaVista. In addition, MontaVista adds additional features required to deliver a complete, commercial quality product to market.
MontaVista becomes the first commercial embedded Linux vendor to announce support for Industrial Automation, bringing added features such as advanced power management, RT Preempt support, and Ethernet enablement for PROFINET.
For networking, the new MSDs support some of the newest multicore processors from Intel, Cavium, and Freescale, offering added features like semiconductor-optimized library support for multi core management, and advanced network features like SCTP, OpenSwan, libpcap, and IPsec tools.
The Android MSD offers advanced power management, advanced 2D/3D graphics, semiconductor advanced codec enablement, along with Bluetooth and WiFi connectivity. Similar to Android, the Portable Multimedia Device and Automotive MSDs offers advanced power management, advanced 2D/3D graphics, semiconductor advanced codec enablement, along with Bluetooth and WiFi connectivity, but also adds CAN (controller-area network) support.
Multifunction Printer (MFP) MSDs focus on value added features like advanced power management, advanced connectivity, memory management features like bigphysarea, and mass storage for larger HDDs.
The new MSDs continue to expand the market specific focus of MVL6, delivering support for industrial automation, automotive, Android, portable multimedia devices, and multicore networking applications. All the new MSDs will be available this quarter and support processors from Cavium, Freescale, Intel, and Texas Instruments.
Market Specific Distributions are built on a common framework, and optimized for the respective hardware platform and its target market. Each MSD is feature compatible with the semiconductor Linux technology for that processor, and is fully tested and supported by MontaVista. In addition, MontaVista adds additional features required to deliver a complete, commercial quality product to market.
MontaVista becomes the first commercial embedded Linux vendor to announce support for Industrial Automation, bringing added features such as advanced power management, RT Preempt support, and Ethernet enablement for PROFINET.
For networking, the new MSDs support some of the newest multicore processors from Intel, Cavium, and Freescale, offering added features like semiconductor-optimized library support for multi core management, and advanced network features like SCTP, OpenSwan, libpcap, and IPsec tools.
The Android MSD offers advanced power management, advanced 2D/3D graphics, semiconductor advanced codec enablement, along with Bluetooth and WiFi connectivity. Similar to Android, the Portable Multimedia Device and Automotive MSDs offers advanced power management, advanced 2D/3D graphics, semiconductor advanced codec enablement, along with Bluetooth and WiFi connectivity, but also adds CAN (controller-area network) support.
Multifunction Printer (MFP) MSDs focus on value added features like advanced power management, advanced connectivity, memory management features like bigphysarea, and mass storage for larger HDDs.
Silicon Labs intros industry’s fastest IR sensing ICs for human interface apps
AUSTIN, USA: Silicon Laboratories Inc., a leader in high-performance, analog-intensive, mixed-signal ICs, announced its entry into the human interface market with the introduction of the QuickSense portfolio, including the Si1102 proximity sensor and the Si1120 proximity and ambient light sensor, the industry’s fastest infrared sensing solutions.
Optimized for power efficiency, the Si1102 and Si1120 enable touchless human interface sensing and superior detection range. Ideal for a wide variety of sensing applications, the Si1102/20 devices are well suited for products that can benefit from system power savings, tamper detection/proofing and gesture interpretation, such as portable electronics, IP phones, displays, kiosks, dispensers, interactive toys, clock radios, and other consumer and industrial products.
The QuickSense Si1102 sensor enables an electronic device to quickly gauge its proximity to the user. For example, it can detect if a handset is near a user’s face and adjusts the display and lighting accordingly. The QuickSense Si1120 infrared proximity and ambient light sensor can also detect the ambient light in the external environment, allowing screen backlighting to be dimmed, for example, saving power.
When paired with the F700 and F800 touch sense microcontrollers (MCUs), the QuickSense solution enables smart motion sensing, giving designers a complete array of human interface technologies for their applications and fundamentally improving the end-user experience.
Historically, designing advanced human interface features into end products has been challenging and has introduced performance and power trade offs. Silicon Labs’ patented technologies and decade of infrared product design and manufacturing expertise has created a new method that eliminates the tradeoffs.
Unlike competing approaches that require the infrared LED to be pulsed multiple times over a long period for accurate measurements, the Si1102/20 devices use a patented single-pulse proximity measurement technique to achieve up to a 4000x improvement in power efficiency, resulting in longer battery life, a critical feature in portable applications.
With up to a 50 cm range (unaided by lenses), the Si1102/20 can easily power down displays and other functions when the user is not present. This power-saving capability is particularly appropriate for products such as appliances, security panels and IP phones.
The Si1120 device enables an innovative, patent-pending touchless proximity slider for gesturing, allowing end users to navigate without a physical touch but with simple gestures. The superior sensitivity that enables this touchless control feature has the added benefit of offering robust performance under a wide range of lighting conditions. It also enables the use of low-cost or low-profile infrared LEDs, often resulting in a significant system cost savings.
The Si1102 and Si1120 infrared sensor family is supported by the QuickSense Studio, a common development framework for all of the QuickSense devices including the F700 and F800 touch sense MCUs.
The QuickSense Studio configuration wizard allows designers, using an intuitive software GUI, to select which functions they want implemented such as capacitive touch sense buttons, sliders and wheels, and then easily auto-generate the software to set up and calibrate these functions. Designers can also test their implementation and review a graphical display of the system performance.
“Silicon Labs’ QuickSense human interface portfolio gives developers a robust, low-power human interface solution that’s easily configurable with a straightforward development environment,” said Mark Thompson, vice president and general manager of Silicon Laboratories. “No other supplier is able to match the speed and accuracy of our sensors or to combine intelligent optical sensing with touch sense MCUs, making Silicon Labs a single source for advanced, easy-to-use human interface technology.”
The QuickSense Si1102 proximity detector and Si1120 proximity and ambient light sensor are supported by reference designs and evaluation boards available at www.silabs.com/pr/QuickSense.
The Si1102 and Si1120 devices are available now in an 8-pin ODFN package and are priced at $0.90 and $1.05 (USD) respectively in 10k quantities.
Optimized for power efficiency, the Si1102 and Si1120 enable touchless human interface sensing and superior detection range. Ideal for a wide variety of sensing applications, the Si1102/20 devices are well suited for products that can benefit from system power savings, tamper detection/proofing and gesture interpretation, such as portable electronics, IP phones, displays, kiosks, dispensers, interactive toys, clock radios, and other consumer and industrial products.
The QuickSense Si1102 sensor enables an electronic device to quickly gauge its proximity to the user. For example, it can detect if a handset is near a user’s face and adjusts the display and lighting accordingly. The QuickSense Si1120 infrared proximity and ambient light sensor can also detect the ambient light in the external environment, allowing screen backlighting to be dimmed, for example, saving power.
When paired with the F700 and F800 touch sense microcontrollers (MCUs), the QuickSense solution enables smart motion sensing, giving designers a complete array of human interface technologies for their applications and fundamentally improving the end-user experience.
Historically, designing advanced human interface features into end products has been challenging and has introduced performance and power trade offs. Silicon Labs’ patented technologies and decade of infrared product design and manufacturing expertise has created a new method that eliminates the tradeoffs.
Unlike competing approaches that require the infrared LED to be pulsed multiple times over a long period for accurate measurements, the Si1102/20 devices use a patented single-pulse proximity measurement technique to achieve up to a 4000x improvement in power efficiency, resulting in longer battery life, a critical feature in portable applications.
With up to a 50 cm range (unaided by lenses), the Si1102/20 can easily power down displays and other functions when the user is not present. This power-saving capability is particularly appropriate for products such as appliances, security panels and IP phones.
The Si1120 device enables an innovative, patent-pending touchless proximity slider for gesturing, allowing end users to navigate without a physical touch but with simple gestures. The superior sensitivity that enables this touchless control feature has the added benefit of offering robust performance under a wide range of lighting conditions. It also enables the use of low-cost or low-profile infrared LEDs, often resulting in a significant system cost savings.
The Si1102 and Si1120 infrared sensor family is supported by the QuickSense Studio, a common development framework for all of the QuickSense devices including the F700 and F800 touch sense MCUs.
The QuickSense Studio configuration wizard allows designers, using an intuitive software GUI, to select which functions they want implemented such as capacitive touch sense buttons, sliders and wheels, and then easily auto-generate the software to set up and calibrate these functions. Designers can also test their implementation and review a graphical display of the system performance.
“Silicon Labs’ QuickSense human interface portfolio gives developers a robust, low-power human interface solution that’s easily configurable with a straightforward development environment,” said Mark Thompson, vice president and general manager of Silicon Laboratories. “No other supplier is able to match the speed and accuracy of our sensors or to combine intelligent optical sensing with touch sense MCUs, making Silicon Labs a single source for advanced, easy-to-use human interface technology.”
The QuickSense Si1102 proximity detector and Si1120 proximity and ambient light sensor are supported by reference designs and evaluation boards available at www.silabs.com/pr/QuickSense.
The Si1102 and Si1120 devices are available now in an 8-pin ODFN package and are priced at $0.90 and $1.05 (USD) respectively in 10k quantities.
Mitsubishi Electric selects eASIC for display wall cubes
SANTA CLARA, USA: eASIC Corp., a provider of NEW ASIC devices, announced that Mitsubishi Electric Corp. (Kyoto Works), a leading global manufacturer of display wall systems, has selected eASIC’s Nextreme NEW ASICs for its Seventy Series Display Wall Cube Systems. Mitsubishi Electric used eASIC’s Nextreme devices to replace existing gate-arrays and improve the video processing system performance by 50 percent.
Mitsubishi Electric is one of a number of manufacturers that are aggressively looking to increase performance and functionality by replacing legacy gate arrays with eASIC’s Nextreme NEW ASICs, and sustain their competitive edge in an uncertain economy. Traditional product upgrade paths for legacy gate arrays and standard cell ASICs are becoming increasingly unattractive in today’s harsh economic times due to long development and manufacturing times and high risk associated with state-of-the-art ASICs.
eASIC’s breakthrough Nextreme NEW ASICs feature a five-week turnaround time from tape-out to prototypes, low up-front development costs, making them a very attractive alternative to gate array and standard cell ASICs.
“We are excited to have a path to developing ASIC solutions quickly that are low in up-front development cost, quick to develop and gets us to market in rapid time to fully exploit our market opportunities,” said Shigenori Shibue, Manager Development Section Image & Information Systems Department at Mitsubishi Electric Kyoto Works. “We see eASIC’s Nextreme as a platform that we can use to create new high performance product derivatives quickly to respond to changing market needs, yet still be very competitive in volume production,” added Shibue.
Mitsubishi Electric’s Cube Seventy Series is the latest in a strong line of Display Wall Systems that spans over twenty product variants with up to 80" displays. Cube Display Wall Systems are used by specialist system integrators for their performance, longevity, reliability and ease of maintenance in mission-critical applications like utility control rooms, power stations, traffic control centers and crisis management suites.
“We are thrilled to be able to offer customers like Mitsubishi Electric a low risk alternative to designing ASICs,” said Jasbinder Bhoot, Vice President of Worldwide Marketing at eASIC. “Helping our customers to deliver competitive solutions quickly, in turn helps their customers to loosen the grip on their purse strings. We are focusing on doing our part in helping revive our stagnant economy, one customer at a time,” added Bhoot.
Mitsubishi Electric is one of a number of manufacturers that are aggressively looking to increase performance and functionality by replacing legacy gate arrays with eASIC’s Nextreme NEW ASICs, and sustain their competitive edge in an uncertain economy. Traditional product upgrade paths for legacy gate arrays and standard cell ASICs are becoming increasingly unattractive in today’s harsh economic times due to long development and manufacturing times and high risk associated with state-of-the-art ASICs.
eASIC’s breakthrough Nextreme NEW ASICs feature a five-week turnaround time from tape-out to prototypes, low up-front development costs, making them a very attractive alternative to gate array and standard cell ASICs.
“We are excited to have a path to developing ASIC solutions quickly that are low in up-front development cost, quick to develop and gets us to market in rapid time to fully exploit our market opportunities,” said Shigenori Shibue, Manager Development Section Image & Information Systems Department at Mitsubishi Electric Kyoto Works. “We see eASIC’s Nextreme as a platform that we can use to create new high performance product derivatives quickly to respond to changing market needs, yet still be very competitive in volume production,” added Shibue.
Mitsubishi Electric’s Cube Seventy Series is the latest in a strong line of Display Wall Systems that spans over twenty product variants with up to 80" displays. Cube Display Wall Systems are used by specialist system integrators for their performance, longevity, reliability and ease of maintenance in mission-critical applications like utility control rooms, power stations, traffic control centers and crisis management suites.
“We are thrilled to be able to offer customers like Mitsubishi Electric a low risk alternative to designing ASICs,” said Jasbinder Bhoot, Vice President of Worldwide Marketing at eASIC. “Helping our customers to deliver competitive solutions quickly, in turn helps their customers to loosen the grip on their purse strings. We are focusing on doing our part in helping revive our stagnant economy, one customer at a time,” added Bhoot.
Hitachi High-Technologies to acquire Renesas' semiconductor manufacturing equipment business
TOKYO, JAPAN: Hitachi High-Technologies Corp. and Renesas Technology Corp. announced a basic agreement for the transfer of the semiconductor manufacturing equipment business of wholly owned Renesas subsidiary Renesas Eastern Japan Semiconductor Inc. to Hitachi High-Tech Instruments Co. Ltd., a wholly owned subsidiary of Hitachi High-Technologies. Scheduled for next spring, this business transfer is expected to enhance Hitachi High-Technologies’ semiconductor manufacturing equipment business and improve management efficiency.
Renesas Eastern Japan Semiconductor is currently charged with the development and manufacture of semiconductor manufacturing equipment, with Hitachi High-Technologies largely responsible for global sales of these products. However, both Hitachi High-Technologies and Renesas have acknowledged that the integrated management of development through to manufacturing, sales and services pertaining to semiconductor manufacturing equipment is the most desirable option going forward.
This recognition applies not only to the ability to respond flexibly to the changing market environment in recent years, further business structure enhancements, and improved management efficiency, but also to efforts to accelerate the development of new products that reflect customer needs. With this latest business transfer, Hitachi High-Technologies aims to establish and strengthen its business base in the semiconductor back-end process equipment business, where market expansion is widely anticipated.
Specifically, the transfer will see Renesas Eastern Japan Semiconductor as the absorbed company, with Hitachi High-Tech Instruments as the surviving company. Through synergies with technological and development capabilities honed by Hitachi High-Tech Instruments in the surface mount systems and semiconductor manufacturing equipment businesses over the years, Hitachi High-Technologies will strive to expand business by bringing even more superior products to market.
Renesas, for its part, is pursuing various measures targeting its production structure, employee resource optimization, and other areas with the goal of improving and enhancing a stable management base – one capable of securing profits even under the adverse business climate that has emerged since last year. The business transfer represents an important decision for Renesas in terms of promoting effective resource utilization for the enhancement of its core competency, the microcontroller business.
In pursuing the swift completion of a variety of similar measures going forward, Renesas is determined to realize a more stable management base and a stronger business base for its own operations.
Due diligence for this transfer of the semiconductor manufacturing equipment business is presently moving forward. Based on the outcome of this process, Hitachi High-Technologies, Hitachi High-Tech Instruments, Renesas, and Renesas Eastern Japan Semiconductor are scheduled to sign a final contract in December 2009. This transfer of the semiconductor manufacturing equipment business has negligible impact on the FY2009 consolidated financial results of Hitachi High-Technologies.
Renesas Eastern Japan Semiconductor is currently charged with the development and manufacture of semiconductor manufacturing equipment, with Hitachi High-Technologies largely responsible for global sales of these products. However, both Hitachi High-Technologies and Renesas have acknowledged that the integrated management of development through to manufacturing, sales and services pertaining to semiconductor manufacturing equipment is the most desirable option going forward.
This recognition applies not only to the ability to respond flexibly to the changing market environment in recent years, further business structure enhancements, and improved management efficiency, but also to efforts to accelerate the development of new products that reflect customer needs. With this latest business transfer, Hitachi High-Technologies aims to establish and strengthen its business base in the semiconductor back-end process equipment business, where market expansion is widely anticipated.
Specifically, the transfer will see Renesas Eastern Japan Semiconductor as the absorbed company, with Hitachi High-Tech Instruments as the surviving company. Through synergies with technological and development capabilities honed by Hitachi High-Tech Instruments in the surface mount systems and semiconductor manufacturing equipment businesses over the years, Hitachi High-Technologies will strive to expand business by bringing even more superior products to market.
Renesas, for its part, is pursuing various measures targeting its production structure, employee resource optimization, and other areas with the goal of improving and enhancing a stable management base – one capable of securing profits even under the adverse business climate that has emerged since last year. The business transfer represents an important decision for Renesas in terms of promoting effective resource utilization for the enhancement of its core competency, the microcontroller business.
In pursuing the swift completion of a variety of similar measures going forward, Renesas is determined to realize a more stable management base and a stronger business base for its own operations.
Due diligence for this transfer of the semiconductor manufacturing equipment business is presently moving forward. Based on the outcome of this process, Hitachi High-Technologies, Hitachi High-Tech Instruments, Renesas, and Renesas Eastern Japan Semiconductor are scheduled to sign a final contract in December 2009. This transfer of the semiconductor manufacturing equipment business has negligible impact on the FY2009 consolidated financial results of Hitachi High-Technologies.
Microsemi to close Scottsdale manufacturing facility
IRVINE, USA: Microsemi Corp., a leading manufacturer of high performance analog mixed signal integrated circuits and high reliability semiconductors, announced consolidation plans that will result in the closure of its manufacturing facility in Scottsdale, Arizona by April 2011.
The company said that the action is part of its ongoing program to reduce inventory levels and improve its overall cost structure and business model as it grows in both new and existing markets.
Microsemi expects that after the consolidation activities are completed in 18 months, annual savings benefiting operating income will range from $20 million to $25 million. The gross margin impact related to these savings would have equated to 400 to 500 basis points when applied to fiscal year 2009 consensus revenue estimates.
In the fourth quarter of fiscal year 2009, Microsemi expects to record one-time charges for restructuring and other reserves of between $24 million and $26 million for severance and related benefits, lease termination and facility closure costs. Additional consolidation costs of $3 million may be incurred over the closure period.
These costs will not impact the company's non-GAAP guidance for its fourth quarter of fiscal year 2009. The company reiterates that the first quarter ending December 27, 2009 will be the final one in which transitional idle capacity will be used in describing financial performance.
The Scottsdale facility's remaining product lines will be transferred to other Microsemi facilities similar to other transfers that have occurred to date. Microsemi will obtain all required DSCC certifications related to the closure and expects to transfer production throughout the consolidation period. Microsemi will collaborate closely with its customers to ensure an efficient transition.
"Microsemi is committed to optimizing its business model and cost structure as we increase the scope of our existing business, expand into new markets and grow both organically and via acquisition," said James J. Peterson, Microsemi President and Chief Executive Officer. "As Microsemi extends its leadership in a range of global markets, we will also remain diligent in ensuring that we continue to provide the highest level of service to our customers while we protect and enhance both our near- and long-term profitability."
The company said that the action is part of its ongoing program to reduce inventory levels and improve its overall cost structure and business model as it grows in both new and existing markets.
Microsemi expects that after the consolidation activities are completed in 18 months, annual savings benefiting operating income will range from $20 million to $25 million. The gross margin impact related to these savings would have equated to 400 to 500 basis points when applied to fiscal year 2009 consensus revenue estimates.
In the fourth quarter of fiscal year 2009, Microsemi expects to record one-time charges for restructuring and other reserves of between $24 million and $26 million for severance and related benefits, lease termination and facility closure costs. Additional consolidation costs of $3 million may be incurred over the closure period.
These costs will not impact the company's non-GAAP guidance for its fourth quarter of fiscal year 2009. The company reiterates that the first quarter ending December 27, 2009 will be the final one in which transitional idle capacity will be used in describing financial performance.
The Scottsdale facility's remaining product lines will be transferred to other Microsemi facilities similar to other transfers that have occurred to date. Microsemi will obtain all required DSCC certifications related to the closure and expects to transfer production throughout the consolidation period. Microsemi will collaborate closely with its customers to ensure an efficient transition.
"Microsemi is committed to optimizing its business model and cost structure as we increase the scope of our existing business, expand into new markets and grow both organically and via acquisition," said James J. Peterson, Microsemi President and Chief Executive Officer. "As Microsemi extends its leadership in a range of global markets, we will also remain diligent in ensuring that we continue to provide the highest level of service to our customers while we protect and enhance both our near- and long-term profitability."
Wednesday, October 28, 2009
No double booking in this semiconductor recovery
EL SEGUNDO, USA: Despite fears that buyers are inflating semiconductor purchases in order to guarantee adequate supplies, there’s no indication that chip purchasers are engaging in double booking, according to iSuppli Corp.
Double booking is a phenomenon wherein buyers order much larger quantities of chips than they need, making the sales totals appear bigger than they really are. This situation can occur when electronics demand rises while inventories are low.
Such circumstances in the past have cased purchasers to double book out of fear that they will be caught with short supplies, artificially boosting sales totals. This can later cause a sales letdown as orders are cancelled or scaled back.
However, this doesn’t appear to be the case in late 2009.
“In their earnings announcements, prominent semiconductor suppliers all reported they saw no signs of the dreaded double-booking phenomenon during the third quarter,” said Carlo Ciriello, analyst, financial services, for iSuppli. “This should give the semiconductor industry confidence that the magnitude of the current recovery accurately reflects real demand levels.”
In the books
Comments on double booking from semiconductor suppliers in third-quarter earnings calls included:
* “…we don't have any evidence of double ordering,” noted Texas Instruments Inc.
* “(We are) following every week the run rate of bookings from major customers—be they distributors or OEMs—and (we) do not see any major discrepancy in the last three months,” said STMicroelectronics.
* “…we have seen no evidence whatsoever of any double ordering,” Intersil observed.
Semiconductors on the rise
The lack of double ordering comes amid other encouraging news for the global semiconductor industry. Global chip revenue amounted to $58.3 billion in the third quarter, up 10.6 percent from $52.8 billion in the second quarter, based on iSuppli’s preliminary forecast.
Furthermore, worldwide semiconductor inventories have been declining. When expressed in terms of revenue, global chip stockpiles fell 2.3 percent in the third quarter compared to the second.
These positive factors point to continued strength in the fourth quarter and a return to annual revenue growth in 2010.
Worldwide semiconductor revenue is set to rise by 3.5 percent sequentially in the fourth quarter. However, on a year-over-year basis, revenue is expected to rise by 10.6 percent in the fourth quarter of 2009. The fourth quarter will mark the first quarter in 2009 that revenue has risen compared to the same period a year earlier.
Global semiconductor revenue is set to rise by 13.8 percent in 2010, following a 16.5 percent contraction in 2009.
Source: iSuppli, USA
Double booking is a phenomenon wherein buyers order much larger quantities of chips than they need, making the sales totals appear bigger than they really are. This situation can occur when electronics demand rises while inventories are low.
Such circumstances in the past have cased purchasers to double book out of fear that they will be caught with short supplies, artificially boosting sales totals. This can later cause a sales letdown as orders are cancelled or scaled back.
However, this doesn’t appear to be the case in late 2009.
“In their earnings announcements, prominent semiconductor suppliers all reported they saw no signs of the dreaded double-booking phenomenon during the third quarter,” said Carlo Ciriello, analyst, financial services, for iSuppli. “This should give the semiconductor industry confidence that the magnitude of the current recovery accurately reflects real demand levels.”
In the books
Comments on double booking from semiconductor suppliers in third-quarter earnings calls included:
* “…we don't have any evidence of double ordering,” noted Texas Instruments Inc.
* “(We are) following every week the run rate of bookings from major customers—be they distributors or OEMs—and (we) do not see any major discrepancy in the last three months,” said STMicroelectronics.
* “…we have seen no evidence whatsoever of any double ordering,” Intersil observed.
Semiconductors on the rise
The lack of double ordering comes amid other encouraging news for the global semiconductor industry. Global chip revenue amounted to $58.3 billion in the third quarter, up 10.6 percent from $52.8 billion in the second quarter, based on iSuppli’s preliminary forecast.
Furthermore, worldwide semiconductor inventories have been declining. When expressed in terms of revenue, global chip stockpiles fell 2.3 percent in the third quarter compared to the second.
These positive factors point to continued strength in the fourth quarter and a return to annual revenue growth in 2010.
Worldwide semiconductor revenue is set to rise by 3.5 percent sequentially in the fourth quarter. However, on a year-over-year basis, revenue is expected to rise by 10.6 percent in the fourth quarter of 2009. The fourth quarter will mark the first quarter in 2009 that revenue has risen compared to the same period a year earlier.
Global semiconductor revenue is set to rise by 13.8 percent in 2010, following a 16.5 percent contraction in 2009.
Source: iSuppli, USA
Synopsys announces 40th DesignWare audio codec IP
MOUNTAIN VIEW, USA: Synopsys Inc. today announced the availability of its 40th audio codec IP with the release of the DesignWare 96 dB Hi-Fi Audio IP in the SMIC 65nm process.
Synopsys has been a leading provider of audio IP for more than twelve years and provides designers with high-quality audio IP solutions supporting 20 different process nodes, from 180-nm to 65-nm processes and with performance levels from 80 dB to 103 dB.
By providing a broad portfolio of silicon-proven audio IP solutions that is backed by local technical support experts across all major geographical regions and shipped in more than 100 million units, Synopsys has gained the trust of designers in helping them lower integration risk, speed time-to-market and achieve first-pass silicon success for their SoC designs.
"SMIC and Synopsys have had a successful long term collaboration on the development of DesignWare Mixed-Signal IP for SMIC's process technologies," said Max Liu, vice president of Design Services center at SMIC.
"With the availability of the DesignWare Audio Codec in the SMIC 65 LL process, we are enabling our mutual customers to integrate these important audio functions into their SoCs and quickly ramp into volume production."
The DesignWare Audio IP solution offers a comprehensive feature set for audio record and playback channels. The record channel includes features such as analog-to-digital converters (ADCs), volume control, channel filters, microphone biasing and microphone amplifiers. The playback channel includes elements such as digital-to-analog converters (DACs), channel filters, mixers, volume control and line, headset and loud speaker drivers.
These features enable designers to deliver the best audio capabilities for cost- and power-sensitive consumer electronic applications. By offering audio codec solutions that deliver high performance margins and are designed to be robust in a noisy SoC environment, Synopsys significantly eases the integration effort of audio IP into embedded designs.
"As a leading provider of analog IP, Synopsys continues to expand its silicon-proven DesignWare IP portfolio with flexible, high-quality audio IP solutions that support a broad range of application requirements and deliver performance levels similar to discrete components," said John Koeter, vice president of marketing for the Solutions Group at Synopsys.
"With proven solutions in 20 different process technologies and more than 100 million units shipped, Synopsys' high-quality DesignWare Audio IP solutions are trusted by designers to help them reduce integration risk and achieve the performance, power and area requirements of their feature-rich audio SoCs."
The DesignWare 96 dB Hi-Fi Audio IP for SMIC 65-nm processes is expected to be available in Q4 2009. The DesignWare Audio IP solutions are available in leading foundries and advanced technology processes from 180-nm to 65-nm.
Synopsys has been a leading provider of audio IP for more than twelve years and provides designers with high-quality audio IP solutions supporting 20 different process nodes, from 180-nm to 65-nm processes and with performance levels from 80 dB to 103 dB.
By providing a broad portfolio of silicon-proven audio IP solutions that is backed by local technical support experts across all major geographical regions and shipped in more than 100 million units, Synopsys has gained the trust of designers in helping them lower integration risk, speed time-to-market and achieve first-pass silicon success for their SoC designs.
"SMIC and Synopsys have had a successful long term collaboration on the development of DesignWare Mixed-Signal IP for SMIC's process technologies," said Max Liu, vice president of Design Services center at SMIC.
"With the availability of the DesignWare Audio Codec in the SMIC 65 LL process, we are enabling our mutual customers to integrate these important audio functions into their SoCs and quickly ramp into volume production."
The DesignWare Audio IP solution offers a comprehensive feature set for audio record and playback channels. The record channel includes features such as analog-to-digital converters (ADCs), volume control, channel filters, microphone biasing and microphone amplifiers. The playback channel includes elements such as digital-to-analog converters (DACs), channel filters, mixers, volume control and line, headset and loud speaker drivers.
These features enable designers to deliver the best audio capabilities for cost- and power-sensitive consumer electronic applications. By offering audio codec solutions that deliver high performance margins and are designed to be robust in a noisy SoC environment, Synopsys significantly eases the integration effort of audio IP into embedded designs.
"As a leading provider of analog IP, Synopsys continues to expand its silicon-proven DesignWare IP portfolio with flexible, high-quality audio IP solutions that support a broad range of application requirements and deliver performance levels similar to discrete components," said John Koeter, vice president of marketing for the Solutions Group at Synopsys.
"With proven solutions in 20 different process technologies and more than 100 million units shipped, Synopsys' high-quality DesignWare Audio IP solutions are trusted by designers to help them reduce integration risk and achieve the performance, power and area requirements of their feature-rich audio SoCs."
The DesignWare 96 dB Hi-Fi Audio IP for SMIC 65-nm processes is expected to be available in Q4 2009. The DesignWare Audio IP solutions are available in leading foundries and advanced technology processes from 180-nm to 65-nm.
ST adopts ARM Cortex-A9 for home entertainment applications
INDIA: STMicroelectronics and ARM announced today that ST has adopted the ARM Cortex-A9 MPCore processor, in addition to the Mali-400 graphics processor, for its upcoming set-top-box and digital TV system-on-chip (SoC) ICs.
The Cortex-A9 MPCore processor provides ST with the scalable high performance required to enable the high-bandwidth broadband and broadcast content being streamed into homes, while significantly improving power efficiency when compared to alternative solutions.
The adoption of ARM technology enables ST to build upon the expertise accumulated during its SoC development with its successful ST-40 processor, and also signals the company’s intention to base its next-generation range of HDTV SoCs on ARM technology.
ST already has vast experience in developing cutting-edge complex SoCs based on ARM technology for various applications in wireless, computer, automotive and industrial markets. By adopting the Cortex-A9 MPCore processor for home-entertainment markets, ST is also able to access the comprehensive and expanding software ecosystem around the Cortex-A9 MPCore processor, including Adobe Flash technology and leading web browsers such as Opera, to provide compelling multimedia performance.
“Building our next-generation HDTV consumer devices around the high-performance ARM architecture will enable us to continue to deliver best-in-class devices for our customers, while providing a simple migration route from our existing ST-40 based chips,” said Philippe Lambinet, executive vice president, Home Entertainment and Display Group, STMicroelectronics. “In addition, our customers now gain access to the broad ARM ecosystem of support around the processors.”
“The adoption of ARM technology by ST, one of the world leaders for home-entertainment ICs, is a highly visible demonstration of the growing momentum behind our Cortex processors and Mali GPUs (Graphics Processor Units) in applications such as DTV and set-top boxes,” said Mike Inglis, executive vice president, Processor Division, ARM. “Our leadership position in the development of high-performance, low-power multicore technology enables ARM to provide the scalable performance demanded by next-generation consumer devices.”
ST has also licensed the ARM Mali-400 MP multicore scalable graphics processing unit (GPU) technology to meet the growing demand for exciting new graphical user interfaces and the needs of increasingly sophisticated web-based services.
The Mali-400 GPU enables ST to provide ‘1080p’ 3D user interfaces conforming to the Khronos OpenGL ES 2.0 API (Application Programming Interface), and helps deliver the seamless composition of graphics and video for the best possible user experience from the next wave of web-based interactive services.
The first ST devices for home entertainment applications integrating the Cortex-A9 MPCore and Mali-400MP will be available in mid-2010.
The Cortex-A9 MPCore processor provides ST with the scalable high performance required to enable the high-bandwidth broadband and broadcast content being streamed into homes, while significantly improving power efficiency when compared to alternative solutions.
The adoption of ARM technology enables ST to build upon the expertise accumulated during its SoC development with its successful ST-40 processor, and also signals the company’s intention to base its next-generation range of HDTV SoCs on ARM technology.
ST already has vast experience in developing cutting-edge complex SoCs based on ARM technology for various applications in wireless, computer, automotive and industrial markets. By adopting the Cortex-A9 MPCore processor for home-entertainment markets, ST is also able to access the comprehensive and expanding software ecosystem around the Cortex-A9 MPCore processor, including Adobe Flash technology and leading web browsers such as Opera, to provide compelling multimedia performance.
“Building our next-generation HDTV consumer devices around the high-performance ARM architecture will enable us to continue to deliver best-in-class devices for our customers, while providing a simple migration route from our existing ST-40 based chips,” said Philippe Lambinet, executive vice president, Home Entertainment and Display Group, STMicroelectronics. “In addition, our customers now gain access to the broad ARM ecosystem of support around the processors.”
“The adoption of ARM technology by ST, one of the world leaders for home-entertainment ICs, is a highly visible demonstration of the growing momentum behind our Cortex processors and Mali GPUs (Graphics Processor Units) in applications such as DTV and set-top boxes,” said Mike Inglis, executive vice president, Processor Division, ARM. “Our leadership position in the development of high-performance, low-power multicore technology enables ARM to provide the scalable performance demanded by next-generation consumer devices.”
ST has also licensed the ARM Mali-400 MP multicore scalable graphics processing unit (GPU) technology to meet the growing demand for exciting new graphical user interfaces and the needs of increasingly sophisticated web-based services.
The Mali-400 GPU enables ST to provide ‘1080p’ 3D user interfaces conforming to the Khronos OpenGL ES 2.0 API (Application Programming Interface), and helps deliver the seamless composition of graphics and video for the best possible user experience from the next wave of web-based interactive services.
The first ST devices for home entertainment applications integrating the Cortex-A9 MPCore and Mali-400MP will be available in mid-2010.
Agilent and Stanford University to explore new class of nanoscale devices
SANTA CLARA, USA: Agilent Technologies Inc. is collaborating with Stanford University in a research program designed to explore a new class of nanoscale devices using a combinations of the scanning probe microscope (SPM) and atomic layer deposition (ALD).
The research will enable the rapid prototyping and characterization of nanoscale devices with breakthroughs in sub 10 nm scale for a wide range of applications.
“The novel nanostructures will be fabricated and characterized in-situ in this unique SPM-ALD tool in order to rapidly prototype a wide variety of next-generation devices,” said Fritz Prinz, professor and chairman, mechanical engineering, Stanford University.
“The SPM-ALD tool will enable us to build devices which take advantage of the quantum confinement effects present at small length scales, length scales that could not be accessed with traditional lithography methods. These devices can only be built with manufacturing tools possessing extraordinary spatial resolution.”
This program focuses on the integration of ALD, a thin-film technique capable of sub-nanometer precision in thickness, with the nanometer lateral resolution SPM in a drive to extend the capability of scanning probe techniques to prototyping and device fabrication.
Historically, performance of electronic devices has been limited by traditional manufacturing methods, such as optical and electron beam lithography, which are not likely to deliver feature resolution significantly below 20 nm. However, the quantum mechanical effects of electron confinement in devices 10 nm or smaller result in phenomena qualitatively different than those seen in larger devices. Taking advantage of this quantum confinement is predicted to result in a new paradigm for electronic devices.
“We chose Stanford University for this grant for the recognized expertise of professor Prinz and team, and the close alignment between the proposed research and the future of Agilent’s SPM business,” said Jack Wenstrand, Agilent’s director of university relations.
The work between Agilent and Stanford University is part of Agilent’s University Relations Program, which facilitates collaborations with universities around the world. Agilent supports scientific work with universities worldwide through direct grants and collaborative research.
The research will enable the rapid prototyping and characterization of nanoscale devices with breakthroughs in sub 10 nm scale for a wide range of applications.
“The novel nanostructures will be fabricated and characterized in-situ in this unique SPM-ALD tool in order to rapidly prototype a wide variety of next-generation devices,” said Fritz Prinz, professor and chairman, mechanical engineering, Stanford University.
“The SPM-ALD tool will enable us to build devices which take advantage of the quantum confinement effects present at small length scales, length scales that could not be accessed with traditional lithography methods. These devices can only be built with manufacturing tools possessing extraordinary spatial resolution.”
This program focuses on the integration of ALD, a thin-film technique capable of sub-nanometer precision in thickness, with the nanometer lateral resolution SPM in a drive to extend the capability of scanning probe techniques to prototyping and device fabrication.
Historically, performance of electronic devices has been limited by traditional manufacturing methods, such as optical and electron beam lithography, which are not likely to deliver feature resolution significantly below 20 nm. However, the quantum mechanical effects of electron confinement in devices 10 nm or smaller result in phenomena qualitatively different than those seen in larger devices. Taking advantage of this quantum confinement is predicted to result in a new paradigm for electronic devices.
“We chose Stanford University for this grant for the recognized expertise of professor Prinz and team, and the close alignment between the proposed research and the future of Agilent’s SPM business,” said Jack Wenstrand, Agilent’s director of university relations.
The work between Agilent and Stanford University is part of Agilent’s University Relations Program, which facilitates collaborations with universities around the world. Agilent supports scientific work with universities worldwide through direct grants and collaborative research.
NVIDIA adopts Synopsys Yield Explorer to reduce time to volume
MOUNTAIN VIEW, USA: Synopsys Inc. today announced that NVIDIA Corp. has adopted Synopsys' Yield Explorer solution for yield analysis and yield ramp.
NVIDIA, which invented the graphics processing unit, selected Yield Explorer because of its ability to coherently combine and cross-correlate large volumes of data from the design, fab and test domains to quickly identify dominant failure mechanisms. This is accomplished through volume diagnostics based on TetraMAX ATPG and other advanced analysis applications.
"At NVIDIA, we face an increasingly challenging production ramp at each successive nanometer node," said Bruce Cory, manager DFx technology at NVIDIA. "We selected Yield Explorer because this solution has all the traditional yield analysis features combined with unique design-centric, volume diagnostics capabilities. Yield Explorer was able to handle gigabytes of data per day from the test floor and combine it with the design and fab data."
Ramping new devices to volume production with good yield has evolved into a complex multi-dimensional project at nanometer nodes. On one hand, technical teams must rely on thorough characterization of new devices to set up effective testing, monitoring, control and root-cause analysis flows.
On the other, operational efforts require careful and thorough trimming of these flows to optimize yield management at the lowest cost. The key to solving these divergent needs is to extract the right type and amount of data from the testing of each chip, and to use it in concert with other relevant design and manufacturing data.
Traditional yield management tools were not created to work with such large and diverse volumes of data, severely limiting the quality of control and analysis possible. Yield Explorer demonstrates unparalleled flexibility in accommodating a very broad range of data types, managing very high data rates and enabling effective cross correlations between the diverse data types.
Besides opening up these technical possibilities, Yield Explorer also empowers operational teams to make well-informed decisions about production planning and supply chain management by providing customized technical analysis reports to be combined with business process data.
"IC vendors doing high-volume designs at 45 nanometers and below, like NVIDIA, see great value in consolidating all volume ramp activities in a single tool," said Howard Ko, senior vice president and general manager, Synopsys Silicon Engineering Group.
"Yield Explorer uniquely combines large volumes of data with highly flexible modes of yield analysis and control, such as volume diagnostics, favored by product engineers on ASIC teams worldwide."
NVIDIA, which invented the graphics processing unit, selected Yield Explorer because of its ability to coherently combine and cross-correlate large volumes of data from the design, fab and test domains to quickly identify dominant failure mechanisms. This is accomplished through volume diagnostics based on TetraMAX ATPG and other advanced analysis applications.
"At NVIDIA, we face an increasingly challenging production ramp at each successive nanometer node," said Bruce Cory, manager DFx technology at NVIDIA. "We selected Yield Explorer because this solution has all the traditional yield analysis features combined with unique design-centric, volume diagnostics capabilities. Yield Explorer was able to handle gigabytes of data per day from the test floor and combine it with the design and fab data."
Ramping new devices to volume production with good yield has evolved into a complex multi-dimensional project at nanometer nodes. On one hand, technical teams must rely on thorough characterization of new devices to set up effective testing, monitoring, control and root-cause analysis flows.
On the other, operational efforts require careful and thorough trimming of these flows to optimize yield management at the lowest cost. The key to solving these divergent needs is to extract the right type and amount of data from the testing of each chip, and to use it in concert with other relevant design and manufacturing data.
Traditional yield management tools were not created to work with such large and diverse volumes of data, severely limiting the quality of control and analysis possible. Yield Explorer demonstrates unparalleled flexibility in accommodating a very broad range of data types, managing very high data rates and enabling effective cross correlations between the diverse data types.
Besides opening up these technical possibilities, Yield Explorer also empowers operational teams to make well-informed decisions about production planning and supply chain management by providing customized technical analysis reports to be combined with business process data.
"IC vendors doing high-volume designs at 45 nanometers and below, like NVIDIA, see great value in consolidating all volume ramp activities in a single tool," said Howard Ko, senior vice president and general manager, Synopsys Silicon Engineering Group.
"Yield Explorer uniquely combines large volumes of data with highly flexible modes of yield analysis and control, such as volume diagnostics, favored by product engineers on ASIC teams worldwide."
Applied Materials delivers advanced copper technology for FPD manufacturing on AKT-PiVot PVD system
YOKOHAMA, JAPAN: Applied Materials, Inc. today announced that it has expanded its breakthrough AKT- PiVot 55KV PVD system to include advanced copper deposition processing for manufacturing TFT-LCD flat panel displays (FPD).
Using the PiVot system, FPD manufacturers can transition from aluminum to copper bus lines to achieve faster pixel response and lower power consumption in next-generation LCD-TV panels.
The PiVot system delivers benchmark, cost-efficient copper deposition performance by combining high deposition rates, efficient target utilization and long maintenance intervals with enhanced film morphology.
Key to the PiVot system’s superior film quality is its proprietary rotary cathode design that employs unique deposition modulation technology to deposit copper layers with uniform grain distribution, low resistivity and high thickness uniformity.
The PiVot system also enables greater than 80% target utilization to provide significant savings in expensive target material.
“By providing unmatched film properties and efficient raw material utilization, our AKT-PiVot system answers the critical needs of today’s LCD TV market that is driven by demand for larger and ultra-high definition panels and requires innovations in deposition technology to deliver high-quality films at a low cost-of-ownership,” said Dr. Mark Pinto, senior vice president and general manager of Applied’s Display, and Energy and Environmental Solutions groups.
“The system’s proven productivity and proprietary copper process technology create a powerful addition to our strong portfolio of FPD solutions.”
The PiVot system’s modular architecture enables a large variety of configurations to maximize production efficiency, eliminating the bottlenecks caused by different process times in different modules in a traditional in-line machine.
The PiVot system’s cluster-like arrangement also allows continuous operation during individual module maintenance. Combined with long maintenance intervals and extended target life, PiVot system provides the highest availability and longest continuous production time in the industry.
The AKT-PiVot 55KV PVD system’s superior copper deposition technology will be showcased at Applied Materials’ booth at FPD International and Green Device 2009 in Yokohama, Japan, on October 28-30 as part of Applied’s portfolio of advanced FPD manufacturing solutions.
These solutions include PECVD, PVD for TFT-array and color filter, electron beam array test technologies, factory automation and service. In addition, Applied Materials will display its green device manufacturing technologies, including solar, low-e glass coating and roll-to-roll deposition for flexible PV and display.
Using the PiVot system, FPD manufacturers can transition from aluminum to copper bus lines to achieve faster pixel response and lower power consumption in next-generation LCD-TV panels.
The PiVot system delivers benchmark, cost-efficient copper deposition performance by combining high deposition rates, efficient target utilization and long maintenance intervals with enhanced film morphology.
Key to the PiVot system’s superior film quality is its proprietary rotary cathode design that employs unique deposition modulation technology to deposit copper layers with uniform grain distribution, low resistivity and high thickness uniformity.
The PiVot system also enables greater than 80% target utilization to provide significant savings in expensive target material.
“By providing unmatched film properties and efficient raw material utilization, our AKT-PiVot system answers the critical needs of today’s LCD TV market that is driven by demand for larger and ultra-high definition panels and requires innovations in deposition technology to deliver high-quality films at a low cost-of-ownership,” said Dr. Mark Pinto, senior vice president and general manager of Applied’s Display, and Energy and Environmental Solutions groups.
“The system’s proven productivity and proprietary copper process technology create a powerful addition to our strong portfolio of FPD solutions.”
The PiVot system’s modular architecture enables a large variety of configurations to maximize production efficiency, eliminating the bottlenecks caused by different process times in different modules in a traditional in-line machine.
The PiVot system’s cluster-like arrangement also allows continuous operation during individual module maintenance. Combined with long maintenance intervals and extended target life, PiVot system provides the highest availability and longest continuous production time in the industry.
The AKT-PiVot 55KV PVD system’s superior copper deposition technology will be showcased at Applied Materials’ booth at FPD International and Green Device 2009 in Yokohama, Japan, on October 28-30 as part of Applied’s portfolio of advanced FPD manufacturing solutions.
These solutions include PECVD, PVD for TFT-array and color filter, electron beam array test technologies, factory automation and service. In addition, Applied Materials will display its green device manufacturing technologies, including solar, low-e glass coating and roll-to-roll deposition for flexible PV and display.
ST's smart-reset chip cures frustration of ‘frozen’ gadgets
INDIA: To overcome the frustration people can feel when electronic products ‘freeze’ in mid-operation, a new smart-reset chip announced by STMicroelectronics allows the system to be restarted safely without removing the battery or finding a tool to push the reset button, usually hidden behind a hole in the casing.
As more and more people come to use highly featured products such as smartphones, media players, game consoles, e-books and others, the problem of how best to recover a frozen device is surely encountered many times, daily, around the world.
Mechanisms to overcome frozen devices are often less well developed than the main product features. Most manual reset keys, where provided, are hidden to prevent resetting the device accidentally. As these can be difficult to access, a popular “fix” is to remove the battery. This can potentially damage the system, for example by causing critical data loss.
ST’s new STM65xx family of smart-reset Integrated Circuits (IC) has two inputs that can be connected to two of the device’s normal function buttons. When these are held down for a certain time, which is programmable, the IC will send a reset signal to the main processor.
The two inputs and programmable delay time allow a combination of button presses and hold-down times to guard against unintended resets. While other ICs on the market can control one reset key, only the STM65xx has this smart-reset capability with two inputs and also includes the system-controlled supervision and reset features that most product designs require.
The arrival of this chip will enhance users’ experiences by providing a safe, convenient and easily understood means of restarting those frozen gadgets. For manufacturers, combining an improved manual reset with the system-controlled reset functions in a single chip offers better performance and saves cost and pc-board space.
Its 2 x 2 mm package has a smaller overall footprint than using separate chips for system reset and one-key manual reset, or an equivalent network of discrete components that can occupy as much as 100 sq-mm on the board.
In addition, by allowing the manual reset to be controlled from the normal user buttons, the STM65xx can enable product designers to eliminate the traditional hidden reset requiring an access hole in the casing. This can save tooling costs and also provides an opportunity to create splash-resistant or waterproof new products.
The STM65xx is in mass production now, priced at $0.53 for 10,000 units.
As more and more people come to use highly featured products such as smartphones, media players, game consoles, e-books and others, the problem of how best to recover a frozen device is surely encountered many times, daily, around the world.Mechanisms to overcome frozen devices are often less well developed than the main product features. Most manual reset keys, where provided, are hidden to prevent resetting the device accidentally. As these can be difficult to access, a popular “fix” is to remove the battery. This can potentially damage the system, for example by causing critical data loss.
ST’s new STM65xx family of smart-reset Integrated Circuits (IC) has two inputs that can be connected to two of the device’s normal function buttons. When these are held down for a certain time, which is programmable, the IC will send a reset signal to the main processor.
The two inputs and programmable delay time allow a combination of button presses and hold-down times to guard against unintended resets. While other ICs on the market can control one reset key, only the STM65xx has this smart-reset capability with two inputs and also includes the system-controlled supervision and reset features that most product designs require.
The arrival of this chip will enhance users’ experiences by providing a safe, convenient and easily understood means of restarting those frozen gadgets. For manufacturers, combining an improved manual reset with the system-controlled reset functions in a single chip offers better performance and saves cost and pc-board space.
Its 2 x 2 mm package has a smaller overall footprint than using separate chips for system reset and one-key manual reset, or an equivalent network of discrete components that can occupy as much as 100 sq-mm on the board.
In addition, by allowing the manual reset to be controlled from the normal user buttons, the STM65xx can enable product designers to eliminate the traditional hidden reset requiring an access hole in the casing. This can save tooling costs and also provides an opportunity to create splash-resistant or waterproof new products.
The STM65xx is in mass production now, priced at $0.53 for 10,000 units.
Status of the MEMS industry 2009 report: Yole
LYON, FRANCE: Yole Développement has released its MEMS report: Status of the MEMS Industry 2009 Report. For the 6th year, “Status of the MEMS Industry” is the only publication analyzing the MEMS industry, from key technical aspects to business strategies of the TOP30 MEMS companies.
This market and technological analysis provides a 360° analysis of the evolution of MEMS applications and markets. Yole Développement presents the updated data on MEMS markets and the evolution of the equipment markets for MEMS production. The company also analyzes the industry from the manufacturing and innovation points of view and the strategies of the main players. A specific focus on MEMS packaging trends has been also developed in this report.
Source: Yole Développement
A restart of the net growth is expected after 2010
The MEMS markets are flat since 2007: from $7.1 billion in 2007, to $6.8 billion in 2008 to an estimated $6.9 billion in 2009. But that result is the sum of a huge plus in consumer electronics applications, which grew 25 percent CAGR and a huge minus with established automotive business taking a big hit.
A restart of the net growth is expected after 2010, with a CAGR of 12 percent in the next four years. The production equipment market is extremely low at $140 million (in 2008, 2009 and 2010) and will restart in 2011:
• The production infrastructure in place is sufficient to absorb the growth for the next two years and we will have to wait until 2011 for a significant restart of the MEMS production equipment market.
• The MEMS foundry growth in 2008 and 2009 was limited at 6 percent (after years of 30 percent growth annually) and will restart in 2010 with more than 25 percent CAGR expected in the next four years.
Flat business made 2008 and 2009 really difficult
In the face of a collapsing mainstream semiconductor sector over the past 18 months, the MEMS business held its own and remained flat. While this is great news for MEMS overall, for the many MEMS companies that made production infrastructure investments in 2006 and 2007, flat business made 2008 and 2009 really difficult.
“The MEMS industry remains highly diverse and as such the impact of the financial collapse and economic recession has been varied”, explained Jean-Christophe Eloy, President and CEO at Yole Développement. “While established applications have struggled, new ways to package and integrate MEMS devices in systems buttressed the industry. New MEMS devices are indeed growing very fast -‐ two-axis gyros, MEMS IMU and MEMS oscillator, to name a few.”
Reviewing key players: Several companies stopped their MEMS production entirely or in part (Delphi, Continental, Colibrys, Systron Donner Automotive, etc.), while others saw their businesses enter a huge growth phase (InvenSense, Kionix, STMicroelectronics, SiTime, etc.). All in all, booming new business was entirely offset by flagging established business with the net result flat.
Innovation in MEMS is changing: few totally new devices are now launched and most new applications are linked to new usage of existing devices (human machine interface, replacement of existing technologies).
With packaging averaging more than 40 percent of the cost of a MEMS device strong efforts are being put into adapting the packaging to drive out cost and enter new applications (like mobile applications).
In parallel, MEMS foundries are coming out of the economic downturn in a strong position: more system manufacturers have made the decision to stop internal MEMS manufacturing and are now working with MEMS foundries. MEMS foundries are extremely active with these new customers. As can be expected, this growth is attracting new players like TSMC, UMC and others.
In addition, wafer level packaging and 3D chip stacking using through silicon vias (TSV) are also a growth driver for the MEMS foundries. Driven by cost reduction goals
needed for consumer applications investments in 8’’ infrastructure continued despite the downturn.
This market and technological analysis provides a 360° analysis of the evolution of MEMS applications and markets. Yole Développement presents the updated data on MEMS markets and the evolution of the equipment markets for MEMS production. The company also analyzes the industry from the manufacturing and innovation points of view and the strategies of the main players. A specific focus on MEMS packaging trends has been also developed in this report.
Source: Yole DéveloppementA restart of the net growth is expected after 2010
The MEMS markets are flat since 2007: from $7.1 billion in 2007, to $6.8 billion in 2008 to an estimated $6.9 billion in 2009. But that result is the sum of a huge plus in consumer electronics applications, which grew 25 percent CAGR and a huge minus with established automotive business taking a big hit.
A restart of the net growth is expected after 2010, with a CAGR of 12 percent in the next four years. The production equipment market is extremely low at $140 million (in 2008, 2009 and 2010) and will restart in 2011:
• The production infrastructure in place is sufficient to absorb the growth for the next two years and we will have to wait until 2011 for a significant restart of the MEMS production equipment market.
• The MEMS foundry growth in 2008 and 2009 was limited at 6 percent (after years of 30 percent growth annually) and will restart in 2010 with more than 25 percent CAGR expected in the next four years.
Flat business made 2008 and 2009 really difficult
In the face of a collapsing mainstream semiconductor sector over the past 18 months, the MEMS business held its own and remained flat. While this is great news for MEMS overall, for the many MEMS companies that made production infrastructure investments in 2006 and 2007, flat business made 2008 and 2009 really difficult.
“The MEMS industry remains highly diverse and as such the impact of the financial collapse and economic recession has been varied”, explained Jean-Christophe Eloy, President and CEO at Yole Développement. “While established applications have struggled, new ways to package and integrate MEMS devices in systems buttressed the industry. New MEMS devices are indeed growing very fast -‐ two-axis gyros, MEMS IMU and MEMS oscillator, to name a few.”
Reviewing key players: Several companies stopped their MEMS production entirely or in part (Delphi, Continental, Colibrys, Systron Donner Automotive, etc.), while others saw their businesses enter a huge growth phase (InvenSense, Kionix, STMicroelectronics, SiTime, etc.). All in all, booming new business was entirely offset by flagging established business with the net result flat.
Innovation in MEMS is changing: few totally new devices are now launched and most new applications are linked to new usage of existing devices (human machine interface, replacement of existing technologies).
With packaging averaging more than 40 percent of the cost of a MEMS device strong efforts are being put into adapting the packaging to drive out cost and enter new applications (like mobile applications).
In parallel, MEMS foundries are coming out of the economic downturn in a strong position: more system manufacturers have made the decision to stop internal MEMS manufacturing and are now working with MEMS foundries. MEMS foundries are extremely active with these new customers. As can be expected, this growth is attracting new players like TSMC, UMC and others.
In addition, wafer level packaging and 3D chip stacking using through silicon vias (TSV) are also a growth driver for the MEMS foundries. Driven by cost reduction goals
needed for consumer applications investments in 8’’ infrastructure continued despite the downturn.
Semiconductor recovery commences
EL SEGUNDO, USA: Although global semiconductor revenue is set to decline in 2009 for the second consecutive year, quarterly year-over-year growth is expected to finally return to the market in the fourth quarter, signaling the start of the industry recovery, according to iSuppli Corp.
As iSuppli previously announced, global semiconductor revenue is set to contract by 16.5 percent in 2009.
This follows a 5.4 percent decrease in 2008. However, revenue is expected to rise by 10.6 percent in the fourth quarter of 2009 compared to the same period in 2008. The fourth quarter will mark the first quarter in 2009 that revenue has risen compared to the same period a year earlier.
The figure presents iSuppli’s forecast and estimate of year-over-year percentage growth for all four quarters of 2009.
Source: iSuppli, Oct. 2009
“The seeds of the current recovery were sown in the second quarter,” said Dale Ford, senior vice president, market intelligence, for iSuppli. “During that period, manufacturers began to report positive book-to-bill ratios, indicating future revenue growth. This was followed by another sequential increase in revenue in the third quarter.
“Meanwhile, semiconductor inventories returned to more normal levels in the third quarter after chip suppliers shed stockpiles. They did this by slashing costs dramatically in order to reduce unsold inventory they’d been carrying since the beginning of 2009.”
Caution ahead
While these signs are encouraging, and sequential quarterly increases in revenue will continue into 2010, this growth will not be sufficient to lift semiconductor revenues back to pre-recessionary levels until the 2011-2012 time frame.
Furthermore, there remain some worrisome indicators, such as the climbing U.S. unemployment rate, which reached 9.7 percent in August and is projected to exceed 10 percent at its peak. Also worrisome are the struggling credit and banking markets as well as the rising number of foreclosures in the US housing market, clouding the overall economic outlook. Collectively, these factors have served to constrain consumer spending.
Conflicting signs
Not surprisingly, these conflicting elements have led to tempered optimism in iSuppli’s latest version of its Application Market Forecast Tool (AMFT).
While iSuppli is forecasting a 16.5 percent decline in semiconductor revenue in 2009, it’s significantly less than iSuppli’s previous forecast of a 23 percent plunge. The boost in the outlook is a result of the strong quarterly increases seen in the second quarter and positive earnings projections for the third quarter. That said, the recovery will not be apparent in many areas until later this year.
Hot and cold
The pattern of a weak first half of the year followed by a strong second won’t be relegated to 2009 alone. iSuppli forecasts that the first two quarters of 2010 will see revenue that is slightly down compared to the fourth quarter of 2009—but the second half of the year will deliver a strong performance. This will result in 13.8 percent growth in global semiconductor revenue in 2010, ending the two-year losing streak.
Subsequent years will see a return to single-digit percentage growth in the semiconductor industry as conditions stabilize.
Source: iSuppli, USA
As iSuppli previously announced, global semiconductor revenue is set to contract by 16.5 percent in 2009.
This follows a 5.4 percent decrease in 2008. However, revenue is expected to rise by 10.6 percent in the fourth quarter of 2009 compared to the same period in 2008. The fourth quarter will mark the first quarter in 2009 that revenue has risen compared to the same period a year earlier.
The figure presents iSuppli’s forecast and estimate of year-over-year percentage growth for all four quarters of 2009.
Source: iSuppli, Oct. 2009“The seeds of the current recovery were sown in the second quarter,” said Dale Ford, senior vice president, market intelligence, for iSuppli. “During that period, manufacturers began to report positive book-to-bill ratios, indicating future revenue growth. This was followed by another sequential increase in revenue in the third quarter.
“Meanwhile, semiconductor inventories returned to more normal levels in the third quarter after chip suppliers shed stockpiles. They did this by slashing costs dramatically in order to reduce unsold inventory they’d been carrying since the beginning of 2009.”
Caution ahead
While these signs are encouraging, and sequential quarterly increases in revenue will continue into 2010, this growth will not be sufficient to lift semiconductor revenues back to pre-recessionary levels until the 2011-2012 time frame.
Furthermore, there remain some worrisome indicators, such as the climbing U.S. unemployment rate, which reached 9.7 percent in August and is projected to exceed 10 percent at its peak. Also worrisome are the struggling credit and banking markets as well as the rising number of foreclosures in the US housing market, clouding the overall economic outlook. Collectively, these factors have served to constrain consumer spending.
Conflicting signs
Not surprisingly, these conflicting elements have led to tempered optimism in iSuppli’s latest version of its Application Market Forecast Tool (AMFT).
While iSuppli is forecasting a 16.5 percent decline in semiconductor revenue in 2009, it’s significantly less than iSuppli’s previous forecast of a 23 percent plunge. The boost in the outlook is a result of the strong quarterly increases seen in the second quarter and positive earnings projections for the third quarter. That said, the recovery will not be apparent in many areas until later this year.
Hot and cold
The pattern of a weak first half of the year followed by a strong second won’t be relegated to 2009 alone. iSuppli forecasts that the first two quarters of 2010 will see revenue that is slightly down compared to the fourth quarter of 2009—but the second half of the year will deliver a strong performance. This will result in 13.8 percent growth in global semiconductor revenue in 2010, ending the two-year losing streak.
Subsequent years will see a return to single-digit percentage growth in the semiconductor industry as conditions stabilize.
Source: iSuppli, USA
Conexant's new family of solutions for growing embedded audio applications
NEWPORT BEACH, USA: Conexant Systems Inc. has introduced a new family of audio system-on-chip (SoC) solutions for embedded audio and voice applications.
The CX2070X SoCs are targeted at growing audio opportunities in multimedia IP phones, personal navigation devices, portable media players, and mobile Internet devices.
Additional applications include MP3 player docking stations, PC speaker systems, audio headsets, and unified communications systems that support services such as voice-over-IP telephony, speakerphone, and audio conferencing functionality.
The highly integrated SoCs can also be used to enable audio capabilities in intercom and door phone applications. The new audio solutions are shipping in pre-production quantities to customers now.
“We have applied our extensive expertise in voice- and audio-enhancing algorithms to deliver a next-generation speakers-on-a-chip product family that allows us to expand our reach into growing, adjacent embedded audio and voice segments,” said René Hartner, vice president of marketing for Conexant.
“These innovative solutions feature a powerful suite of Conexant-developed technical innovations that dramatically improve audio and voice quality, and the user experience. In addition, an easy-to-use software configuration tool allows developers to customize audio systems and optimize listening experiences.”
The highly integrated CX2070X SoCs include an integrated audio/voice digital signal processor (DSP), multi-bit codec, digital and analog input/out interfaces, and a power efficient 2.5-watt per channel Class-D amplifier to drive stereo speakers or optional post-width modulation (PWM) and differential line-out for external speaker systems amplifiers. Key features include Conexant-proprietary technical innovations that significantly improve audio and voice quality. These include:
Sub-band Acoustic Echo Cancellation: A high-performance sub-band acoustic echo-cancellation algorithm eliminates speaker-to-microphone feedback while preserving natural sounding voice for high-quality, echo-free voice conversations.
Beam-forming: Signals captured by the array microphones are processed to form an adjustable, directional beam, which improves voice clarity by eliminating interfering speech and background noise. Beam-forming can be used to confine the microphone pick-up radius for private conversation, or to capture a 360-degree radius for conference call applications.
End-to-end Noise Reduction: Two unique dynamic noise reduction filters for the incoming and outgoing audio streams eliminate ambient near- and far-end noises.
Line Echo Cancellation: Advanced line echo filter that eliminates echo from twisted-pair crossover on a full duplex two-wire hybrid network.
BrightSound™: A comprehensive suite of parametric equalization, dynamic range compression, and digital crossover algorithms that optimize speaker frequency response, boost loudness without clipping, and match speakers for up to 2.5 watt channel configuration.
3-D Phantom Speakers: A psychoacoustic stereo expansion algorithm changes the listener’s perception of sound by widening the output from narrowly separated speakers to create a closer-to-live sound experience.
3-D Virtual Immersion: A phase virtualization algorithm psychoacoustically “re-positions” the sound field, creating an immersive surround effect. It can also be tuned to create a headphone-like experience that concentrates sound on an intended listener without increasing the actual volume.
The CX2070X SPoCs are available in a variety of configurations. The new solutions can also be used with the company’s CX92735 imaging SoC, enabling manufacturers to add audio capabilities to “connected” frames and interactive display devices.
The CX2070X product family is packaged in a 76-pin quad flat no-lead (QFN) package. Prices range from $2.25 to $3.75 each in quantities of 10,000 depending on the feature-set.
The CX2070X SoCs are targeted at growing audio opportunities in multimedia IP phones, personal navigation devices, portable media players, and mobile Internet devices.
Additional applications include MP3 player docking stations, PC speaker systems, audio headsets, and unified communications systems that support services such as voice-over-IP telephony, speakerphone, and audio conferencing functionality.
The highly integrated SoCs can also be used to enable audio capabilities in intercom and door phone applications. The new audio solutions are shipping in pre-production quantities to customers now.
“We have applied our extensive expertise in voice- and audio-enhancing algorithms to deliver a next-generation speakers-on-a-chip product family that allows us to expand our reach into growing, adjacent embedded audio and voice segments,” said René Hartner, vice president of marketing for Conexant.
“These innovative solutions feature a powerful suite of Conexant-developed technical innovations that dramatically improve audio and voice quality, and the user experience. In addition, an easy-to-use software configuration tool allows developers to customize audio systems and optimize listening experiences.”
The highly integrated CX2070X SoCs include an integrated audio/voice digital signal processor (DSP), multi-bit codec, digital and analog input/out interfaces, and a power efficient 2.5-watt per channel Class-D amplifier to drive stereo speakers or optional post-width modulation (PWM) and differential line-out for external speaker systems amplifiers. Key features include Conexant-proprietary technical innovations that significantly improve audio and voice quality. These include:
Sub-band Acoustic Echo Cancellation: A high-performance sub-band acoustic echo-cancellation algorithm eliminates speaker-to-microphone feedback while preserving natural sounding voice for high-quality, echo-free voice conversations.
Beam-forming: Signals captured by the array microphones are processed to form an adjustable, directional beam, which improves voice clarity by eliminating interfering speech and background noise. Beam-forming can be used to confine the microphone pick-up radius for private conversation, or to capture a 360-degree radius for conference call applications.
End-to-end Noise Reduction: Two unique dynamic noise reduction filters for the incoming and outgoing audio streams eliminate ambient near- and far-end noises.
Line Echo Cancellation: Advanced line echo filter that eliminates echo from twisted-pair crossover on a full duplex two-wire hybrid network.
BrightSound™: A comprehensive suite of parametric equalization, dynamic range compression, and digital crossover algorithms that optimize speaker frequency response, boost loudness without clipping, and match speakers for up to 2.5 watt channel configuration.
3-D Phantom Speakers: A psychoacoustic stereo expansion algorithm changes the listener’s perception of sound by widening the output from narrowly separated speakers to create a closer-to-live sound experience.
3-D Virtual Immersion: A phase virtualization algorithm psychoacoustically “re-positions” the sound field, creating an immersive surround effect. It can also be tuned to create a headphone-like experience that concentrates sound on an intended listener without increasing the actual volume.
The CX2070X SPoCs are available in a variety of configurations. The new solutions can also be used with the company’s CX92735 imaging SoC, enabling manufacturers to add audio capabilities to “connected” frames and interactive display devices.
The CX2070X product family is packaged in a 76-pin quad flat no-lead (QFN) package. Prices range from $2.25 to $3.75 each in quantities of 10,000 depending on the feature-set.
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