SAN JOSE, USA: Magma Design Automation Inc., a provider of chip design software, announced that its Quartz DRC has been deployed by NVIDIA Corp. as the primary physical verification checker for designs targeted at 40-nanometer (nm) and smaller process nodes.
NVIDIA, which invented the graphics processing unit and continues to lead its development, is using the Magma physical verification tools for applications ranging from custom cell development to full-chip verification. NVIDIA selected Quartz for 40 nm and below after use on multiple 65-nm designs and finding they delivered significantly faster turnaround time than existing physical verification tools.
"We have been using Magma's Quartz physical verification solution in production since we moved to the 65-nm process node, and it has proven to be both accurate and significantly faster than other solutions," said James Chen, VLSI technology manager at NVIDIA. "Through dozens of tapeouts, we've seen that Quartz provides the sign-off accuracy needed via certified runsets provided by our foundry partners. Though design sizes and rule complexity have increased significantly, we've been able to meet aggressive design schedules by leveraging Quartz's linear scalability on standard, low-memory Linux machines."
Quartz DRC and LVS are architected to process integrated circuit (IC) designs of any size, at any technology node, in the least amount of time. Magma's is the first truly scalable physical verification solution, able to provide turnaround time that is up to an order of magnitude faster than existing solutions while using existing compute resources. The Quartz tools are fully compatible with third-party IC implementation flows and can read file formats used by traditional physical verification tools.
"Quartz DRC and LVS have enabled silicon success for a wide range of customers, including those doing the most advanced designs in the world," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. "NVIDIA's decision to deploy Quartz as the primary physical verification design rule checker for 40-nm and smaller process nodes is an endorsement of the software's ability to provide the fastest turnaround-time while using very cost-effective hardware systems."
Wednesday, August 26, 2009
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