SAN JOSE, USA: Arasan Chip Systems Inc. a leading provider of Intellectual Property (IP) Cores, announced the release of its MIPI high speed synchronous interface (HSI) controller IP and software stack.
HSI is a full- duplex, low latency protocol, that is optimized for die-level interconnect between an Application Processor and a Baseband chipset. With this release, Arasan continues to offer the most comprehensive portfolio of MIPI IP available in the market today.
The HSI Controller IP and Software Stack are compliant with the HSI v1.0 specification. The IP core is compliant with the HSI Physical Layer Draft v1.1. By integrating this standard interface, application processors and wireless chipset developers are assured of an ecosystem of inter-operable components which can be combined to develop region and application specific mobile platforms.
The HSI physical interface consists of two sets of unidirectional data and control signals combined to form a full-duplex connection. The protocol accommodates up to eight logical channels over this interface with an aggregate bandwidth of 200 Mbps in each direction. Optimized for deployment in mobile platforms, the protocol incorporates features to reduce power through clock gearing and dynamic frequency scaling.
The layered HSI Software Stack is architected to be easily portable to multiple OS's and hardware platforms. The stack can also be used on SoC's that have multiple HSI interfaces. The stack supports multiple priority levels per logical channel and DMA modes for efficient data transfer.
"Mobile platforms need to have the flexibility to support multiple wireless protocols depending on geographic and market conditions," said Somnath Viswanath, Product Marketing Manager at Arasan. "Integrating Arasan's HSI Controller IP and Software Stack provide mobile SoC designers the flexibility to easily connect different HSI based wireless chipsets to their application processor, thereby tailoring their solution for the end market."
Arasan provides a "Total IP Solution" for its MIPI HSI IP. The collateral available for this standard consists of RTL source code for the controller IP, synthesis scripts, test environment, documentation and a Portable Software Stack which are all backed by Arasan's world-class customer support.
Thursday, August 27, 2009
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