Microsemi announces System Builder design tool for ARM-based SmartFusion2 SoC FPGA designs

USA: Microsemi Corp. announced SmartFusion2 SoC FPGA users can now benefit from its newly released design tool, System Builder.

System Builder is a powerful new design tool within the Libero System-on-Chip (SoC) Design Environment version 11.0 and is specifically targeted at accelerating customer definition and implementation of ARM-based systems using SmartFusion2 SoC FPGAs.

The output from System Builder is automatically generated and correct-by-construction, thus eliminating the errors that are created when the architecture is specified 'by hand' as in more traditional tool flows. Thus, System Builder dramatically shortens the design cycle time for complex SoC FPGAs.

Additionally, software-oriented engineers can easily create an embedded architecture and begin code development all on their own. This simplifies the adoption of Microsemi SmartFusion2 devices and provides a much broader set of design engineers with access to SoC FPGA technology.

The enhanced System Builder flow also enables Microsemi to easily support more customers with its internal design services team that offers digital or mixed signal design for custom functional blocks, Soft IP, firmware development and even complete designs to end customers.