Tuesday, July 31, 2007

Shifts in top 20 global semicon rankings

If the recent preliminary results released by IC Insights is anything to go by, there have been some movements among the top 20 semiconductor companies of the world during H1-2007. This is best illustrated by the table below.

While the top three -- Intel, Samsung and TI, retain their positions, ST and Toshiba have exchanged the next two positions, as have Hynix and TSMC, while Renesas remains at no. 8!

Freescale has taken a big drop from no. 9 to no. 16, while Sony, NXP and NEC gained one place each. Infineon has climbed back up to no. 12, from no. 16, while Qualcomm occupies the no. 13 position, up from no. 17. AMD dropped two positions, from no. 13 to no. 15.

Will the semicon industry see a tight year ahead? As per reports, IC Insights said that there should be a "noticeable seasonal rebound" in overall IC demand beginning in September 2007, which may cause "significant changes" in the top 20 semiconductor ranking in the second half of 2007. Wait and watch this space!

Thursday, July 26, 2007

Challenges for IC industry and Dr. Gargini's lessons

Those who were fortunate enough to attend the recently held SEMICON WEST in San Francisco had the pleasure of attending a great session on the past. present and future challenges for the IC industry by Dr. Paolo Gargini, Director of Technology Strategy at Intel.

For those who may not have the time to read this article, here's a snippet of what Dr. Gargini had to offer. The first lesson, he said, was that, "Something right may still happen even when everything seems to be going wrong.” However, challenges that were continuously posed also needed to be addressed at the earliest, in order to keep moving forward.

Many also predicted several times that some limit would be reached – that chip development would never get below ten nanometers, or below five nanometers. However, the industry was able to produce components with a gate oxide at about 1.2 nanometers.

Later, the game changed to scaling, which led to Gargini’s second lesson – “Predictors of engineering limits have always been proven wrong by the right improvements.” Shrinking silicon technology of the 1990s kept the industry moving forward.

His third lesson was, “It would be wrong to believe that the right fundamental limits don’t exist.” The fourth lesson was, “It is wise to look for the right solutions before things start going wrong.” Dr. Gargini recalled how Intel had announced that 45nm generation was ready. That it included high-k metal gates was only disclosed this January giving Intel the time to work on yields, enhancements, reliability problems, etc.

Gargini quoted Gordon Moore as saying that introduction of high-k metal gates was the single most important innovation in semiconductor manufacturing of the last 40 years!

Interestingly, a few weeks ago, the PULLNANO Consortium announced breakthrough results for 32nm/22nm. Among other things, the PULLNANO consortium has fabricated a functional SRAM using innovative MOS transistors whose device architecture differs significantly from that of transistors used in 45nm technology node.

These transistors are built using a low power consumption approach based on Fully Depleted Silicon On Insulator (FDSOI), coupled with a gate stack composed of a high-K gate dielectric and a single metal electrode stack. This is said to be the first time that such a compact SRAM cell has been fabricated using FDSOI, high-k dielectric and metal gate together.

Coming back to Dr. Gargini, his fifth lesson was, "It would be wrong to delay taking action and not do the right thing at the right time." According to him, there was a need for re-examining the opportunities for reviewing “old” theories and techniques that didn’t work on silicon.

Friday, July 13, 2007

ISA initiatives bode well for semicon

When the India Semiconductor Association (ISA) started functioning from way back in Nov. 2004, it had three main objectives. These were: bringing the Indian semicon industry together; ensure that the Indian government paid enough attention to this sector; and finally, putting together a semicon policy.

ISA has since come a long way. S. Janakiraman, president and CEO – R&D Services, Mindtree, and chairman, ISA, says that the ISA is now transitioning into putting systems and processes in place.

The ISA also has three special interest groups, focusing on market research, technology and talent. The market research aspect is more in terms of reference data and in terms of opportunities.

As far as technology aspect is concerned, mixed-signal is fast becoming a reality. The process geometry of semicon has been shrinking from 90nm to 65nm and even 32nm.

Design and manufacturing used to be fairly independent earlier. However, they are fairly coupled now. All of these changes need to be addressed, according to Jani Sir. The ISA SIG on technology would be studying and recommending how to implement, keep track and stay ahead of technology.

Talent is an extremely critical area! The depth of knowledge is in danger of drying out soon! ISA feels that there is a need for a lot of faculty retraining and change in curriculum. The industry also needs to collaborate with the academia.

To address this, ISA has collaborated with the Visvesvaraya Technological University (VTU), Karnataka’s nodal body for engineering education to form the the ISA-VTU understanding. This is a comprehensive initiative, which seeks to catalyze talent generation through enhanced industry-academia interaction. The VLSI Society of India (VSI) will partner and support ISA on this initiative in specific areas.

Established in 1998, Visvesvaraya Technological University (VTU) is headquartered at Belgaum. Presently there are 120 engineering colleges affiliated to VTU. Of these, five colleges offer a post graduate degree in VLSI design and embedded software.

Key aspects of the ISA-VTU initiative are as follows:

* Creation of a Semiconductor Research Consortium-like forum for India that would foster industry-oriented research;
* Facilitation of software acquisition in identified educational institutions;
* Create and support a repository of student projects;
* Faculty development through increased industry interaction and exposure; and
* Augmenting the curriculum evolved by SMDP/ VSI/ Universities in practicals and projects

The ISA also has another program, called the Si-Quest. The Si-Quest is a pioneering semiconductor campus awareness program aimed at talent generation from a broad-based quality talent pool in India. Its nationwide campus coverage, coupled with various awareness campaigns, will attract more and better candidates towards semiconductor industry. All of these bode well for the industry.

Wednesday, July 11, 2007

Paradigm shift indeed in semicon

Going through an article written by Dr. Wolfgang Ziebart, Member of the Management Board, President and CEO, Infineon Technologies, in Financial Times Deutschland, one cannot help but appreciate the great paradigm shift that has indeed taken place in the semiconductor industry.

The article titled: A paradigm shift in the semiconductor industry: Could this be the end of Moore’s Law? focuses on how changing technologies are indeed making life difficult for most market players to keep pace with all those changes.

The technical possibilities for shrinking chips have far from reached their limits at 65nm. There are preparations already on for 45nm and development work for 32nm has already started!

When PULLNANO announced breakthrough results for 32/22nm, did it surprise many? The PULLNANO consortium has fabricated a functional SRAM using innovative MOS transistors whose device architecture differs significantly from that of transistors used in 45nm technology node.

It talks about a compact SRAM cell that has been fabricated using FDSOI (Fully Depleted Silicon On Insulator), high-k dielectric and metal gate all together.

PULLNANO has demonstrated that the material and integration schemes used in 45nm generation can be modified to provide a robust solution at 32nm. It has also proposed an innovative new architecture that could provide even higher performance at 32nm and 22nm, using the so-called 'air gap' technique.

I do remember Dr Pradip Dutta of Synopsys India telling me about two months ago about 32nm, during a course of a telephonic conversation about ndia's moves in the semicon space.

After that conversation, I was wondering how quickly semicon technology had started to move. How quickly, from a has-been all these years, India was suddenly emerging as a semicon base to reckon with. How quickly, the geometry had moved from 90nm to, now, 22nm!

Dr Dutta also added that there would be more emphasis in India on doing high-end designs. In fact, whether it is frequency, number of gates, high complexity, etc., all of those would be driven by applications. India is now ready for doing high-end complex designs.

Indian companies are now definitely excelling in the design services sector. Some of them have also grown significantly. It is believed that they have also taken a load off the international design services company. Some of these Indian companies are now also developing their own IPs -- a paradigm shift in itself!

Monday, July 2, 2007

Case for low-cost FPGAs

It is said that there is an increased adoption of programmable logic in more applications. And that, development costs of alternative technologies such as ASIC and ASSP continue to rise. Does this make a case for low-cost FPGAs? Altera seems to believe in this.

According to the company, when Altera created the low-cost FPGA market with the introduction of its Cyclone FPGAs, the consumer product market in Taiwan became a primary focus.

Its contention is worth noting. Needs of consumers change rapidly. Low-cost FPGAs are , in this scenario, said to be the best vehicle to reduce time-to-market and bring a product to market quickly, besides go in for high-volume production immediately, if required.

According to the company, changes to product specifications can occur via FPGA, even as a product is in the market. There's probably no need to to do a redesign. Now, this would save significant time and cost, and allow market advantage.

We have just done reports on Altera, who have introduced the Arria GX family of low-cost, transceiver-based FPGAs that support PCI Express (x1 and x4), Gigabit Ethernet and Serial RapidIO standards at speeds up to 2.5Gbps.

Close by, Xilinx allows expanding FPGA development options with its ISE 9.2i design tools. This is said to have easy-to-use, built-in tools and wizards that make I/O assignment, power analysis, timing-driven design closure, and HDL simulation quick and intuitive.

The ISE 9.2i release claims to reduce memory requirements by an average of 27 percent, while providing expanded support for MS Windows Vista, XP x64, and Red Hat Enterprise WS 5.0 32-bit and 64-bit OS, respectively.

Definitely, both are worth a look, as the low-cost FPGA scenario seems to hot up!