Synopsys MVSIM Adopted for Low Power Verification of STw8500 Mobile SoC Platform
MOUNTAIN VIEW, USA: Synopsys Inc. today announced that ST-Ericsson has adopted Synopsys' MVSIM low power dynamic verification solution for its STw8500 system-on-chip (SoC) platform for the mobile phone market.
ST-Ericsson selected MVSIM for its proven ability to comprehensively verify low power techniques, including standby and built-in automated low power assertions, which enable the early detection of bugs. The tool's extensive support for the IEEE 1801 [Unified Power Format (UPF)] power format, on which the STw8500 project team has standardized, was also a deciding factor.
"Mobile handset applications are driven by battery life, which necessitates the application of complex low power design techniques," said Francois Martin, director of the Wireless Multimedia Digital SoC's Business Unit at ST-Ericsson.
"We chose MVSIM because of its ability to comprehensively verify the advanced low power techniques we employ for our wireless designs and detect bugs early in our design cycle."
The voltage-level aware simulation in MVSIM enables accurate verification of low power designs and improves bug detection. Its comprehensive set of built-in, automated low power assertions boost verification productivity.
MVSIM, a core component of Synopsys' Eclypse Low Power Solution, is production-proven and works at the RTL and gate levels. MVSIM addresses complex low power verification challenges and enables customers to achieve their high-quality goals while meeting time-to-market constraints.
"The mobile phone market imposes some of the most stringent requirements on power and therefore demands the most advanced low power verification solution," said Swami Venkat senior director of functional verification marketing at Synopsys. "Synopsys continues to pioneer tools and methodologies to help address low power verification challenges, including the recent publication of the Verification Methodology Manual for Low Power (VMM-LP) book. ST-Ericsson's adoption of MVSIM confirms the tool's growing momentum in the mobile market segment."
Wednesday, July 1, 2009
Three new medical development kits from TI
BANGALORE, INDIA: Medical electronics manufacturers are looking to speed up new equipment designs to meet healthcare providers’ increasing need for the most advanced devices that offer sophisticated features in a battery-powered, portable design.
To accelerate and simplify development of these portable medical devices, Texas Instruments Inc. (TI) today announced the industry’s first medical development tool set with a complete signal chain and software offering for multiple medical diagnostic and patient monitoring applications.
The three medical development kits (MDKs) -- based on TI’s TMS320VC5505 digital signal processor (DSP) –- can be built by purchasing an analog front-end (AFE) module and a TMS320VC5505 DSP evaluation module (EVM), giving manufacturers a jump start on designing leading-edge electrocardiograms (ECG), digital stethoscopes and pulse oximeter products.
Each kit includes both hardware and software design tools including schematics, sample application code, medical-specific algorithms and collateral that eases the design process and decreases development time for customers by up to eight months.
The MDKs are also extremely flexible with the ability to mix-and-match AFEs with multiple processor platforms for maximum software reuse and return on investment. Additionally, the low power technology offered by the C5505, which is supported by TI’s full analog offering, enables diagnostics functionality for portable medical devices, making them smarter and more energy efficient.
As a result of TI’s advanced DSP and analog technology, coupled with software specific for medical applications, the MDKs enable doctors and patients to quickly benefit from an end product with longer battery life, better portability and more sophisticated user functionality, such as real-time waveform display and menu options on an LCD screen and audio recording and playback.
The MDKs are for feasibility evaluation by experts in laboratory/development environments only, and not for medical/diagnostic use on patients.
To accelerate and simplify development of these portable medical devices, Texas Instruments Inc. (TI) today announced the industry’s first medical development tool set with a complete signal chain and software offering for multiple medical diagnostic and patient monitoring applications.
The three medical development kits (MDKs) -- based on TI’s TMS320VC5505 digital signal processor (DSP) –- can be built by purchasing an analog front-end (AFE) module and a TMS320VC5505 DSP evaluation module (EVM), giving manufacturers a jump start on designing leading-edge electrocardiograms (ECG), digital stethoscopes and pulse oximeter products.
Each kit includes both hardware and software design tools including schematics, sample application code, medical-specific algorithms and collateral that eases the design process and decreases development time for customers by up to eight months.
The MDKs are also extremely flexible with the ability to mix-and-match AFEs with multiple processor platforms for maximum software reuse and return on investment. Additionally, the low power technology offered by the C5505, which is supported by TI’s full analog offering, enables diagnostics functionality for portable medical devices, making them smarter and more energy efficient.
As a result of TI’s advanced DSP and analog technology, coupled with software specific for medical applications, the MDKs enable doctors and patients to quickly benefit from an end product with longer battery life, better portability and more sophisticated user functionality, such as real-time waveform display and menu options on an LCD screen and audio recording and playback.
The MDKs are for feasibility evaluation by experts in laboratory/development environments only, and not for medical/diagnostic use on patients.
Cadence, Toshiba ally on integrated design environment for COT and SoC design
SAN JOSE, USA: Cadence Design Systems announced an extensive collaboration with Toshiba to address the challenges of existing and next-generation SoC designs.
Toshiba is a leading provider of process and design solution for cutting-edge SoC products. Based on the Cadence Encounter Digital Implementation System and the Cadence Virtuoso Custom Design Solution, the collaboration provides a full digital and mixed-signal design environment to Toshiba and its COT customers for the most advanced semiconductor products where integration of digital and mixed-signal designs is a key to success.
“In highly competitive markets such as wireless and consumer devices designers are expressing a growing requirement for integration of digital and mixed-signal content on ever-smaller semiconductor devices,” said Tatsuo Noguchi, Technology Executive for SoC of Toshiba Corp. Semiconductor Co.
“Because the Cadence Encounter and Virtuoso design environments provide the industry-leading analog and digital design flows necessary to meet these challenges, we are delighted to work closely with Cadence and help our COT customers realize their highly integrated custom IC design. We expect the collaboration to continue to provide benefits to the design community going forward.”
The ongoing collaboration focuses primarily on physical implementation, verification, and custom analog integration for COT and SoC designs. The physical implementation flow includes Cadence Encounter RTL Compiler, Cadence Conformal verification suite, Cadence QRC Extraction and the Encounter Digital Implementation System.
The Toshiba flow utilizes Cadence Encounter Timing System for timing verification, Cadence Physical Verification System for physical verification, Cadence Virtuoso IC 6.1 for custom analog design and Cadence process design kits (PDKs) for quicker, more accurate design.
“Cadence has worked extensively over the years with Toshiba Semiconductor to provide the design environment necessary to meet all the latest challenges to COT and SoC designs,” said Chi-Ping Hsu, senior vice president of the Implementation Products Group at Cadence. “We’re confident that this association will continue to deliver the design flows necessary to create high-quality semiconductor products.”
Toshiba is a leading provider of process and design solution for cutting-edge SoC products. Based on the Cadence Encounter Digital Implementation System and the Cadence Virtuoso Custom Design Solution, the collaboration provides a full digital and mixed-signal design environment to Toshiba and its COT customers for the most advanced semiconductor products where integration of digital and mixed-signal designs is a key to success.
“In highly competitive markets such as wireless and consumer devices designers are expressing a growing requirement for integration of digital and mixed-signal content on ever-smaller semiconductor devices,” said Tatsuo Noguchi, Technology Executive for SoC of Toshiba Corp. Semiconductor Co.
“Because the Cadence Encounter and Virtuoso design environments provide the industry-leading analog and digital design flows necessary to meet these challenges, we are delighted to work closely with Cadence and help our COT customers realize their highly integrated custom IC design. We expect the collaboration to continue to provide benefits to the design community going forward.”
The ongoing collaboration focuses primarily on physical implementation, verification, and custom analog integration for COT and SoC designs. The physical implementation flow includes Cadence Encounter RTL Compiler, Cadence Conformal verification suite, Cadence QRC Extraction and the Encounter Digital Implementation System.
The Toshiba flow utilizes Cadence Encounter Timing System for timing verification, Cadence Physical Verification System for physical verification, Cadence Virtuoso IC 6.1 for custom analog design and Cadence process design kits (PDKs) for quicker, more accurate design.
“Cadence has worked extensively over the years with Toshiba Semiconductor to provide the design environment necessary to meet all the latest challenges to COT and SoC designs,” said Chi-Ping Hsu, senior vice president of the Implementation Products Group at Cadence. “We’re confident that this association will continue to deliver the design flows necessary to create high-quality semiconductor products.”
Conexant's semiconductor solution for connected photo frame segment
NEWPORT BEACH, USA: Conexant Systems Inc., a leading supplier of innovative semiconductor solutions for imaging, audio, video and Internet connectivity applications, announced the first in a planned series of new system-on-chip (SoC) solutions targeted at the growing market for “connected” digital photo frames and interactive display appliances (IDAs).
These products integrate Internet connectivity and touch-screen technology. The high-performance CX92735 supports advanced features including streaming media content, MP3 audio playback with slideshow functionality, and Wi-Fi, Bluetooth, and Ethernet connectivity.
“Conexant is a leading provider of solutions for multifunction printers and facsimile applications, and we have applied our proficiency in imaging technologies to deliver a new system-on-chip that allows us to expand into the growing, adjacent connected photo frame segment,” said Christian Scherp, president of Conexant.
“We have extensive expertise in analog and mixed-signal design, firmware and software development, and in-depth applications knowledge. We will continue to leverage these strengths to capitalize on growth opportunities in the areas we address, and provide our customers with innovative solutions that contribute to their success.”
Connected frames and IDAs are offered in a wide variety of form-factors including speakerphones, VoIP phones, and digital photo frames. They can be used in a broad range of video, audio, telephony, and digital signage applications.
For example, connected frames can be used within the home to send or receive text messages, make hands-free VoIP phone calls, and access and view information such as news, recipes, weather, and traffic reports from the Internet.
Additional applications include interactive kiosks, point-of-sale terminals, baby monitors, and home automation, security, and monitoring systems. In addition, wireless operators are beginning to allow subscribers to use connected frames to receive data over the cellular network.
These products integrate Internet connectivity and touch-screen technology. The high-performance CX92735 supports advanced features including streaming media content, MP3 audio playback with slideshow functionality, and Wi-Fi, Bluetooth, and Ethernet connectivity.“Conexant is a leading provider of solutions for multifunction printers and facsimile applications, and we have applied our proficiency in imaging technologies to deliver a new system-on-chip that allows us to expand into the growing, adjacent connected photo frame segment,” said Christian Scherp, president of Conexant.
“We have extensive expertise in analog and mixed-signal design, firmware and software development, and in-depth applications knowledge. We will continue to leverage these strengths to capitalize on growth opportunities in the areas we address, and provide our customers with innovative solutions that contribute to their success.”
Connected frames and IDAs are offered in a wide variety of form-factors including speakerphones, VoIP phones, and digital photo frames. They can be used in a broad range of video, audio, telephony, and digital signage applications.
For example, connected frames can be used within the home to send or receive text messages, make hands-free VoIP phone calls, and access and view information such as news, recipes, weather, and traffic reports from the Internet.
Additional applications include interactive kiosks, point-of-sale terminals, baby monitors, and home automation, security, and monitoring systems. In addition, wireless operators are beginning to allow subscribers to use connected frames to receive data over the cellular network.
Virage Logic sees strong adoption of 40nm IP product portfolio
FREMONT, USA: Virage Logic Corp. announced that since being named TSMC’s 40nm early development partner in 2007, the company has seen strong adoption of its extensive 40nm product portfolio.
Comprising embedded SRAMS, embedded memory test and repair, logic libraries, and memory development software, the Company’s silicon-proven 40nm product offering has been designed to optimize area, performance, power and yield.
Today, more than 10 customers rely on Virage Logic’s 40nm product portfolio to design more efficient chips more quickly and with less risk as they develop products for such end markets as graphics, consumer, enterprise, networking, wireless, and handheld.
“Virage Logic has a long, proven track record of being first-to-market at the advanced process technologies and with our extensive 40nm product portfolio, we are proud to offer our customers a competitive advantage at this advanced process node,” said Brani Buric, Virage Logic’s executive vice president, marketing and sales.
“Our SiWare Memory and SiWare Logic products provide designers with a comprehensive dashboard of options for the flexibility needed to efficiently manage design tradeoffs and meet customers’ specific requirements. For example, this dashboard enables our customers to achieve up to a 90% power savings in 40nm G and LP process nodes.
“Our STAR Memory System embedded test and repair offering extends the value we can deliver by enabling customers to dramatically ramp to volume at advanced nodes such as 40nm,” he said. “Finally, our product portfolio is supported by a range of engagement models to best meet the requirements of our fabless, integrated device manufacturer (IDM) and foundry customers.”
“TSMC selected Virage Logic as an early development partner at 40nm as a continuation of our collaboration in technologies ranging from 250nm to 40nm. Virage Logic and TSMC work closely to qualify IP through both Virage Logic’s procedures and TSMC’s procedures including silicon validation of these advanced technology IP solutions,” said Dan Kochpatcharin, deputy director, IP Portfolio Marketing at TSMC.
“These extensive silicon quality report results are available to designers of advanced SoCs for review when choosing Virage Logic’s broad IP portfolio on TSMC’s 40nm process.”
Comprising embedded SRAMS, embedded memory test and repair, logic libraries, and memory development software, the Company’s silicon-proven 40nm product offering has been designed to optimize area, performance, power and yield.
Today, more than 10 customers rely on Virage Logic’s 40nm product portfolio to design more efficient chips more quickly and with less risk as they develop products for such end markets as graphics, consumer, enterprise, networking, wireless, and handheld.
“Virage Logic has a long, proven track record of being first-to-market at the advanced process technologies and with our extensive 40nm product portfolio, we are proud to offer our customers a competitive advantage at this advanced process node,” said Brani Buric, Virage Logic’s executive vice president, marketing and sales.
“Our SiWare Memory and SiWare Logic products provide designers with a comprehensive dashboard of options for the flexibility needed to efficiently manage design tradeoffs and meet customers’ specific requirements. For example, this dashboard enables our customers to achieve up to a 90% power savings in 40nm G and LP process nodes.
“Our STAR Memory System embedded test and repair offering extends the value we can deliver by enabling customers to dramatically ramp to volume at advanced nodes such as 40nm,” he said. “Finally, our product portfolio is supported by a range of engagement models to best meet the requirements of our fabless, integrated device manufacturer (IDM) and foundry customers.”
“TSMC selected Virage Logic as an early development partner at 40nm as a continuation of our collaboration in technologies ranging from 250nm to 40nm. Virage Logic and TSMC work closely to qualify IP through both Virage Logic’s procedures and TSMC’s procedures including silicon validation of these advanced technology IP solutions,” said Dan Kochpatcharin, deputy director, IP Portfolio Marketing at TSMC.
“These extensive silicon quality report results are available to designers of advanced SoCs for review when choosing Virage Logic’s broad IP portfolio on TSMC’s 40nm process.”
The SPIRIT Consortium approves IP-XACT v1.5
NAPA, USA: The SPIRIT Consortium™, a global non-profit organization focused on establishing multi-faceted IP/tool integration standards that drive sustainable growth in electronic design, has approved version 1.5 of its IP-XACT™ specification for handoff to the IEEE P1685 working group.
The IP-XACT specification provides a machine readable XML structure for IP modules and systems databooks. The XML data documents many different aspects of electronic design elements, enabling designers using IP-XACT tools to automatically create many different expressions of a design in a consistent and correlated way.
Design and verification engineers will benefit from using this specification through the automation testbench creation and exploration.
IP-XACT 1.5 will be handed off to the IEEE Standards Association for consideration as an industry standard. This technical specification, known as the IP-XACT design-exchange format, comprehensively addresses support for integrated multi-vendor ESL and RTL design and verification flows.
The P1685 working group is focused on building industry adoption and ratifying an open industry meta-data standard for IP providers, EDA vendors, and independent design manufacturers to help build real marketplace benefit for efficient design tool and IP integration.
"The SPIRIT Consortium gratefully acknowledges the efforts of its Technical Working Groups for their extensive and dedicated work in bringing the specification to readiness for handoff to the IEEE-SA," said Ralph von Vignau, president of The SPIRIT Consortium. "As The SPIRIT Consortium specifications are adopted, integrated device manufacturers will benefit from faster time-to-market and ease of IP integration by making their design flows IP-XACT-enabled."
Building on the IP-XACT 1.4 specification, this next version of IP-XACT extends the IP-XACT data model to more complete description of the register data and address maps. Several small changes have been made to the schema based on the testing and feedback from the 1.4 release.
As always, the Consortium has provided automated transforms to use IP-XACT data written to previous versions. IP-XACT 1.5 is specifically targeted for hand-off to the IEEE P1685 working group for IEEE standardization. The version released to the IEEE is publicly available for informational purposes.
The IP-XACT specification provides a machine readable XML structure for IP modules and systems databooks. The XML data documents many different aspects of electronic design elements, enabling designers using IP-XACT tools to automatically create many different expressions of a design in a consistent and correlated way.
Design and verification engineers will benefit from using this specification through the automation testbench creation and exploration.
IP-XACT 1.5 will be handed off to the IEEE Standards Association for consideration as an industry standard. This technical specification, known as the IP-XACT design-exchange format, comprehensively addresses support for integrated multi-vendor ESL and RTL design and verification flows.
The P1685 working group is focused on building industry adoption and ratifying an open industry meta-data standard for IP providers, EDA vendors, and independent design manufacturers to help build real marketplace benefit for efficient design tool and IP integration.
"The SPIRIT Consortium gratefully acknowledges the efforts of its Technical Working Groups for their extensive and dedicated work in bringing the specification to readiness for handoff to the IEEE-SA," said Ralph von Vignau, president of The SPIRIT Consortium. "As The SPIRIT Consortium specifications are adopted, integrated device manufacturers will benefit from faster time-to-market and ease of IP integration by making their design flows IP-XACT-enabled."
Building on the IP-XACT 1.4 specification, this next version of IP-XACT extends the IP-XACT data model to more complete description of the register data and address maps. Several small changes have been made to the schema based on the testing and feedback from the 1.4 release.
As always, the Consortium has provided automated transforms to use IP-XACT data written to previous versions. IP-XACT 1.5 is specifically targeted for hand-off to the IEEE P1685 working group for IEEE standardization. The version released to the IEEE is publicly available for informational purposes.
Silicon Motion flash controllers support Micron 34nm MLC flash
TAIPEI, TAIWAN: Silicon Motion Technology Corp., a leading fabless semiconductor company that designs, develops and markets semiconductor solutions for multimedia consumer electronics, announced that Micron Technology Inc. has validated its latest flash controllers for use with Micron's 34nm multi-level cell (MLC) flash product family.
The products include its new 16 gigabit (Gb) and 32Gb parts announced today. The validated Silicon Motion products include SM2682/SM2682LT SD controllers, SM2232/SM2234 CF controllers, SM2235/SM2242 SSD controllers, and SM3251/SM3252 USB flash drive (UFD) controllers, all of which are in mass production.
"Micron is a leader in 3x nm flash technology and we are excited that Silicon Motion has passed through Micron's validation process," said Wallace Kou, President and CEO of Silicon Motion.
"With this validation, we can offer the most advanced SD, microSD, CF, SSD and UFD controllers to support high capacity products using leading edge Micron MLC flash memory. Our controllers will allow customers to benefit from lower cost, next generation, 16Gb and 32Gb MLC 34nm NAND flash for a variety of device formats and platforms."
"Micron's new 16Gb and 32Gb MLC NAND delivers a compelling storage solution for today's consumer electronic and mobile products, offering unparalleled capacity and performance," said Brian Shirley, vice president of Micron's memory group. "Micron is pleased to have worked closely with Silicon Motion through the validation phase to ensure our mutual customers have the opportunity to design-in the latest in NAND and controller technologies."
"We believe that leading edge flash devices can accelerate the adoption of new flash applications, such as SSDs with our controllers," added Wallace Kou. "As the leader in the flash controller market, Silicon Motion will continue to work closely with all NAND flash manufacturers to ensure that our customers have access to the most advanced controllers that capitalize on next-generation technologies."
The products include its new 16 gigabit (Gb) and 32Gb parts announced today. The validated Silicon Motion products include SM2682/SM2682LT SD controllers, SM2232/SM2234 CF controllers, SM2235/SM2242 SSD controllers, and SM3251/SM3252 USB flash drive (UFD) controllers, all of which are in mass production.
"Micron is a leader in 3x nm flash technology and we are excited that Silicon Motion has passed through Micron's validation process," said Wallace Kou, President and CEO of Silicon Motion.
"With this validation, we can offer the most advanced SD, microSD, CF, SSD and UFD controllers to support high capacity products using leading edge Micron MLC flash memory. Our controllers will allow customers to benefit from lower cost, next generation, 16Gb and 32Gb MLC 34nm NAND flash for a variety of device formats and platforms."
"Micron's new 16Gb and 32Gb MLC NAND delivers a compelling storage solution for today's consumer electronic and mobile products, offering unparalleled capacity and performance," said Brian Shirley, vice president of Micron's memory group. "Micron is pleased to have worked closely with Silicon Motion through the validation phase to ensure our mutual customers have the opportunity to design-in the latest in NAND and controller technologies."
"We believe that leading edge flash devices can accelerate the adoption of new flash applications, such as SSDs with our controllers," added Wallace Kou. "As the leader in the flash controller market, Silicon Motion will continue to work closely with all NAND flash manufacturers to ensure that our customers have access to the most advanced controllers that capitalize on next-generation technologies."
Emulex advises stockholders to take no action to revised Broadcom tender offer
COSTA MESA, USA: Emulex Corp. said that its Board of Directors, consistent with its fiduciary duties and with the assistance of its financial and legal advisors, Goldman, Sachs & Co. and Gibson, Dunn & Crutcher LLP, respectively, will review the terms of the revised tender offer from Broadcom Corp. to acquire all of the outstanding Emulex shares for $11.00 per share in cash.
Broadcom's previous offer was $9.25 per share in cash. The Emulex Board will make its recommendation to stockholders on the revised tender offer in due course. The Company urges stockholders at this time not to tender any shares into the revised offer pending the Board's recommendation.
Emulex noted that Broadcom stated in their announcement that Broadcom dropped its consent solicitation without delivering any consents and that Broadcom has also filed a notice of dismissal of its Delaware litigation against Emulex and the Emulex Board of Directors.
Emulex stockholders with any questions about the tender offer or other related matters may contact MacKenzie Partners, Inc. at 1-800-322-2885.
Broadcom's previous offer was $9.25 per share in cash. The Emulex Board will make its recommendation to stockholders on the revised tender offer in due course. The Company urges stockholders at this time not to tender any shares into the revised offer pending the Board's recommendation.
Emulex noted that Broadcom stated in their announcement that Broadcom dropped its consent solicitation without delivering any consents and that Broadcom has also filed a notice of dismissal of its Delaware litigation against Emulex and the Emulex Board of Directors.
Emulex stockholders with any questions about the tender offer or other related matters may contact MacKenzie Partners, Inc. at 1-800-322-2885.
Elpida to get funds from government, Taiwan Memory
This is a very important news, courtesy, MarketWatch!
By Lisa Twaronite, MarketWatch
TOKYO (MarketWatch): Elpida Memory Inc. will receive 50 billion yen ($521 million), the government said Tuesday, much of it as part of Japan's new recapitalization program for struggling non-financial companies.
Japan's Ministry of Economy, Trade and Industry said Elpida will get 30 billion yen from the Development Bank of Japan by the end of August in exchange for preferred shares.
The infusion is part of a new program is aimed at supporting companies whose failure the government fears could have a broader economic impact.
"Elpida faces a very tough environment," Economy, Trade and Industry Minister Toshihiro Nikai was quoted as saying in several reports from the region. "DRAMs are widely used by major industries in our country, and securing the stable supply of them will benefit people's lives, as well as economic and industrial activities."
Taiwan Memory Co., a chipmaker set up by the island's government, plans to invest an additional 20 billion yen by the end of this fiscal year ending in March 2010, the ministry also said.
Elpida Memory Inc. President Yukio Sakamoto reportedly told a news conference Tuesday that the fund injection under the government's new aid program was the best option available for the chip maker to secure funding and remain competitive.
Last month, Japan's only maker of dynamic random access memory chips posted a group net loss of 178.8 billion yen for the fiscal year which ended in March, deeper than its 23.5 billion yen loss for fiscal 2007.
Pioneer, NEC next?
Other Japanese firms are expected to follow Elpida's move to seek funds.
Pioneer Corp., which anticipates a sixth consecutive year of losses this fiscal year, is now making preparations to apply for a public fund infusion, Japanese business daily Nikkei reported Tuesday.
NEC Electronics Corp. and Renesas Technology Corp. are also expected to consider taking action if their planned merger next April goes through as expected, the report said.
In Tokyo, Elpida shares closed up 1.4 percent, and NEC Electronics gained 4.2 percent. But Pioneer shed 1 percent.
The benchmark Nikkei 225 Average rose 1.8 percent.
Lisa Twaronite reports for MarketWatch from Tokyo.
By Lisa Twaronite, MarketWatch
TOKYO (MarketWatch): Elpida Memory Inc. will receive 50 billion yen ($521 million), the government said Tuesday, much of it as part of Japan's new recapitalization program for struggling non-financial companies.
Japan's Ministry of Economy, Trade and Industry said Elpida will get 30 billion yen from the Development Bank of Japan by the end of August in exchange for preferred shares.
The infusion is part of a new program is aimed at supporting companies whose failure the government fears could have a broader economic impact.
"Elpida faces a very tough environment," Economy, Trade and Industry Minister Toshihiro Nikai was quoted as saying in several reports from the region. "DRAMs are widely used by major industries in our country, and securing the stable supply of them will benefit people's lives, as well as economic and industrial activities."
Taiwan Memory Co., a chipmaker set up by the island's government, plans to invest an additional 20 billion yen by the end of this fiscal year ending in March 2010, the ministry also said.
Elpida Memory Inc. President Yukio Sakamoto reportedly told a news conference Tuesday that the fund injection under the government's new aid program was the best option available for the chip maker to secure funding and remain competitive.
Last month, Japan's only maker of dynamic random access memory chips posted a group net loss of 178.8 billion yen for the fiscal year which ended in March, deeper than its 23.5 billion yen loss for fiscal 2007.
Pioneer, NEC next?
Other Japanese firms are expected to follow Elpida's move to seek funds.
Pioneer Corp., which anticipates a sixth consecutive year of losses this fiscal year, is now making preparations to apply for a public fund infusion, Japanese business daily Nikkei reported Tuesday.
NEC Electronics Corp. and Renesas Technology Corp. are also expected to consider taking action if their planned merger next April goes through as expected, the report said.
In Tokyo, Elpida shares closed up 1.4 percent, and NEC Electronics gained 4.2 percent. But Pioneer shed 1 percent.
The benchmark Nikkei 225 Average rose 1.8 percent.
Lisa Twaronite reports for MarketWatch from Tokyo.
The SDR Forum general meeting to feature FPGA Development Workshop
SAN JOSE, USA: The SDR Forum, a non-profit member consortium dedicated to promoting the success of next-generation radio technologies, announced its 64th General Meeting, to be held in San Jose, Sept. 14-17, 2009.
The meeting will feature a workshop, "Rapid FPGA Development for Wireless Applications –- IP Cores, Tools and Standards," which aims to arm communications systems engineers with the knowledge they need to implement software defined and cognitive radio systems that utilize FPGA-based processing.
Speakers at this workshop will include representatives of The MathWorks, Mercury Computer, Open Cores Protocol -– International Partnership, Objective Interface Systems, PrismTech, Synopsis and Xilinx.
Sponsored by Xilinx, this meeting represents the 64th General Meeting of the Forum, and will comprise of working sessions advancing The SDR Forum’s 2010 operations plan in support of the commercial, public safety, satellite communications and international tactical radio communities.
The meeting will feature a keynote presentation by Dean Westman, Vice President – Communications Business, Xilinx, titled “The Programmable Imperative: Multimode IS the new air interface.”
The meeting will feature a workshop, "Rapid FPGA Development for Wireless Applications –- IP Cores, Tools and Standards," which aims to arm communications systems engineers with the knowledge they need to implement software defined and cognitive radio systems that utilize FPGA-based processing.
Speakers at this workshop will include representatives of The MathWorks, Mercury Computer, Open Cores Protocol -– International Partnership, Objective Interface Systems, PrismTech, Synopsis and Xilinx.
Sponsored by Xilinx, this meeting represents the 64th General Meeting of the Forum, and will comprise of working sessions advancing The SDR Forum’s 2010 operations plan in support of the commercial, public safety, satellite communications and international tactical radio communities.
The meeting will feature a keynote presentation by Dean Westman, Vice President – Communications Business, Xilinx, titled “The Programmable Imperative: Multimode IS the new air interface.”
NI's USB device and sensor suite for sound, vibration apps
AUSTIN, USA: National Instruments has announced a new portable bus-powered dynamic signal acquisition (DSA) module and a suite of vibration sensors that are ideal for making high-accuracy vibration measurements required for noise, vibration and harshness (NVH) and machine condition monitoring applications.
The NI USB-4431 DSA module acquires data at rates from 1 to 102.4 kS/s, which makes it possible to obtain a wide measurement bandwidth. The combination of the USB-4431 and the new vibration sensors, which include three accelerometers, a triaxial accelerometer and an impact hammer, gives engineers and scientists a complete stimulus response system from a single vendor for seamless product integration.
The USB-4431 is a five-channel DSA module for making high-accuracy measurements from integrated electronics piezoelectric (IEPE) sensors. The module consists of four 24-bit simultaneously sampled analog input channels and one 24-bit analog output channel, which are ideal for stimulus response test systems.
The USB-4431 also works well for a wide variety of field test applications such as frequency response audio tests and suspension shaker tests due to its portability. Additionally, the module delivers 100 dB of dynamic range and incorporates software-selectable IEPE signal conditioning for accelerometers and microphones.
The new sensor suite includes three high-accuracy accelerometers and a triaxial accelerometer that are compatible with all NI DSA devices. The accelerometers have low-impedance output signals that allow for accurate signal transmission over long cables, and their small form factor makes them easy to include in a wide variety of monitoring and test systems.
The triaxial accelerometer characterizes the acceleration of an object or device being measured in all three dimensions with a single sensor to minimize cabling at the source.
Also included in the sensor suite is a modal analysis impact hammer, a device that delivers effective measurements of stimulus signals. With this highly flexible impact hammer, engineers and scientists can measure the stimulus force for a wide range of frequencies and magnitudes required for proper object characterization.
The impact hammer, triaxial accelerometer and USB-4431 combine to form a precise
structural monitoring stimulus response test system.
Engineers and scientists can get their applications up and running quickly and efficiently with the configuration-based NI Sound and Vibration Assistant software or with more than 50 ready-to-run NI LabVIEW software example code bases provided in the NI Sound and Vibration Measurement Suite.
The software suite includes a pre-built Sound and Vibration Assistant project for impact hammer response to help engineers and scientists rapidly set up a structural test application.
The Sound and Vibration Measurement Suite also features pre-built virtual instruments (VIs) for NVH and rotating machinery vibration analysis applications so engineers and scientists can quickly set up almost any sound and vibration application.
The NI USB-4431 DSA module acquires data at rates from 1 to 102.4 kS/s, which makes it possible to obtain a wide measurement bandwidth. The combination of the USB-4431 and the new vibration sensors, which include three accelerometers, a triaxial accelerometer and an impact hammer, gives engineers and scientists a complete stimulus response system from a single vendor for seamless product integration.
The USB-4431 is a five-channel DSA module for making high-accuracy measurements from integrated electronics piezoelectric (IEPE) sensors. The module consists of four 24-bit simultaneously sampled analog input channels and one 24-bit analog output channel, which are ideal for stimulus response test systems.
The USB-4431 also works well for a wide variety of field test applications such as frequency response audio tests and suspension shaker tests due to its portability. Additionally, the module delivers 100 dB of dynamic range and incorporates software-selectable IEPE signal conditioning for accelerometers and microphones.
The new sensor suite includes three high-accuracy accelerometers and a triaxial accelerometer that are compatible with all NI DSA devices. The accelerometers have low-impedance output signals that allow for accurate signal transmission over long cables, and their small form factor makes them easy to include in a wide variety of monitoring and test systems.
The triaxial accelerometer characterizes the acceleration of an object or device being measured in all three dimensions with a single sensor to minimize cabling at the source.
Also included in the sensor suite is a modal analysis impact hammer, a device that delivers effective measurements of stimulus signals. With this highly flexible impact hammer, engineers and scientists can measure the stimulus force for a wide range of frequencies and magnitudes required for proper object characterization.
The impact hammer, triaxial accelerometer and USB-4431 combine to form a precise
structural monitoring stimulus response test system.
Engineers and scientists can get their applications up and running quickly and efficiently with the configuration-based NI Sound and Vibration Assistant software or with more than 50 ready-to-run NI LabVIEW software example code bases provided in the NI Sound and Vibration Measurement Suite.
The software suite includes a pre-built Sound and Vibration Assistant project for impact hammer response to help engineers and scientists rapidly set up a structural test application.
The Sound and Vibration Measurement Suite also features pre-built virtual instruments (VIs) for NVH and rotating machinery vibration analysis applications so engineers and scientists can quickly set up almost any sound and vibration application.
Zilog intros enhanced, low-voltage serial communications controller
SAN JOSE, USA: Zilog Inc., a supplier of application specific, embedded system-on-chip (SoC) solutions for industrial and consumer markets, has announced a new enhanced low-voltage serial communications controller (SCC) for a variety of computing applications requiring increased performance and lower power consumption.
The Zilog Z8523L Enhanced SCC (ESCC) builds on Zilog's popular and original discrete SCC, providing a low-power solution that reduces the voltage from 5 to 3.3 volts. The ESCC also features performance improvements that allow applications including computer peripherals, networking equipment and routers to experience faster data rates and increased processor bandwidth.
"Zilog has made significant improvements with our new ESCC that helps our customers bring their high-speed data applications to market quicker, reducing their total cost and extending the life of their applications," said Mike Orr, Zilog vice president and general manager, Microcontroller Business Unit.
Before developing the 3.3 volt ESCC, Zilog customers used a regulator to achieve lower voltage with the original 5 volt Zilog SCC. The Zilog 3.3 volt ESCC has deeper FIFOs and other features that significantly reduce the software overhead for each channel. This allows for more channels per system, faster data rates with more CPU bandwidth and overall lower CPU costs.
The ESCC can support multiple channel and multiple protocols that easily interface to 8/16 bit addressable non-multiplexed address/data buses. The ESCC can be configured to satisfy a wide variety of serial communications applications.
On-chip features include baud rate generators, digital PLLs and crystal oscillators to reduce external logic. Additional features may include optimized FIFOs to support high speed SDLC transfers using DMA controllers.
The ESCC handles asynchronous formats, synchronous byte-oriented protocols and synchronous bit-oriented protocols. The ESCC can generate and check CRC codes in any synchronous mode and can be programmed to check data integrity in various modes.
The ESCC also has facilities for modem controls in both channels. In applications where these controls are not needed, the modem controls can be used for general-purpose I/O.
Zilog ESCC's are designed for use in multiple applications for serial communication needs. One of the key features offered by the ESCC is Extended Read Enable. Write Register values from the WR3, WR4, WR5, WR7, and WR10 can be examined in the ESCC. This feature improves system testability. It is also crucial for SCC/ESCC differentiation and allows generic software structures for all SCC/ESCC devices.
The Zilog Z8523L Enhanced SCC (ESCC) builds on Zilog's popular and original discrete SCC, providing a low-power solution that reduces the voltage from 5 to 3.3 volts. The ESCC also features performance improvements that allow applications including computer peripherals, networking equipment and routers to experience faster data rates and increased processor bandwidth.
"Zilog has made significant improvements with our new ESCC that helps our customers bring their high-speed data applications to market quicker, reducing their total cost and extending the life of their applications," said Mike Orr, Zilog vice president and general manager, Microcontroller Business Unit.
Before developing the 3.3 volt ESCC, Zilog customers used a regulator to achieve lower voltage with the original 5 volt Zilog SCC. The Zilog 3.3 volt ESCC has deeper FIFOs and other features that significantly reduce the software overhead for each channel. This allows for more channels per system, faster data rates with more CPU bandwidth and overall lower CPU costs.
The ESCC can support multiple channel and multiple protocols that easily interface to 8/16 bit addressable non-multiplexed address/data buses. The ESCC can be configured to satisfy a wide variety of serial communications applications.
On-chip features include baud rate generators, digital PLLs and crystal oscillators to reduce external logic. Additional features may include optimized FIFOs to support high speed SDLC transfers using DMA controllers.
The ESCC handles asynchronous formats, synchronous byte-oriented protocols and synchronous bit-oriented protocols. The ESCC can generate and check CRC codes in any synchronous mode and can be programmed to check data integrity in various modes.
The ESCC also has facilities for modem controls in both channels. In applications where these controls are not needed, the modem controls can be used for general-purpose I/O.
Zilog ESCC's are designed for use in multiple applications for serial communication needs. One of the key features offered by the ESCC is Extended Read Enable. Write Register values from the WR3, WR4, WR5, WR7, and WR10 can be examined in the ESCC. This feature improves system testability. It is also crucial for SCC/ESCC differentiation and allows generic software structures for all SCC/ESCC devices.
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