EDA industry revenue down in Q2-09

SAN JOSE, USA: The EDA Consortium (EDAC) Market Statistics Service (MSS) today announced that the Electronic Design Automation (EDA) industry revenue for Q2 2009 is $1,125.5 million, a 5.6 percent sequential decline from Q1.

On a Q2/Q2 basis, EDA industry revenue declined 15.8 percent to $1,125.5 million, compared to $1,335.9 million in Q2 2008. The four-quarter moving average declined 13.9 percent.

“This recession started with the most precipitous drop in electronics industry history. Nevertheless, the normal pattern of preserving most R&D spending has been maintained by most electronics companies,” said Wally Rhines, EDAC chair and chairman and CEO of Mentor Graphics. “As the electronics industry recovers, and its R&D spending increases to come in line with its growing revenue, the EDA industry would be expected to recover as well.”

Companies that were tracked employed 26,298 professionals in Q2 2009, down 6.1 percent from the 28,004 employed in Q2 2008, and down 1.0 percent from the 26,561 employed in Q1 2009.

Revenue by product category
Computer Aided Engineering (CAE), EDA’s largest category, generated revenue of $449.7 million in Q2 2009. This represents a 12.2 percent decrease over the same period in 2008. The four-quarter moving average for CAE declined 18.6 percent.

In the next largest category, IC Physical Design and Verification, revenue decreased to $270.6 million in Q2 2009, a 12.8 percent decrease compared to Q2 2008. The four-quarter moving average declined 19.7 percent for IC Physical Design & Verification.

Printed Circuit Board and Multi-Chip Module (PCB and MCM) revenue decreased 24.1 percent compared to Q2 2008, to $105.8 million. The four-quarter moving average for PCB and MCM decreased 10.4 percent.

Semiconductor Intellectual Property (SIP) revenue totaled $221.6 million in Q2 2009, a 16.3 percent decrease compared to Q2 2008. The four-quarter moving average for SIP decreased 5.0 percent.

Services revenue was $77.8 million in Q2 2009, a decrease of 28.6 percent compared to Q2 2008. The four-quarter moving average for services increased 7.5 percent.

Revenue by consuming region
The Americas, EDA’s largest region, purchased $509 million of EDA products and services in Q2 2009, representing an 11.5 percent decrease compared to Q2 2008. The four-quarter moving average was down 14.7 percent for the region.

Revenue in Europe, the Middle East, and Africa (EMEA) was down 21.1 percent in Q2 2009 compared to Q2 2008 on revenues of $212.4 million. The four-quarter moving average for EMEA was down 14.3 percent.

Q2 2009 revenue from Japan decreased 21.5 percent to $217.8 million compared to Q2 2008. The four-quarter moving average for Japan decreased 17.9 percent.

The Asia/Pacific (APAC) region decreased to $186.3 million in Q2 2009, a 13.1 percent decrease compared to the same quarter in 2008. The four-quarter moving average declined 5.3 percent.

EDA industry revenue down 10.7pc in Q1-09: EDA Consortium

SAN JOSE, USA: The EDA Consortium (EDAC) Market Statistics Service (MSS) today announced that the electronic design automation (EDA) industry revenue for Q1 2009 declined 10.7 percent to $1192.1 million, compared to $1334.2 million in Q1 2008, driven primarily by an accounting shift at one major EDA company. The four-quarter moving average declined 11.3 percent.

“The business environment remained difficult for EDA as for other industries, with Q1 EDA revenues declining in all regions except Asia Pacific,” said Walden C. Rhines, EDA Consortium chair and Mentor Graphics CEO and chairman. “Nevertheless, for Q1, the overall decline was less than for the previous quarter.”

Companies that were tracked employed 26,561 professionals in Q1 2009, down 2.8 percent from the 27,329 employed in Q1 2008, and down 2.7 percent from the 27,311 employed in Q4 2008.

Revenue by product category
Computer Aided Engineering (CAE), EDA’s largest category, generated revenue of $427.9 million in Q1 2009. This represents an 18.8 percent decrease over the same period in 2008. The four-quarter moving average for CAE declined 16.8 percent.

In the next largest category, IC Physical Design & Verification, revenue decreased to $302.2 million in Q1 2009, a 5.4 percent decrease compared to Q1 2008. The four-quarter moving average declined 21.6 percent for IC Physical Design & Verification.

Printed Circuit Board and Multi-Chip Module (PCB & MCM) revenue decreased 7.1 percent compared to Q1 2008, to $119.9 million. The four-quarter moving average for PCB & MCM decreased 0.6 percent.

Semiconductor Intellectual Property (SIP) revenue totaled $236.3 million in Q1 2009, a 12.8 percent decrease compared to Q1 2008. The four-quarter moving average for SIP decreased 1.4 percent.

Services revenue was $105.7 million in Q1 2009, an increase of 20.4 percent compared to Q1 2008. The four-quarter moving average for services was up 24.6 percent.

Revenue by Consuming Region
The Americas, EDA’s largest region, purchased $494 million of EDA products and services in Q1 2009, representing an 11.6 percent decrease compared to Q1 2008. The four-quarter moving average was down 15.4 percent for the region.

Europe, the Middle East, and Africa (EMEA) revenue was down 15.9 percent in Q1 2009 compared to Q1 2008, with revenues of $223.2 million. The four-quarter moving average for Western Europe was down 7.5 percent.

Q1 2009 revenue from Japan decreased 17.7 percent to $265.5 million compared to Q1 2008. The four-quarter moving average for Japan decreased 10.8 percent.

The Asia/Pacific (APAC) region increased to $209.4 million in Q1 2009, an 11.5 percent increase compared to the same quarter in 2008. The four-quarter moving average declined 4.7 percent.

EDA Consortium conducts multi-faceted investigation into EDA software piracy

SAN JOSE, USA: The EDA Consortium (EDAC) Anti-Piracy Committee is conducting an on-going investigation into EDA software piracy on multiple fronts.

“Until recently, many EDA vendors considered the software too complex to use without significant technical support for piracy to be a major concern. Advances in EDA software and access to fabrication have resulted in increasing concerns about software piracy” said Scott Baeder, Chairman of the EDA Consortium’s Anti-Piracy Committee and Senior Architect at Cadence Design Systems, Inc.

The EDA Consortium is working with multiple companies in the anti-piracy field to investigate EDA software piracy from multiple aspects. One aspect is availability – what software is available and where. Using a carefully chosen sampling of EDA products from various EDAC member companies, an investigation was conducted for EDAC by Arxan, Inc. into pirated EDA software availability and download activity on the internet. This will be followed by a more detailed investigation into how the “cracking” is being done, which could lead to improved software protection. Initial results have been interesting both from the standpoint of what is being pirated and the audacity of the pirates.

Another aspect of the investigation is focusing more on detection and identification of unauthorized use. A recent webinar conducted by V.i. Labs, Inc and EDAC presented this approach, which has been successfully used by EDAC members and others to re-coup revenues that would have been lost through piracy, both intentional and inadvertent. (Recognizing there are cases where the end user may not be aware they are using pirated software.)

A third aspect of the investigation, conducted for EDAC by S.A.F.E. Inc., bridges the other two approaches, looking at both the potential software vulnerabilities and the extent of the revenue loss to EDA vendors. This investigation looks at different categories of EDA software as well as different types of piracy, both intentional and unintentional.

In addition to the ongoing investigations, Mr. Baeder recently presented an overview of EDA software piracy to ICAF – Industrial College of the Armed Forces – which may have an interest in any national security implications of software piracy.

As the investigation proceeds, interim results have been presented to the EDAC Board of Directors and members. When the investigations are concluded, final reports will be made available to EDAC members.

Rapidly growing local market bring new opportunities for EDA in India

Those following the EDA industry are well aware that its been an industry in some trouble right through this year.

If you visited EDA Consortium's web site, this becomes clear. In Q1-08, the global EDA industry revenue for Q1 2008 declined 1.2 percent to $1,350.7 million compared to $1,366.8 million in Q1 2007.

Later, the EDA industry revenue for Q2 2008 declined 3.7 percent to $1357.4 million compared to $1408.8 million in Q2 2007, as reported by the EDA Consortium.

I am still waiting to see how the Q3 results shape up. My guess is, it would be even lower than Q2, unless there are a few surprises!

The EDA market in India, as per the ISA F&S Report 2005, was US$110m. The latest figures are not yet available, though I would believe the Indian EDA industry is likely to do better than the global industry, unless, there have been some slowdown effects here as well.

I had an interesting discussion with Jaswinder Ahuja, Corporate Vice President and Managing Director, Cadence Design Systems (I) Pvt. Ltd and Chairman, India Semiconductor Association (ISA), on the (dipping?) fortunes of the EDA industry lately.

According to Ahuja, 2008 has been a challenging year. The global financial crisis has impacted several industries and the EDA industry was no exception. Due to the overall downturn in the economy, companies are being more cautious and are delaying purchase decisions, a move that is impacting the overall EDA industry.

Coming to the drivers for EDA in India this year, there are a few key ones! First, the design centres have gained expertise and are now doing cutting-edge designs out of India. They have moved up the value chain from doing block-level design to increasingly owning up end-to-end design and design starts.

Second, several Indian design services companies have made significant acquisitions, showing that their businesses have not just taken root, but also flourished. MindTree Consulting’s acquisition of TES PV and Wipro’s acquisition of Oki's wireless chip design arm are cases in point, added Ahuja.

He said: "The Indian EDA industry has been growing and we will see more technology adoptions and proliferations in India Design Centers. Also, the rapidly growing local market is unfolding new opportunities."

EDA outlook 2009
Going forward, market pressures and design complexities are just some of the issues design teams face today. Cadence's customers, for instance, would like to plan in the context of IP selection, run analysis around power, performance and cost perspectives. Design predictability will be a priority, said Ahuja.

The key focus areas for the EDA industry will be new design for manufacturing technologies as designs move to advanced nodes; verification and verification IPs and multicore processing support for EDA flows as a result of increased integration.

Also, SaaS is likely to gain traction as companies are compelled to consider flexible engagement models to access state-of-the art design environments that help design teams reduce risk and cost, yet increase time-to-productivity.

Are there any opportunities for EDA folks in solar? Ahuja disclosed that in a recent poll by ISA, to the question 'Solar PV has potential in India', almost 90 percent of respondents replied Agree or Strongly Agree.

With the worldwide focus on alternative energy systems, India has witnessed several companies announcing investments in PV segment. This is good news for the Indian semiconductor ecosystem.

Cadence has a broad portfolio of technologies that addresses the needs of different players in the ecosystem.

Low power initiatives
Low power has always been a key focus area in semiconductors. According to Ahuja, power efficient design is gaining importance across the design chain and EDA companies will have to look closely at 'green' technologies.

Energy efficiency at the system and application level for wired and wireless products will be one of the focus areas. Emerging technologies that allow applications and systems developers to evaluate how their programs use power both individually and in a dynamic, multi-application model of the end system will help expand the role of EDA into system-level design.

The Power Forward Initiative (PFI), an industry alliance comprising of companies across the semiconductor design chain will work towards a more systematic, integrated approach to low-power design.

Outlook 2009
With the new year about to start in less than a week's time, the impact of the financial crisis will see an increased demand for mid-range product technology as consumers shift spend toward 'essential', rather than 'desirable' electronic products.

As per Ahuja, globally, semiconductor companies are focusing on their core strengths, consolidating and realigning resources. Across sectors, they will look for systems that marry functionality with cost efficiencies.

"Growth for semiconductor companies will come from energy related and low-power technologies that are able to drive market share shifts," he noted.

Cadence's Virtuoso vs. Synopsys' Galaxy Custom Designer!

Synopsys recently introduced the Galaxy Custom Designer, which provides a unified solution for custom and digital designs, thereby enhancing designer efficiency.

Well, this solution invariably draws a comparison with Cadence's Virtuoso platform within the EDA industry!

That prompted me to engage Sandeep Mehndiratta, Product Marketing Group Director, Cadence Design Systems, in this discussion. We discussed a range of issues, such as how the Synopsys' Galaxy Custom Designer matches up with the Virtuoso, and whether designers can now design what they wish, including concepts and flows, as well as the relevance of open architectures.

For the record, a few years ago, Cadence introduced the next-generation Virtuoso custom design IC 6.1 platform, which had a major upgrade recently with the IC 6.1.3 release. This release has been production-proven with tapeouts from many customers. However, as I said, it is Synopsys' Galaxy Custom Designer doing the rounds in the EDA circles as of now!

Galaxy Custom Designer vs. Virtuoso
It is well known that Cadence has been the established leader in custom IC design space for decades, and has been constantly improving and upgrading technology to ensure it is providing best-in-class platform for designing today's complex custom chips.

Mehndiratta said: "A couple of years ago we introduced the next-generation Virtuoso custom design IC 6.1 platform. This release has been production-proven with tapeouts from many customers. Some of the leading customers that have adopted the Virtuoso platform include Ricoh, National Semiconductor, Cambridge Analog Technologies Inc., Matsushita, etc.

"Synopsys has recently launched Galaxy Designer and it is unproven as yet. From what we've read and heard from some of our mutual customers, the competitive introduction may be attempting to replicate older custom IC technology. While the jury will probably be out for some time on this unproven tool, Cadence continues to provide a complete solution for design, verification and implementation of complex analog and mixed-signal designs, differentiated by the tight integration between the underlying technologies."

With the advent of Galaxy, is it now safe to say that designers can finally design what they wish, including concepts and flows? Well, the answer's not yet there! However, Mehndiratta did touch upon Cadence's solution that is built upon decades of experience in this area and a strong eco-system made up of partners, third-party providers and foundries. Virtuoso, he added, is the most complete eco-system for designing ICs; not only with its inherent flow, but also because of its linkages to multiple tools inside and outside of Cadence.

"For many years, we have provided a consistent front-to-back flow, and over that time we have learned much about what customers need to do their designs efficiently. It is that knowledge base that we leveraged to accelerate productivity with 6.1 release couple of years back," he added.

If that is the case, why has it taken so long for a first modern-era mixed-signal implementation solution to be in place?

He referred to Cadence's next generation Virtuoso 6.1 introduced in November 2006, said to be the first modern, and most complete custom design solution released natively on the OA database. Productivity benefits are significant. RFIC Solutions Inc., a third-party intellectual property and design service provider, is said to have increased productivity two-fold by adopting the Cadence Virtuoso custom design platform.

Likewise, INSIDE Contactless, a fabless company and leader in contactless technology providing high-performance chipsets for secure, fast and reliable transactions with electronic identification, saved 20 percent in development time by adopting Cadence Virtuoso UltraSim Full-Chip Simulator, a component of Virtuoso Multi-Mode Simulation with a high-performance digital-solver technology, for the verification of its current and next-generation contactless and Near Field Communication (NFC) system-on-chip (SoC) designs.

He noted: "Specifically, mixed-signal design is evolutionary, not revolutionary. The concept of mixed-signal design isn't new. People have been designing in this manner for 15+ years. What is new is the more holistic approach being taken by designers developing mixed-signal circuits. The once clear lines between analog and digital design are blurring, and now the idea of "mixed-signal" is being architected in right from the beginning.

"That is why Cadence's AMS Designer covers transistor to system level design with a single simulation solution for complete verification. It is why Cadence has combined the power of its leading implementation platforms (Virtuoso and Encounter) to handle the implementation of mixed-signal designs."

Given that Synopsys' Galaxy Custom Designer can provide a unified solution for custom and digital designs, thereby enhancing designer efficiency, how will it change/affect designing, and the EDA landscape?

Mehndiratta pointed out that Cadence had defined a unified solution long ago. "Our industry leadership in this area, and Synopsys mimicking of that solution are testaments of Cadence's vision. Competition is good for all industries, the end-customer usually benefits. You can count on Cadence to not only remain competitive, but also retain our industry leadership in custom/mixed-signal design."

Importance of open architecture
Let us also look at the importance of open architecture that natively supports interoperable PDKs.

Cadence also believes in open architectures. Its Design Framework II was built as an open architecture, and that's the reason, why there are many companies that have connected (30+) to form a larger ecosystem. Whereas, the Industry Standard Framework has been tried and failed, the company maintains.

Mehndiratta said: The reason it was a failure is the same as interoperable PDKs. Building frameworks and PDKs that are based on a "lowest common denominator" principle do not provide the most optimized design flow. Instead, you are left with systems that try to please everyone and in the end are rejected as bloated beasts retarding the progress of design."

Finally, how does Cadence propose to address the Galaxy challenge?

As expected, Cadence hopes to continue to provide customers and partners with a framework in which they can build their tools into the Virtuoso design flow in the most optimized way possible.

Also, by providing its proven and industry standard Pcell technology that takes advantage of the key features in Cadence's design flow, thereby allowing for fast and productive design today and in the future.