Cadence and Xilinx intro FPGA IP ecosystem microsite

SAN JOSE, USA: Cadence Design Systems Inc. and Xilinx have introduced the new Xilinx IP Ecosystem microsite, a unified site meant to increase FPGA and ASIC designers’ visibility to the latest IP supporting the Xilinx programmable platform..

The microsite, developed as part of a broad initiative announced by Xilinx to transform and enable its ecosystem of third-party providers, is part of the ChipEstimate.com portal.

The site includes Xilinx’s full FPGA IP catalog, in addition to IP from an initial set of the company’s third-party Alliance Members.

“This new microsite enables our existing FPGA customers, as well as ASIC developers looking at alternative solutions, to find the key IP they need to develop their designs on the Xilinx programmable platform,” said Dave Tokic, senior director of Partner Ecosystems and Alliances at Xilinx.

“With a worldwide audience of more than 30,000 registered users, ChipEstimate.com is a great venue for both the ASIC and FPGA communities to learn about the latest IP available on Xilinx FPGAs.”

“This microsite is an excellent example of the types of innovative collaboration Cadence is entering as part of the EDA360 vision,” said Adam Traidman, general manager of Chip Planning Solutions at Cadence.

“We understand that only by joining with other industry leaders can we provide the types of efficiencies our customers need to streamline the design process and hit their productivity and profitability targets.”

Users can explore the Xilinx IP ecosystem microsite by visiting www.chipestimate.com/xilinx