2010 International Electron Devices Meeting, SAN FRANCISCO, USA: Semiconductor Research Corp. (SRC), the world's leading university-research consortium for semiconductors and related technologies, and researchers from Waseda University in Tokyo today announced they have developed the process and materials for precisely controlling both the amount and the position of channel dopants.
This advance should help extend the manufacturability of semiconductors beyond conventional doped-channel device technologies. The result is projected to enable near atomic-scale devices and single-dopant devices, helping electronics makers meet the demand for smaller, faster and cheaper chips.
The announcement from the research team reveals the significant influence that the location of individual dopants has on transistor performance. The findings demonstrate the impact of a very small number of dopant atoms on device performance, making the assumption of uniform dopant distribution incorrect. The naturally occurring non-uniform distribution causes significant variability in transistor characteristics, threatening further semiconductor miniaturization.
“We expect this research to help extend CMOS technologies by 10 years,” said Professor Takahiro Shinada of Waseda University, lead investigator for the SRC project. “Our research serves to highlight the improvements in device performance that can be achieved through near atomic-scale control of the doping process, which could realize ultimate-doped devices.”
The researchers are able to fabricate transistors whose channel dopants are introduced one-by-one, revealing that channel dopant location has a strong impact on sub-threshold current variability.
“The semiconductor industry faces unacceptable variations in device-to-device performance, and a major challenge to control these variations is the random dopant distributions that cause intrinsic fluctuations,” said Dan Herr, SRC director of Nanomanufacturing Sciences. “Deterministic doping, per our single-ion implantation, is a key step for the extensibility of existing doped-channel CMOS devices at 16nm and beyond.”
An important observation is that the sub-threshold current is sensitive to the individual dopant location, and the sub-threshold current is always larger when the dopants are located at the drain side rather than at the source side. The team’s ability to control the location of individual dopants enhances drain current and, therefore, the potential performance of semiconductors.
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