Samsung readies green memory with advanced chip stacking technology after extensive system-level testing

SEOUL, SOUTH KOREA: Samsung Electronics Co. Ltd has announced the development of an eight gigabyte (GB) registered dual inline memory module (RDIMM) based on its advanced Green DDR3 DRAM.

The new memory module, which has just been successfully tested by major Samsung customers, delivers superior performance, in particular because of its use of a three-dimensional (3D) chip stacking technology referred to as 'through silicon via' (TSV).

“At Samsung, we’re well positioned to accommodate early market demand for our state-of-the-art TSV technology as the industry continues to forge forward with even further advances in bonding technology to enable greater performance and operational efficiency,“ said Dr. Chang-Hyun Kim, senior vice president and Samsung fellow, memory product planning & application engineering at Samsung Electronics.

“Our 40nm-class RDIMM being announced today marks the introduction of a more advanced eco-friendly 'Green Memory' product line up utilizing 3D-TSV technology that is expected to enhance the leadership of Samsung and our allies in server and enterprise storage.”

An 8GB RDIMM utilizing Samsung’s 3D TSV technology saves up to 40 percent of the power consumed by a conventional RDIMM. Also, the TSV technology allows for a dramatic improvement in memory chip density that is expected to offset the decrease of memory sockets in next generation server systems.

In the face of a 30 percent decrease in memory slots in next-generation servers, the TSV technology will be able to raise the DRAM density by more than 50 percent, making it highly attractive for high-density, high-performance server systems.

Samsung’s TSV technology is a key to solving the paradox of driving lower power consumption in servers, while increasing memory capacity and improving performance.

The TSV technology fabricates micron-sized holes through the silicon vertically, with a copper filling. By using the ‘through silicon via’ bonding process instead of conventional wire bonding, signal lines are shortened significantly, enabling the multi-stacked chip to function at levels comparable to a single silicon chip.

Already passing customer performance tests, Samsung is readying its TSV technology for a variety of server applications having stringent performance and power demands.

Increasingly widespread adoption of the 3D TSV technology is expected to take place from 2012. Samsung plans to apply the higher performance and lower power features of its TSV technology to 30nm-class* and finer process nodes.