Synopsys' MIPI C-PHY verification IP accelerates adoption of MIPI Alliance's physical layer specs

MOUNTAIN VIEW, USA: Synopsys Inc. announced the availability of verification IP (VIP) for the MIPI Alliance MIPI C-PHY specification that uses three-phase digital coding techniques to provide higher performance for camera, display and system-on-chip (SoC) interfaces without affecting bandwidth.

Synopsys, a contributing member of the MIPI Alliance, provides VIP and design IP that accelerate the adoption of MIPI-based standards in mobile and mobile-influenced industries, including automotive and medical, that can leverage MIPI Alliance standards such as those for display, camera and sensor interfaces.

The release of this new VIP helps enable engineers to verify interfaces such as MIPI CSI-2 v1.3, which includes the MIPI C-PHY. Synopsys VIP supports the MIPI Alliance protocol specifications including D-PHY, C-PHY and M-PHY and is based on a native SystemVerilog architecture for enhanced ease of use, performance and debug, enabling compliance checking of IP blocks and SoC interfaces.

"As a global alliance that addresses the interoperability and high performance of electronic interfaces used in mobile devices, we are continually responding to the needs of our member companies with enhancements and innovations. The MIPI Alliance's development of the MIPI C-PHY specification was driven by the need to create an interface for peripherals with limited bandwidth while maintaining compatibility with the MIPI D-PHY implementations," said Joel Huloux, chairman of the board of MIPI Alliance.

"The release of the Synopsys MIPI C-PHY verification IP strengthens the overall ecosystem that is required to enable fast development of products as design teams race to implement new functionality."

"We have collaborated extensively with leading-edge SoC design teams to address the increasingly demanding process of protocol compliance verification. The release of a new, faster and more sophisticated revision of a protocol creates challenges for design teams as they strive to rapidly verify compliance against the new specification," said Debashis Chowdhury, VP of R&D, Synopsys Verification Group.

"We continue to deliver solutions that enable designers to accelerate their SoC verification closure and decrease time to market. The Synopsys VIP for MIPI C-PHY provides engineers with a solution that includes the built-in protocol knowledge, features and methodology they need to save time, increase design quality and meet project schedules."