GaN-on-silicon substrate patent investigation

LONDON, ENGLAND: GaN-on-Si technology appeared naturally as an alternative to GaN-on-Sapphire—the main stream technology for LED applications. Today, despite potential cost benefits, the mass adoption of GaN-on-Si technology for LED applications remains unclear.

Most major LED makers have a patenting activity related to GaN-on-Si technology, but so far, few have made it the core of their strategy and technology roadmap. Contrary to the LED industry, we expect GaN-on-Si to be widely adopted by Power Electronics and RF applications because of its lower cost and CMOS compatibility.

The growth of GaN-on-silicon substrate was first reported in the early-1970s (T. L. Chu et al., J. Electrochemical Society, Vol. 118, page 1200), since the early 1990s more and more academics and industrials have been involved in developing this technology. GaN-on-Si technology is now poised for a list of technical challenges.

The high lattice mismatch between GaN and Si results in a high defect density in epitaxial layers (dislocations). The high thermal expansion coefficient (TCE) mismatch between GaN and Si leads to a large tensile stress during cooling from the growth temperature to room temperature. The tensile stress causes film cracking and a concave bending of the wafer (warpage). These factors combine to make both dislocation density and crack/warpage reduction a challenging task.

This patent investigation covers patents published worldwide up to December, 2013. The patents addressing the above mentioned challenges have been selected, and an in-depth analysis of patent holders and corresponding patented technologies is provided. This report does not include patents related to active layers or GaN-based devices.

Fundamental patents describing a gallium-nitride-based compound semiconductor grown on a silicon substrate were filed before the 1990s with the most significant assigned to TDK and Fujitsu. In the early 1990s, Toyoda Gosei and the University of Nagoya filed the first concepts of a buffer layer for improving the crystallinity of GaN. Those fundamental patents have been followed by an ever increasing number of applications since 1995 as more companies competed in GaN-on-Si technology to meet the technological challenges, the market demand and to lower manufacturing costs.

Currently, the patented technologies reflect the significant improvements that have been made on key material issues such as dislocation density reduction and stress management for preventing cracks and warpage of the wafer. According to our analysis, GaN-on-Si IP is mature enough to initiate mass production.