HYDERABAD, INDIA: Actel Corp. today announced the availability of RTAX-DSP prototype FPGAs, enabling hardware demonstration and timing validation of designs targeted to Actel’s RTAX-DSP space-flight FPGAs.
The newly available RTAX-DSP prototype devices have the same pin assignment, mechanical footprint and identical timing properties across the full military temperature range (-55°C to 125°C) as their space-qualified counterparts.
RTAX-DSP space-flight FPGAs add embedded radiation-tolerant multiply-accumulate blocks to the tested and proven industry-standard RTAX-S product family.
The result is a dramatic increase in device performance and utilization when implementing arithmetic functions, such as those encountered in hardware DSP algorithms, without sacrificing reliability or radiation tolerance.
“The availability of RTAX-DSP prototype FPGAs enable designers to demonstrate their RTAX-DSP designs in hardware across the full operational temperature range,” said Ken O'Neill, director of high-reliability marketing for Actel.
“With the availability of these prototype devices, the RTAX-DSP program has achieved another important milestone in providing the high performance combined with high reliability needed by designers of signal processing systems for space-flight applications.”
RTAX-DSP features
Providing a flexible alternative to expensive radiation-hardened ASICs, RTAX-DSP FPGAs feature up to 120 multiply-accumulate DSP mathblocks, protected against radiation-induced single event upsets (SEU) and single event transients (SET).
The RTAX-DSP FPGAs use the same 0.15 µm UMC wafer fabrication process and the same antifuse programmable interconnect technology that are used in the industry-standard RTAX-S FPGA family, which is now accumulating space-flight heritage on as many as nine space programs.
RTAX-DSP FPGAs offer high performance at densities of up to four million equivalent system gates and 840 user I/Os for space-based applications. The embedded DSP mathblocks feature 18 bit x 18 bit multiply-accumulate blocks enabling efficient implementation of DSP building blocks, such as finite impulse response (FIR) filters, infinite impulse response (IIR) filters, and fast Fourier transforms (FFT). Each mathblock is capable of operating at 125 MHz across the full military temperature range.
The RTAX-DSP family of FPGAs is fully supported by the Actel Libero Integrated Design Environment (IDE). From design, synthesis and simulation, through floorplanning, place-and-route, timing constraints and analysis, power analysis and program file generation, Libero IDE manages the entire design flow quickly and efficiently.
Showing posts with label Actel. Show all posts
Showing posts with label Actel. Show all posts
Tuesday, September 8, 2009
Thursday, June 18, 2009
Synopsys, Actel renew OEM relationship for FPGA design software
MOUNTAIN VIEW, USA: Synopsys Inc. and Actel Corp. announced a multi-year extension of their OEM agreement for FPGA design tools. Under the terms of the agreement, Actel maintains rights to provide Actel-specific versions of Synopsys' Synplify Pro, Identify and Synplify DSP software as part of the Libero Integrated Design Environment (IDE).
Actel has been offering these products to its customers for more than 10 years through an OEM agreement with Synplicity, which was acquired by Synopsys in May 2008. The objective is to provide highly optimized software solutions for Actel's complete portfolio of FPGA products, including the IGLOO®, Actel Fusion® and RTAX families of FPGAs.
"Actel's customers have come to expect the best in FPGA synthesis over the years," said Jim Davis, Vice President of Software and Systems Engineering at Actel.
"Synopsys is a valued, best-in-class supplier, and we are very pleased to be able to continue to bundle Synopsys products as part of the Libero IDE."
"Actel provides distinctive programmable solutions for important electronic applications, including those requiring low-power, radiation-tolerant or mixed-signal FPGAs," said George Zafiropoulos, Vice President of Solutions Marketing at Synopsys. "Our technology-leading FPGA design and verification tools have been designed to take full advantage of the unique features of Actel devices and to provide our mutual customers with the quality of results and productivity required to address the needs of their markets."
In addition to the technology-leading Synplify Pro FPGA synthesis product, the OEM agreement includes Synopsys' Identify RTL debugger software. The Identify product is a functional verification tool that provides probing and visibility into a live, running FPGA.
The Identify RTL Debugger allows designers to debug an operating FPGA directly in their RTL source code, providing an efficient alternative to debugging at the gate level, where signal names may have been changed by synthesis and no longer match the RTL.
Designers implementing DSP algorithms will have a very fast and reliable path into Actel devices using Synopsys' Synplify DSP algorithm synthesis product. The Synplify DSP tool provides a unique high-level synthesis methodology that realizes significant productivity and optimization advantages over traditional HDL design flows.
System and algorithm designers can quickly capture complex algorithmic behavior using the Synplify DSP model library, which includes vector arithmetic, fixed-point precision up to 128-bits, and a rich set of IP cores. The Synplify DSP synthesis engine allows designers to automatically implement and explore a range of area/speed-optimized architectures from a single model and generate verification testbenches from a high-level environment.
Actel has been offering these products to its customers for more than 10 years through an OEM agreement with Synplicity, which was acquired by Synopsys in May 2008. The objective is to provide highly optimized software solutions for Actel's complete portfolio of FPGA products, including the IGLOO®, Actel Fusion® and RTAX families of FPGAs.
"Actel's customers have come to expect the best in FPGA synthesis over the years," said Jim Davis, Vice President of Software and Systems Engineering at Actel.
"Synopsys is a valued, best-in-class supplier, and we are very pleased to be able to continue to bundle Synopsys products as part of the Libero IDE."
"Actel provides distinctive programmable solutions for important electronic applications, including those requiring low-power, radiation-tolerant or mixed-signal FPGAs," said George Zafiropoulos, Vice President of Solutions Marketing at Synopsys. "Our technology-leading FPGA design and verification tools have been designed to take full advantage of the unique features of Actel devices and to provide our mutual customers with the quality of results and productivity required to address the needs of their markets."
In addition to the technology-leading Synplify Pro FPGA synthesis product, the OEM agreement includes Synopsys' Identify RTL debugger software. The Identify product is a functional verification tool that provides probing and visibility into a live, running FPGA.
The Identify RTL Debugger allows designers to debug an operating FPGA directly in their RTL source code, providing an efficient alternative to debugging at the gate level, where signal names may have been changed by synthesis and no longer match the RTL.
Designers implementing DSP algorithms will have a very fast and reliable path into Actel devices using Synopsys' Synplify DSP algorithm synthesis product. The Synplify DSP tool provides a unique high-level synthesis methodology that realizes significant productivity and optimization advantages over traditional HDL design flows.
System and algorithm designers can quickly capture complex algorithmic behavior using the Synplify DSP model library, which includes vector arithmetic, fixed-point precision up to 128-bits, and a rich set of IP cores. The Synplify DSP synthesis engine allows designers to automatically implement and explore a range of area/speed-optimized architectures from a single model and generate verification testbenches from a high-level environment.
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