WASHINGTON, USA: The SDR Forum, a non-profit international industry association dedicated to promoting the success of next generation radio technology, today announced the addition of three new members.
“GateHouse is benefiting from participating in the SATCOM-SIG, which provides excellent networking opportunities and good access to industry information,” says new member GateHouse’s Mette D. Lilkær. “We are also pleased to have the opportunity to present our competences at conferences within the Forum and to attend conferences at reduced rates. We are looking forward to the future cooperation with SDR Forum and to take advantage of our membership.”
New members include:
GateHouse (http://www.gatehouse.dk/) - GateHouse is specialized in technical software development and system integration for advanced communications systems. Our primary business areas are satellite communications, software defined radio and tracking (coastal surveillance and asset tracking).
We have been involved in the satellite communications business for over 10 years, developing a wide range of satellite communications products and building up unique competences within satcom and specifically within software for BGAN products. Based on these competences GateHouse has developed a BGAN waveform for SDR, and more waveforms are on the way. Please visit www.gatehouse.dk for further information.
Innovative Integration (http://www.innovative-dsp.com) – Innovative Integration is a leader in signal processing and data acquisition hardware and software. Our products combine DSPs and FPGAs with high performance analog, ready for integration into demanding real-time applications such as wireless, medical, and military.
Innovative Integration offers a complete solution for software defined radio (SDR) applications by integrating R-Interface’s IP for SDR with Innovative’s high performance X5 family of digitizers and powerful application development tools for FPGA development. System designers can buy the X5-400M card pre-configured with the receiver IP of their choice ready to use.
RADMOR (http://radmor.com.pl/index.php?lang=en) - RADMOR S.A. is the largest producer of mobile UHF FM radio communication equipment in Poland. We offer comprehensive services – from network design, to delivery, assembly and servicing of equipment. Our military equipment is suitable for building state-of-the-art digital tactical radio communication systems.
Our civil equipment is suitable for building both state-of-the-art trunking networks (e.g., digital networks or analog networks, based on MPT 1327 standard), and traditional dispatcher systems – depending on the Customer’s needs and financial resources. We export equipment and technologies to many countries in Europe, e.g., Czech Republic, Slovak Republic, Lithuania, Latvia and Estonia, as well as to North Africa.
Showing posts with label SDR. Show all posts
Showing posts with label SDR. Show all posts
Tuesday, August 11, 2009
Monday, June 29, 2009
Altera Cyclone III LS -- first low power FPGAs with anti-tamper, design security, design separation
Altera has developed the industry's first low power FPGAs with anti-tamper, design security, and design separation. Extending low-power leadership, these low power FPGAs offer double the resources for less than 0.25W!
The image highlights how Altera is striving to extend its low power leadership with the Cyclone III LS devices.
Source: Altera.
The Cyclone III LS devices offer up to 200K LEs for less than 0.25W of static power. It is said to be targeting power- and board-space-sensitive applications in all market segments. "Any market that requires low power and security features will require this product," said Ms Susan Chang, AP marketing manager for Cyclone Series, Altera, underlining the growing importance of low-power FPGAs into power-constrained applications. The devices are shipping to customers now.
A closer look at the Cyclone III LS FPGAs reveals the following:
Low power: 200K LE (logic elements) for under 0.25W; TSMC 60nm low-power (LP) process; and Quartus II software power-aware design flow.
* Information assurance design suite: Offering data protection for information-assurance applications, features include anti-tamper, design security, design separation and IP, design examples, etc.
* High functionality: Featuring densities ranging from 70K to 200K LEs; up to 8.2 Mbits of embedded memory; and up to 396 embedded multipliers.
The Cyclone III LS FPGAs are said to have the most comprehensive IP protection in an FPGA. It protects the IP with anti-tamper and design security. "There is a JTAG port protection to prevent reverse engineering," Chang added.
Security features include CRC to monitor for configuration changes, zeroizing the device if tampering is detected, and an on-chip oscillator that acts as an uninterruptible clock source for system monitoring.
Design separation features include single-chip redundancy and supporting information-assurance applications. This leads to reduction in power and board space, as well as reduction in BOM (bill of materials) cost -- by about 50 percent.
Yet another feature is that of data assurance with design separation. Designers can now create physically isolated partitions with design separation. This protects against time-dependent faults and SEU, and increases the system uptime as well. These enable achieving a higher level of integration on a single device.
Military market and SDR
According to Chang, the military market will be among the most important ones for these devices. Hence, Altera's clear thrust on design security and prevention of reverse engineering!
Focusing on the size, weight, and power (SWaP), these will support next-generation SDR waveforms with small footprint and low power (e.g., MUOS, SRW), night-vision goggles, and secure communications. It features crypto-modernization moving toward standardization.
The Cyclone III LS devices also support existing SDR (software-defined radio) applications. Chang said that SDR is one common design trend in the military market.
The next-generation software-defined radio (SDR) waveforms require more memory and logic for networking in the field and low power for extended battery life. Some other key requirements include small footprint for board space, data security for multiple channels in a single chip, and IP security and anti-tamper.
As far as the next-generation SDRs are concerned, these devices will facilitate reduction of the overall board space by up to 50 percent, an increase in the battery life by up to 2X, besides facilitating a single-chip secure SDR solution.
The image highlights how Altera is striving to extend its low power leadership with the Cyclone III LS devices.
Source: Altera.The Cyclone III LS devices offer up to 200K LEs for less than 0.25W of static power. It is said to be targeting power- and board-space-sensitive applications in all market segments. "Any market that requires low power and security features will require this product," said Ms Susan Chang, AP marketing manager for Cyclone Series, Altera, underlining the growing importance of low-power FPGAs into power-constrained applications. The devices are shipping to customers now.
A closer look at the Cyclone III LS FPGAs reveals the following:
Low power: 200K LE (logic elements) for under 0.25W; TSMC 60nm low-power (LP) process; and Quartus II software power-aware design flow.
* Information assurance design suite: Offering data protection for information-assurance applications, features include anti-tamper, design security, design separation and IP, design examples, etc.
* High functionality: Featuring densities ranging from 70K to 200K LEs; up to 8.2 Mbits of embedded memory; and up to 396 embedded multipliers.
The Cyclone III LS FPGAs are said to have the most comprehensive IP protection in an FPGA. It protects the IP with anti-tamper and design security. "There is a JTAG port protection to prevent reverse engineering," Chang added.
Security features include CRC to monitor for configuration changes, zeroizing the device if tampering is detected, and an on-chip oscillator that acts as an uninterruptible clock source for system monitoring.
Design separation features include single-chip redundancy and supporting information-assurance applications. This leads to reduction in power and board space, as well as reduction in BOM (bill of materials) cost -- by about 50 percent.
Yet another feature is that of data assurance with design separation. Designers can now create physically isolated partitions with design separation. This protects against time-dependent faults and SEU, and increases the system uptime as well. These enable achieving a higher level of integration on a single device.
Military market and SDR
According to Chang, the military market will be among the most important ones for these devices. Hence, Altera's clear thrust on design security and prevention of reverse engineering!
Focusing on the size, weight, and power (SWaP), these will support next-generation SDR waveforms with small footprint and low power (e.g., MUOS, SRW), night-vision goggles, and secure communications. It features crypto-modernization moving toward standardization.
The Cyclone III LS devices also support existing SDR (software-defined radio) applications. Chang said that SDR is one common design trend in the military market.
The next-generation software-defined radio (SDR) waveforms require more memory and logic for networking in the field and low power for extended battery life. Some other key requirements include small footprint for board space, data security for multiple channels in a single chip, and IP security and anti-tamper.
As far as the next-generation SDRs are concerned, these devices will facilitate reduction of the overall board space by up to 50 percent, an increase in the battery life by up to 2X, besides facilitating a single-chip secure SDR solution.
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