Synopsys' next-gen DesignWare data converter IP delivers 50 percent lower power with smaller area

MOUNTAIN VIEW, USA: Synopsys Inc. has released its next-generation DesignWare Data Converter IP solutions, which deliver more than 50 percent improvement in power with smaller area compared to the previous generation of data converters.

Optimized for mobile broadband wireless communication applications such as WiFi, WiMAX, LTE, and digital TV reception, the DesignWare Data Converter IP can reach extremely high sampling rates with excellent dynamic performance, while processing signal bandwidth beyond 100 MHz. These characteristics also make the data converters ideal for emerging, very-high data rate standards such as WiFi (802.11ac) and home networking (G.hn), and for the direct conversion of high intermediate frequency (IF) signals.

Synopsys' new ultra-low power and compact DesignWare Data Converter IP solutions consist of high-performance, analog-to-data converters (ADCs) and digital-to-analog converters (DACs) including:
* 10-bit and 12-bit pipeline ADCs running up to 250 MSPS in single channel and dual channel configurations.
* 14-bit current steering DACs running up to 400 MSPS in single channel and dual channel configurations.

These latest additions to Synopsys' extensive DesignWare Data Converter IP portfolio help designers significantly reduce the area and power dissipation of their system on chips (SoCs), simplify system integration and lower overall silicon cost.

"Consumer product end-users are not just users of media applications, but are rapidly becoming producers of content such as videos, music, gaming and photos, all of which are being sent wirelessly from mobile devices," said Ganesh Ramamoorthy, research director at Gartner. "Our research indicates strong growth for semiconductors in the communications, home networking and video markets over the next five years. As an essential element of the communications modem, low power data converter IP from IP vendors will play a key role for communication products over the next decade, providing designers with low risk solutions for their next-generation SoCs."

"With more than 13 years of experience delivering analog IP for a broad range of applications, Synopsys continues to invest significantly in developing data converter IP products to deliver unmatched power dissipation, area performance and speed characteristics," said John Koeter, vice president of marketing for IP and systems at Synopsys. "By designing this latest generation of DesignWare Data Converter IP toward ultra-low power optimization and a compact footprint, Synopsys enables designers of broadband communication, digital TV and video products to readily embed functionality into their SoCs to offer competitive differentiation with less risk and improved time-to-market."

The new DesignWare Data Converter IP solutions for the 65-nm LP process are available now. Support for the 40-nm LP process is scheduled to be available in Q2'11. Current DesignWare data converters for broadband communication applications, such as 10-bit General Purpose (GP) ADC, 11-bit GP DAC and 12-bit current-steering dual DAC, are also available now in the 65-nm LP and 40-nm LP processes.