SAN JOSE, USA: To meet ENERGY STAR regulations and reduce bill of material (BOM) cost, designers aim for stable performance with fewer components in their overall product design. This need for efficient devices is making Power Factor Correction (PFC) increasingly relevant to designers.
Fairchild Semiconductor (NYSE: FCS) addresses this need with the FAN7930, an active PFC controller for boost PFC applications that operate in critical conduction mode (CRM). This device is ideal for LCD and PDP TV applications, as well as for applications using less than 200W where PFC is mandated, including Class C lighting equipment greater than 25W, and Class D PC, TV and monitors greater than 75W.
The FAN7930 uses a voltage-mode PWM which compares an internal ramp signal to the error amplifier output, resulting in a MOSFET turn-off signal. Because the voltage-mode CRM PFC controller does not need rectified AC line voltage information, it saves the power loss of an input voltage sensing network necessary for a current-mode CRM PFC controller.
Packaged in an 8-pin SOP, the FAN7930 includes a PFC-ready pin which can be used to trigger the next power stages, as an example in the LLC conversion stage, when PFC output voltage reaches the proper level with hysteresis. Also in the next power stage, the PFC-ready pin eliminates the need for an external circuit for PFC under-voltage lockout (UVLO) while reducing power loss.
The FAN7930 also includes a maximum switching frequency limitation and stable operating at the abnormal condition such as high noise and current. The AC Absent Detection function increases system reliability during the fast AC On-Off Test or in the event of a short electric power failure.
Additionally, the device provides soft-start and overshoot-less functions, reducing voltage and current stress at start-up while eliminating audible noise from unwanted over-voltage protection (OVP) triggering.
As an industry leader in the development of power discrete, power analog and opto devices, Fairchild Semiconductor leveraged their advanced processes to integrate the functionality into the FAN7930 in order to simplify designs, decrease part counts and BOM and provide the level of performance demanded by design needs.
Prices start at $1 in 1,000 quantity pieces. Delivery takes 36 weeks ARO. Samples are available now.
Friday, July 2, 2010
MEMS automotive sensors to recover in 2010
EL SEGUNDO, USA: Following its toughest year in recent memory, the market for Microelectromechanical System (MEMS) automotive sensors will rebound sharply in 2010, but continued high sales might lead to an overheated market that could push the industry back into depression, according to new research from iSuppli Corp.
Global shipments of automotive MEMS sensors are projected to reach 591.2 million units in 2010, up a resounding 17.8 percent from 502.0 million.
Such growth represents a welcome turnaround after a challenging 2009 for MEMS sensors. While early 2009 saw orders to sensor companies all but dry up because of the fallout of the economic recession, shipments picked up rapidly in the fourth quarter, exceeding even the high point reached in 2007—making for a wild, bumpy ride last year.
However, the newly strengthened market in 2010 marks the beginning of an upturn that will continue until at least the end of 2014, iSuppli data indicate. The figure presents iSuppli’s forecast for MEMS sensors from 2009 to 2014.
Source: iSuppli, USA.
“The revitalized automotive MEMS market in 2010 is being driven by the exceptionally strong performance of MEMS pressure sensors, which are used in key applications to measure tire pressure and engine performance,” said Richard Dixon, senior analyst for MEMS and sensors at iSuppli. “According to reports from at least half of the sensor supply industry, shipments are running at three times the historic average, bolstered by a strong production pickup in passenger vehicles coupled with inventory replenishment.”
About half of the year’s requirement for MEMS pressure sensors was satisfied in the first four months alone of 2010, iSuppli estimates, with major Tier 2 companies now reporting inability to make and ship the sensors quickly enough, and with first-tier suppliers indicating a shortage of parts in many areas of the supply chain.
“As a result of these developments, MEMS suppliers are busy exploiting whatever advantage they enjoy at the moment, even though a healthy skepticism abounds on prospects facing the industry down the road and especially in 2011,” Dixon said. “And should sales continue at this level—with indicators so far not showing signs of the market slowing down—a potential overheating could ensue, raising the specter of a possible second slump later this year following the decline of 2009.”
Among the regions, North America will account for the largest share in the consumption of MEMS, making up 40 percent of the total in 2010. Europe is next, with about one-third share. China and Japan also show up strongly, each counted as a separate market of consumption. A fourth area—an agglomeration known as the “Rest of the World” (ROW) that includes South Korea, Russia and Latin America—is roughly on par with Japan but scores lower than China.
Mandates drive MEMS sensor growth
A number of factors will drive the growth of MEMS sensors in cars—projected to increase from an average of 8.12 per vehicle in 2009 to more than 11.5 by 2014.
Mandates continue to be the main market shaper, with electronic stability systems to become obligatory for vehicles in the United States by 2012 and in the European Union by 2014. Also to become mandatory in Europe by 2014 are tire pressure monitoring systems (TPMS).
The developments are expected to boost sales overall: ESC mandates will help propel the sales of gyroscopes, accelerometers and high-pressure sensors, while TPMS mandates will spur
MEMS pressure sensor shipments close to 137.9 million by 2014, up from just 42.9 million in 2009.
In the case of powertrain sensors, their use in pressure and flow measurements in the engine combustion control loop is increasingly driven by stringent regulations to reduce emissions. Alongside established markets for manifold air pressure and barometric air pressure management, emerging stop-start systems that turn the engine off at junctions will grow from about 1 million units to 13 million in five years, iSuppli figures show.
Sensor standouts
In the sensor supply chain, vertically integrated suppliers like Robert Bosch GmbH and Denso Corp. continued to dominate in 2009, pulling in $355 million and $203 million, respectively. Other major revenue earners included Freescale Semiconductor Inc., the foremost independent MEMS sensors supplier, with $139 million; Sensata Technologies, with $115 million; Analog Devices Inc. (ADI), with $95 million; and Panasonic Corp., with $85 million.
Both ADI and Panasonic gained market share with gyroscopes, thanks to their profitable contracts—with Continental AG and TRW Inc. in the case of ADI; and with Autoliv for the Ford Motor Co. in the case of Panasonic.
Source: iSuppli, USA.
Global shipments of automotive MEMS sensors are projected to reach 591.2 million units in 2010, up a resounding 17.8 percent from 502.0 million.
Such growth represents a welcome turnaround after a challenging 2009 for MEMS sensors. While early 2009 saw orders to sensor companies all but dry up because of the fallout of the economic recession, shipments picked up rapidly in the fourth quarter, exceeding even the high point reached in 2007—making for a wild, bumpy ride last year.
However, the newly strengthened market in 2010 marks the beginning of an upturn that will continue until at least the end of 2014, iSuppli data indicate. The figure presents iSuppli’s forecast for MEMS sensors from 2009 to 2014.
Source: iSuppli, USA.“The revitalized automotive MEMS market in 2010 is being driven by the exceptionally strong performance of MEMS pressure sensors, which are used in key applications to measure tire pressure and engine performance,” said Richard Dixon, senior analyst for MEMS and sensors at iSuppli. “According to reports from at least half of the sensor supply industry, shipments are running at three times the historic average, bolstered by a strong production pickup in passenger vehicles coupled with inventory replenishment.”
About half of the year’s requirement for MEMS pressure sensors was satisfied in the first four months alone of 2010, iSuppli estimates, with major Tier 2 companies now reporting inability to make and ship the sensors quickly enough, and with first-tier suppliers indicating a shortage of parts in many areas of the supply chain.
“As a result of these developments, MEMS suppliers are busy exploiting whatever advantage they enjoy at the moment, even though a healthy skepticism abounds on prospects facing the industry down the road and especially in 2011,” Dixon said. “And should sales continue at this level—with indicators so far not showing signs of the market slowing down—a potential overheating could ensue, raising the specter of a possible second slump later this year following the decline of 2009.”
Among the regions, North America will account for the largest share in the consumption of MEMS, making up 40 percent of the total in 2010. Europe is next, with about one-third share. China and Japan also show up strongly, each counted as a separate market of consumption. A fourth area—an agglomeration known as the “Rest of the World” (ROW) that includes South Korea, Russia and Latin America—is roughly on par with Japan but scores lower than China.
Mandates drive MEMS sensor growth
A number of factors will drive the growth of MEMS sensors in cars—projected to increase from an average of 8.12 per vehicle in 2009 to more than 11.5 by 2014.
Mandates continue to be the main market shaper, with electronic stability systems to become obligatory for vehicles in the United States by 2012 and in the European Union by 2014. Also to become mandatory in Europe by 2014 are tire pressure monitoring systems (TPMS).
The developments are expected to boost sales overall: ESC mandates will help propel the sales of gyroscopes, accelerometers and high-pressure sensors, while TPMS mandates will spur
MEMS pressure sensor shipments close to 137.9 million by 2014, up from just 42.9 million in 2009.
In the case of powertrain sensors, their use in pressure and flow measurements in the engine combustion control loop is increasingly driven by stringent regulations to reduce emissions. Alongside established markets for manifold air pressure and barometric air pressure management, emerging stop-start systems that turn the engine off at junctions will grow from about 1 million units to 13 million in five years, iSuppli figures show.
Sensor standouts
In the sensor supply chain, vertically integrated suppliers like Robert Bosch GmbH and Denso Corp. continued to dominate in 2009, pulling in $355 million and $203 million, respectively. Other major revenue earners included Freescale Semiconductor Inc., the foremost independent MEMS sensors supplier, with $139 million; Sensata Technologies, with $115 million; Analog Devices Inc. (ADI), with $95 million; and Panasonic Corp., with $85 million.
Both ADI and Panasonic gained market share with gyroscopes, thanks to their profitable contracts—with Continental AG and TRW Inc. in the case of ADI; and with Autoliv for the Ford Motor Co. in the case of Panasonic.
Source: iSuppli, USA.
Thursday, July 1, 2010
Global general purpose analog revenue gets boost from mixed signal
RENO, USA: Databeans projects the total general purpose analog revenue will reach well over $16 billion in 2010. This is a staggering 29 percent increase from 2009.
Backed by growth of data converters, which is the second fastest growing product category in general purpose analog. General purpose analog is projected to have a compound annual growth rate of 11 percent over the next five years.
Data converter revenue is projected to reach just under $3 billion in 2010. This is a 26 percent recovery from 2009. This is due to strong showings in the communications and industrial segments, where data converters are used prominently, as well as strong showings from the automotive segment.
Key application growth opportunities for data converters are automotive radar, smart grid data aquisition, digital power supplies for network equipment, SDR, PA linearization, and other wireless infrastructure applications. The communications sector is expected to overtake the industrial segment in terms of revenue this year. Databeans predicts that this segment will grow 30 percent from 2009 to just over $1 billion.
The majority of market share for data converters is held only by a few key players. Texas Instruments, Maxim Integrated Products, Linear Technology, and National Semiconductor control 32 percent of the data converter market combined.
Analog Devices, however, is the top market share winner, controlling 45 percent of the market. This is no surprise however; 40 percent of Analog Devices' total revenue comes from data converters.
Worldwide General Purpose Analog Revenue Forecast by Product Type
Databeans Estimates, June 2010.
Backed by growth of data converters, which is the second fastest growing product category in general purpose analog. General purpose analog is projected to have a compound annual growth rate of 11 percent over the next five years.
Data converter revenue is projected to reach just under $3 billion in 2010. This is a 26 percent recovery from 2009. This is due to strong showings in the communications and industrial segments, where data converters are used prominently, as well as strong showings from the automotive segment.
Key application growth opportunities for data converters are automotive radar, smart grid data aquisition, digital power supplies for network equipment, SDR, PA linearization, and other wireless infrastructure applications. The communications sector is expected to overtake the industrial segment in terms of revenue this year. Databeans predicts that this segment will grow 30 percent from 2009 to just over $1 billion.
The majority of market share for data converters is held only by a few key players. Texas Instruments, Maxim Integrated Products, Linear Technology, and National Semiconductor control 32 percent of the data converter market combined.
Analog Devices, however, is the top market share winner, controlling 45 percent of the market. This is no surprise however; 40 percent of Analog Devices' total revenue comes from data converters.
Worldwide General Purpose Analog Revenue Forecast by Product Type
Databeans Estimates, June 2010.
iWatt opens new design center in Shenzhen
LOS GATOS, USA & SHENZHEN, CHINA: iWatt Inc., a developer of energy-efficient digital power supply control integrated circuits (ICs) used in leading-edge power supplies, announced that on June 1 it opened a new design center in the Shenzhen Science Park in Shenzhen, China.
The new design center -- intended to support the growing number of Asian manufacturers designing solid-state lighting (SSL), mobile phone chargers, and network adapters -- provides enough space for iWatt to triple its field application engineer (FAE) support in Asia. The company has consolidated its two existing Shenzhen design teams in the new location, and plans to add 20 FAEs to the team throughout the course of 2010. Currently, 90 percent of iWatt’s customers are in Asia, particularly China, prompting the company’s expansion.
iWatt’s engineers in the US design the company’s ICs, and then its FAE teams work with customers worldwide to integrate the ICs into their specific applications. The new Chinese design center, outfitted with state-of-the-art equipment, is responsible for supporting iWatt’s local FAE teams based in China, Korea, Japan and Taiwan, and its distributors worldwide.
Asia is becoming a leading design center for light-emitting diode (LED) SSL, and is an already-established one for mobile phone chargers. iWatt’s traditional market, low-power (3 – 5W) AC-DC ICs for mobile phone chargers and high-power (up to 40W) ICs for network adapters, accounted for 90 percent of its sales in 2009.
With iWatt’s recent diversification to include AC-DC LED driver ICs for dimmable LEDs (November 2009), the company is positioned to tap into growing conservation initiatives worldwide to replace existing incandescent bulbs with more energy-efficient LEDs. More than 100 lighting companies use iWatt’s new LED driver ICs. iWatt estimates that its traditional market will account for about 70 percent of its sales in 2010, with new growth markets such as LED lighting and LCD televisions making up the other 30 percent.
Commenting on the company’s investment in China, iWatt’s president and CEO, Ron Edgerton, said: “We want our customers to tell others that iWatt provides the world’s best technical support. That means supporting customers where they are. With design work for high growth markets such as LED lighting happening in Asia, that’s where we need to be.”
iWatt’s patented Adaptive Digital Control technology uses digital algorithms to replace traditional analog control solutions. This technology delivers size, cost and efficiency improvements, and lowers standby power to previously unattainable levels. It helps manufacturers reduce the costs of their devices and the amount of energy they consume.
“We have been working with iWatt for more than three years, using their innovative digital control technology and have been very successful in expanding our business,” said Ha, president and CEO of electrical equipment manufacturer Haem Co. Ltd, based in Korea. “In 2010, we designed the iWatt iW1696 IC into our new small size travel adaptor and this will enable us to provide a higher quality, best-in-class performance product for our end customers.”
The new design center -- intended to support the growing number of Asian manufacturers designing solid-state lighting (SSL), mobile phone chargers, and network adapters -- provides enough space for iWatt to triple its field application engineer (FAE) support in Asia. The company has consolidated its two existing Shenzhen design teams in the new location, and plans to add 20 FAEs to the team throughout the course of 2010. Currently, 90 percent of iWatt’s customers are in Asia, particularly China, prompting the company’s expansion.
iWatt’s engineers in the US design the company’s ICs, and then its FAE teams work with customers worldwide to integrate the ICs into their specific applications. The new Chinese design center, outfitted with state-of-the-art equipment, is responsible for supporting iWatt’s local FAE teams based in China, Korea, Japan and Taiwan, and its distributors worldwide.
Asia is becoming a leading design center for light-emitting diode (LED) SSL, and is an already-established one for mobile phone chargers. iWatt’s traditional market, low-power (3 – 5W) AC-DC ICs for mobile phone chargers and high-power (up to 40W) ICs for network adapters, accounted for 90 percent of its sales in 2009.
With iWatt’s recent diversification to include AC-DC LED driver ICs for dimmable LEDs (November 2009), the company is positioned to tap into growing conservation initiatives worldwide to replace existing incandescent bulbs with more energy-efficient LEDs. More than 100 lighting companies use iWatt’s new LED driver ICs. iWatt estimates that its traditional market will account for about 70 percent of its sales in 2010, with new growth markets such as LED lighting and LCD televisions making up the other 30 percent.
Commenting on the company’s investment in China, iWatt’s president and CEO, Ron Edgerton, said: “We want our customers to tell others that iWatt provides the world’s best technical support. That means supporting customers where they are. With design work for high growth markets such as LED lighting happening in Asia, that’s where we need to be.”
iWatt’s patented Adaptive Digital Control technology uses digital algorithms to replace traditional analog control solutions. This technology delivers size, cost and efficiency improvements, and lowers standby power to previously unattainable levels. It helps manufacturers reduce the costs of their devices and the amount of energy they consume.
“We have been working with iWatt for more than three years, using their innovative digital control technology and have been very successful in expanding our business,” said Ha, president and CEO of electrical equipment manufacturer Haem Co. Ltd, based in Korea. “In 2010, we designed the iWatt iW1696 IC into our new small size travel adaptor and this will enable us to provide a higher quality, best-in-class performance product for our end customers.”
Ramtron secures $6 million term loan from Silicon Valley bank
COLORADO SPRINGS, USA: US semiconductor maker Ramtron International Corp., a leading developer and supplier of ferroelectric-based low-power memory and integrated semiconductor products, has secured a $6.0 million loan from Silicon Valley Bank to strengthen its working capital position as the company makes the remaining capital and development investments in its current IBM foundry project.
The four-year term loan has a fixed rate of 6.5% and is supplemental to the company’s existing $6 million line of credit. As of July 1, 2010, the company does not have an outstanding balance on the line of credit.
“To-date, we have funded our IBM foundry project with a combination of capital lease arrangements and our own cash,” said Bill Staunton, Ramtron’s CEO. “This new term loan from Silicon Valley Bank will allow us to strengthen our working capital under favorable terms and enhance our flexibility as we make the remaining planned investments in our current foundry project with IBM.”
The four-year term loan has a fixed rate of 6.5% and is supplemental to the company’s existing $6 million line of credit. As of July 1, 2010, the company does not have an outstanding balance on the line of credit.
“To-date, we have funded our IBM foundry project with a combination of capital lease arrangements and our own cash,” said Bill Staunton, Ramtron’s CEO. “This new term loan from Silicon Valley Bank will allow us to strengthen our working capital under favorable terms and enhance our flexibility as we make the remaining planned investments in our current foundry project with IBM.”
IR launches new online design tool
EL SEGUNDO, USA: International Rectifier, (IR) has announced the availability of a new online design tool that enables electrical and thermal simulation and design optimization for the SupIRBuck family of integrated point-of-load voltage regulators.
The user friendly, interactive, web-based tool available at mypower.irf.com/SupIRBuck enables the rapid selection and simulation of selected SupIRBuck products. Based on a designer’s given input and output parameters, the SupIRBuck online tool selects suitable devices for a given application.
Once basic requirements are entered, the tool allows the user to capture schematics, create a reference design along with associated Bill of Materials (BOM), view waveforms, and perform complex thermal and application analysis quickly and easily to dramatically accelerate development time.
“In addition to continuously improving and expanding the SupIRBuck product line in accordance and ahead of market trends and customer needs, we are committed to providing best-in-class design support to our rapidly expanding customer base. The launch of the new online design tool will further establish SupIRBuck as the primary choice for performance, size and cost optimized power management designs for a broad range of embedded POL applications,” said Goran Stojcic, executive director, POL group, IR’s Enterprise Power Business Unit.
The tool is designed and engineered to assist a variety of designers, from power experts to digital specialists with limited exposure to analog design. SupIRbuck devices featured in the tool cover the initial load currents up to 12A, up to 21V input voltage and output voltages as low as 0.7V, and are supported by standard and customizable demo kits, reference designs, datasheets, and electrical, mechanical and application notes – all available at International Rectifier’s website.
In addition, the featured devices are also supported by readily available samples and some of the shortest lead times in the industry.
IR’s SupIRBuck voltage regulators integrate IR’s high performance synchronous buck control ICs and benchmark HEXFET trench technology MOSFETs in a compact 5mm by 6mm Power QFN package, shrinking the silicon footprint compared to discrete solutions, and offering between 8 to 10 percent higher full-load efficiency than competing monolithic ICs.
The user friendly, interactive, web-based tool available at mypower.irf.com/SupIRBuck enables the rapid selection and simulation of selected SupIRBuck products. Based on a designer’s given input and output parameters, the SupIRBuck online tool selects suitable devices for a given application.
Once basic requirements are entered, the tool allows the user to capture schematics, create a reference design along with associated Bill of Materials (BOM), view waveforms, and perform complex thermal and application analysis quickly and easily to dramatically accelerate development time.
“In addition to continuously improving and expanding the SupIRBuck product line in accordance and ahead of market trends and customer needs, we are committed to providing best-in-class design support to our rapidly expanding customer base. The launch of the new online design tool will further establish SupIRBuck as the primary choice for performance, size and cost optimized power management designs for a broad range of embedded POL applications,” said Goran Stojcic, executive director, POL group, IR’s Enterprise Power Business Unit.
The tool is designed and engineered to assist a variety of designers, from power experts to digital specialists with limited exposure to analog design. SupIRbuck devices featured in the tool cover the initial load currents up to 12A, up to 21V input voltage and output voltages as low as 0.7V, and are supported by standard and customizable demo kits, reference designs, datasheets, and electrical, mechanical and application notes – all available at International Rectifier’s website.
In addition, the featured devices are also supported by readily available samples and some of the shortest lead times in the industry.
IR’s SupIRBuck voltage regulators integrate IR’s high performance synchronous buck control ICs and benchmark HEXFET trench technology MOSFETs in a compact 5mm by 6mm Power QFN package, shrinking the silicon footprint compared to discrete solutions, and offering between 8 to 10 percent higher full-load efficiency than competing monolithic ICs.
Developers to harness power of new Intel processors, reduce time to market with GE's AXISLib-x86
CHARLOTTESVILLE, USA: GE Intelligent Platforms has announced the AXISLib-X86 Advanced Multiprocessor Integrated Software module.
A powerful suite of optimized signal processing and vector math libraries, it is designed to maximize productivity, reduce development cost, speed time to market and minimize program risk for customers working with GE’s latest hardware platforms based on the Intel architecture.
The innovative technologies at the heart of AXISLib-X86 can deliver a sustainable competitive advantage to prime contractors, OEMs and systems integrators using it to develop demanding applications including sensor- and signal processing, radar, sonar, image processing and signals intelligence for air-, land- and sea-based deployment. Customers can deploy AXISLib VSIPL and RSPL API libraries on the full range of GE single board computers and multiprocessors based on Freescale’s Power Architecture and Intel multicore processors.
“Powerful, reliable, flexible hardware platforms are vital in the development and deployment of sophisticated embedded computing applications – but they are only part of the story,” said Michael Stern, Product Manager at GE Intelligent Platforms. “AXISLib-X86 enables customers to rapidly and cost-effectively harness the potential of the latest Intel architecture platforms, creating efficient DSP applications for rugged, deployed mission computing.”
AXISLib is one of the three primary elements of GE’s AXIS Advanced Multiprocessor Integrated Software development environment. The other two key elements are AXISView, an integrated graphical user interface providing task level programming for algorithm development and system visualization, and AXISFlow, which provides a high performance interprocessor communication library for high throughput, low latency data movement across multiple fabrics scaling from one to many CPU nodes across a single board, multiple boards in a single chassis and multiple system chassis. A trial version of AXIS can be downloaded here.
AXISLib-X86, which is optimized for the Intel SSE SIMD engine and which supports multicore and multithreaded symmetrical multiprocessing (SMP) in order to extract the maximum possible performance from current and future Intel-based single board computers, is a set of signal -and vector processing libraries providing over 600 high performance digital signal processing and vector mathematical functions.
It is designed to support the most advanced real-time embedded signal processing applications and can operate in a standalone mode or as an integral software module within the AXIS Advanced Multiprocessor Integrated Software environment.
AXISLib-X86 also features standard APIs for code portability, providing not only support for current platforms but also for future technology upgrades. Libraries are provided for development mode with error checking, and for production mode for maximum performance.
A powerful suite of optimized signal processing and vector math libraries, it is designed to maximize productivity, reduce development cost, speed time to market and minimize program risk for customers working with GE’s latest hardware platforms based on the Intel architecture.
The innovative technologies at the heart of AXISLib-X86 can deliver a sustainable competitive advantage to prime contractors, OEMs and systems integrators using it to develop demanding applications including sensor- and signal processing, radar, sonar, image processing and signals intelligence for air-, land- and sea-based deployment. Customers can deploy AXISLib VSIPL and RSPL API libraries on the full range of GE single board computers and multiprocessors based on Freescale’s Power Architecture and Intel multicore processors.
“Powerful, reliable, flexible hardware platforms are vital in the development and deployment of sophisticated embedded computing applications – but they are only part of the story,” said Michael Stern, Product Manager at GE Intelligent Platforms. “AXISLib-X86 enables customers to rapidly and cost-effectively harness the potential of the latest Intel architecture platforms, creating efficient DSP applications for rugged, deployed mission computing.”
AXISLib is one of the three primary elements of GE’s AXIS Advanced Multiprocessor Integrated Software development environment. The other two key elements are AXISView, an integrated graphical user interface providing task level programming for algorithm development and system visualization, and AXISFlow, which provides a high performance interprocessor communication library for high throughput, low latency data movement across multiple fabrics scaling from one to many CPU nodes across a single board, multiple boards in a single chassis and multiple system chassis. A trial version of AXIS can be downloaded here.
AXISLib-X86, which is optimized for the Intel SSE SIMD engine and which supports multicore and multithreaded symmetrical multiprocessing (SMP) in order to extract the maximum possible performance from current and future Intel-based single board computers, is a set of signal -and vector processing libraries providing over 600 high performance digital signal processing and vector mathematical functions.
It is designed to support the most advanced real-time embedded signal processing applications and can operate in a standalone mode or as an integral software module within the AXIS Advanced Multiprocessor Integrated Software environment.
AXISLib-X86 also features standard APIs for code portability, providing not only support for current platforms but also for future technology upgrades. Libraries are provided for development mode with error checking, and for production mode for maximum performance.
Intel Labs aims to re-invent how people experience computing
MOUNTAIN VIEW, USA: At the Intel Labs’ annual Research at Intel media event, Intel Corp. CTO, Justin Rattner, announced a new research division, called Interaction and Experience Research (IXR), that is focused on defining new user experiences and new computing platforms. The innovations coming out of the labs are expected to help re-imagine how we will all experience computing in the future.
Enabled by Moore’s Law and the performance advancements now available across a continuum of computing devices including the traditional PC, the company’s engagement and experience with technology, according to Rattner, will become much more personal and social through individual user contexts informed by sensors, augmented by cloud intelligence, and driven by more natural interfaces such as touch, gesture and voice.
“Better technology isn’t enough these days,” said Rattner. “What the individual values today is a deeply personal, information experience. When I look ahead, this is the biggest change in computing I see coming. At Intel, we’ve been building up our capabilities in the user experience and interaction areas for over a decade.
“We’ve recently assembled an outstanding team of researchers consisting of both user interface technologists and social scientists to create the next generation of user experiences. We’ve learned, for example, that the television experience isn’t the same thing as the Web experience, even though more and more TV will be delivered via the Internet. Browsing the Web at 10 feet is an experience few people relish, but television experienced via the Internet is a huge step beyond broadcast.”
Rattner said the new division will be led by Intel Fellow Genevieve Bell, who has been one of the leading user-centered design advocates at Intel for more than a decade.
“Intel now touches more things in people’s lives than just the PC,” said Bell. “Intel chips and the Internet are now in televisions, set-tops, handhelds, automobiles, signage and more. IXR will build on 15 years of research into the ways in which people use, re-use and resist new information and communication technologies. Social science, design and human-computer interaction researchers will continue that mission – asking questions about what people will value, what will fit into their lives and what they love about the things they already have. These insights will be married with a strong focus on technological research into the next generation of user interfaces, user interactions and changes in media content and consumption patterns.”
Intel Labs already has a strong focus on the next generation of user experience technologies. Current work around context and location has yielded a range of insights and technological possibilities. For example, the idea that devices will understand their surroundings, communicate with each other and change behavior or take actions based on the user’s environment.
One particular project on display at the event, coined SENS, represents a new wave of social networking that provides the ability to monitor real-time activities and display these activities live and direct to networked friends and family. The research shows how context awareness from sensors onboard a device can translate into completely new user experiences such as “Shadow Avatar” and “Socially Augmented Reality” that build on new trends in sharing of presence and media.
Researchers also demonstrated an experimental, low-cost energy sensor, which could help change the way consumers manage personal energy consumption at home. When coupled with a home information display, it would monitor usage, recommend solutions for more efficiency and reward success.
The sensor needs only to be plugged into the house wiring to instantaneously measure and wirelessly report the power consumption of each electrical load in the home, providing data to analyze energy usage of devices and appliances throughout. This technology forms the heart of a personal energy management system that could lead to valuable changes in behavior and save staggering amounts of energy.
Other technology shown at the event changes a user’s engagement with technology. For example, research was shown that use projection and 3-D cameras to light up nearby surfaces displaying buttons, windows, images and movies onto work surfaces, tabletops or other flat spaces. The video and vision system is able to recognize hand gestures and objects, turning everyday surfaces such as a kitchen counter, coffee table or classroom desk into an interactive portal to the device and the Internet.
Also demonstrated was a more futuristic example, a computer that could read a user’s thoughts, replacing the need for typing altogether.
Enabled by Moore’s Law and the performance advancements now available across a continuum of computing devices including the traditional PC, the company’s engagement and experience with technology, according to Rattner, will become much more personal and social through individual user contexts informed by sensors, augmented by cloud intelligence, and driven by more natural interfaces such as touch, gesture and voice.
“Better technology isn’t enough these days,” said Rattner. “What the individual values today is a deeply personal, information experience. When I look ahead, this is the biggest change in computing I see coming. At Intel, we’ve been building up our capabilities in the user experience and interaction areas for over a decade.
“We’ve recently assembled an outstanding team of researchers consisting of both user interface technologists and social scientists to create the next generation of user experiences. We’ve learned, for example, that the television experience isn’t the same thing as the Web experience, even though more and more TV will be delivered via the Internet. Browsing the Web at 10 feet is an experience few people relish, but television experienced via the Internet is a huge step beyond broadcast.”
Rattner said the new division will be led by Intel Fellow Genevieve Bell, who has been one of the leading user-centered design advocates at Intel for more than a decade.
“Intel now touches more things in people’s lives than just the PC,” said Bell. “Intel chips and the Internet are now in televisions, set-tops, handhelds, automobiles, signage and more. IXR will build on 15 years of research into the ways in which people use, re-use and resist new information and communication technologies. Social science, design and human-computer interaction researchers will continue that mission – asking questions about what people will value, what will fit into their lives and what they love about the things they already have. These insights will be married with a strong focus on technological research into the next generation of user interfaces, user interactions and changes in media content and consumption patterns.”
Intel Labs already has a strong focus on the next generation of user experience technologies. Current work around context and location has yielded a range of insights and technological possibilities. For example, the idea that devices will understand their surroundings, communicate with each other and change behavior or take actions based on the user’s environment.
One particular project on display at the event, coined SENS, represents a new wave of social networking that provides the ability to monitor real-time activities and display these activities live and direct to networked friends and family. The research shows how context awareness from sensors onboard a device can translate into completely new user experiences such as “Shadow Avatar” and “Socially Augmented Reality” that build on new trends in sharing of presence and media.
Researchers also demonstrated an experimental, low-cost energy sensor, which could help change the way consumers manage personal energy consumption at home. When coupled with a home information display, it would monitor usage, recommend solutions for more efficiency and reward success.
The sensor needs only to be plugged into the house wiring to instantaneously measure and wirelessly report the power consumption of each electrical load in the home, providing data to analyze energy usage of devices and appliances throughout. This technology forms the heart of a personal energy management system that could lead to valuable changes in behavior and save staggering amounts of energy.
Other technology shown at the event changes a user’s engagement with technology. For example, research was shown that use projection and 3-D cameras to light up nearby surfaces displaying buttons, windows, images and movies onto work surfaces, tabletops or other flat spaces. The video and vision system is able to recognize hand gestures and objects, turning everyday surfaces such as a kitchen counter, coffee table or classroom desk into an interactive portal to the device and the Internet.
Also demonstrated was a more futuristic example, a computer that could read a user’s thoughts, replacing the need for typing altogether.
Micron intros third generation reduced latency memory
BOISE, USA: Micron Technology Inc. has introduced its third-generation reduced latency DRAM (RLDRAM 3 memory), a high-bandwidth memory technology that enables a more efficient transfer of information across the network.
The proliferation of video content, mobile applications and cloud computing has created the need for a more effective network infrastructure that can keep pace with the amount of data being moved online. As compared with previous generations, Micron's new RLDRAM 3 memory offers a further increase in density and speed, while minimizing latency and reducing power consumption for higher performing networking applications.
"Micron's RLDRAM 3 memory meets the growing need for technology that can support the increases to network traffic as we watch Internet content consumption continue to grow," said Robert Feurle, vice president of DRAM marketing for Micron.
Micron is also continuing to provide the highest levels of support for its current generation RLDRAM 2 technology and is planning long-term production of the product. Additionally, Micron is transitioning its RLDRAM 2 product portfolio to the more advanced 50nm process technology, boosting system performance and lowering power consumption.
Features of RLDRAM 3 memory
The primary features and benefits of Micron's new RLDRAM 3 memory include:
Low latency: Sub 10-nanoseconds tRC, offering the industry's lowest random access latency.
Increased density: 576Mb-1Gb, giving flexibility for many designs.
Faster speeds: Reaches 2133Mb/s, providing faster access to data.
Greater energy efficiency: Familiar 1.2V IO and 1.35V core, for more power savings.
Building an RLDRAM ecosystem
Micron maintains a broad ecosystem of partners that have validated its RLDRAM memory solutions for ease of integration into networking equipment. Micron's collaboration with its extensive network of partners and enablers provides customers with tailored-made solutions that optimize networking system performance. As part of this valued ecosystem, Micron is currently working with leading FPGA companies including Altera Corporation and Xilinx to design RLDRAM 3 memory into their family of products.
"Altera's 28nm Stratix V FPGAs include new, hardened datapaths that enable high-performance and low-latency interfaces to Micron's memories," said Luanne Schirrmeister, senior director of component product marketing at Altera.
"The release of RLDRAM 3 memory allows us to offer memory bandwidth as high as 1600 Mbps, the highest in the industry, at dramatically lower latency. Enabled by Micron's new memory offering and Altera's new memory interface architecture, this technical achievement is one of many pinnacles in our multi-year technical partnership with Micron."
"Xilinx 7 series FPGAs are enabling the most advanced networking equipment to keep pace with the insatiable need for bandwidth worldwide," said Rina Raman, Senior Director, Applications and Technical Marketing at Xilinx. "As a result of our work with Micron to support their new RLDRAM 3 technology, we are enabling our customers to develop networking platforms that meet the most rigorous infrastructure demands."
Micron is expected to begin sampling its RLDRAM 3 device in the first half of 2011 and is currently working with customers and enablers for their design considerations of RLDRAM 3 memory. Additionally, Micron expects to begin sampling 50nm RLDRAM 2 products in the fourth quarter of 2010.
The proliferation of video content, mobile applications and cloud computing has created the need for a more effective network infrastructure that can keep pace with the amount of data being moved online. As compared with previous generations, Micron's new RLDRAM 3 memory offers a further increase in density and speed, while minimizing latency and reducing power consumption for higher performing networking applications.
"Micron's RLDRAM 3 memory meets the growing need for technology that can support the increases to network traffic as we watch Internet content consumption continue to grow," said Robert Feurle, vice president of DRAM marketing for Micron.
Micron is also continuing to provide the highest levels of support for its current generation RLDRAM 2 technology and is planning long-term production of the product. Additionally, Micron is transitioning its RLDRAM 2 product portfolio to the more advanced 50nm process technology, boosting system performance and lowering power consumption.
Features of RLDRAM 3 memory
The primary features and benefits of Micron's new RLDRAM 3 memory include:
Low latency: Sub 10-nanoseconds tRC, offering the industry's lowest random access latency.
Increased density: 576Mb-1Gb, giving flexibility for many designs.
Faster speeds: Reaches 2133Mb/s, providing faster access to data.
Greater energy efficiency: Familiar 1.2V IO and 1.35V core, for more power savings.
Building an RLDRAM ecosystem
Micron maintains a broad ecosystem of partners that have validated its RLDRAM memory solutions for ease of integration into networking equipment. Micron's collaboration with its extensive network of partners and enablers provides customers with tailored-made solutions that optimize networking system performance. As part of this valued ecosystem, Micron is currently working with leading FPGA companies including Altera Corporation and Xilinx to design RLDRAM 3 memory into their family of products.
"Altera's 28nm Stratix V FPGAs include new, hardened datapaths that enable high-performance and low-latency interfaces to Micron's memories," said Luanne Schirrmeister, senior director of component product marketing at Altera.
"The release of RLDRAM 3 memory allows us to offer memory bandwidth as high as 1600 Mbps, the highest in the industry, at dramatically lower latency. Enabled by Micron's new memory offering and Altera's new memory interface architecture, this technical achievement is one of many pinnacles in our multi-year technical partnership with Micron."
"Xilinx 7 series FPGAs are enabling the most advanced networking equipment to keep pace with the insatiable need for bandwidth worldwide," said Rina Raman, Senior Director, Applications and Technical Marketing at Xilinx. "As a result of our work with Micron to support their new RLDRAM 3 technology, we are enabling our customers to develop networking platforms that meet the most rigorous infrastructure demands."
Micron is expected to begin sampling its RLDRAM 3 device in the first half of 2011 and is currently working with customers and enablers for their design considerations of RLDRAM 3 memory. Additionally, Micron expects to begin sampling 50nm RLDRAM 2 products in the fourth quarter of 2010.
SiS adopts Cadence technologies for advanced SoC designs
TAIPEI, TAIWAN: Cadence Design Systems Inc. announced that Silicon Integrated System (SiS), a worldwide leader in logic products, has adopted Cadence solutions for its PC peripheral and multimedia system on chip (SoC) designs. SiS chose Cadence to improve automation and further optimize its product development flow in order to boost productivity and manage profitability.
Cadence now provides SiS with a complete digital design-to-signoff methodology for exploring new power-saving strategies and accommodating unique SoC designs. The technologies and methodologies adopted include a full digital flow from logic design to implementation, custom/analog flow, verification flow, and power-saving, power-aware automation capabilities across the entire design.
To meet power-saving requirements for the DTV and multimedia SoC chip design, SiS used Encounter Conformal Low Power for advanced low-power verification, Encounter Digial Implementation System for full-chip implementation, Encounter Power System for accelerating complete power optimization, Encounter RTL Compiler for production-proven synthesis, and Encounter Timing System for high-quality timing analysis.
Additionally, this new broader adoption includes Virtuoso Accelerated Parallel Simulator—part of the Virtuoso Multi-Mode Simulation suite of simulators—to provide fast, and accurate simulation for complex analog, RF and mixed-signal designs.
SiS was particularly impressed with the broad Cadence verification IP portfolio, which includes verification IP for USB-based designs, including USB 3.0 with Compliance Management System, a metric-based approach that uniquely automates protocol compliance verification. SiS adopted the verification IP as an integrated element of the overall Cadence metric-driven verification methodology and technology, aimed at providing cost-effective, zero-defect verification closure.
“As a high-quality DTVand multimedia SoC chip designer, SiS not only provides better designs to customers at the shortest lead time, but also offers outstanding service and support,” said Nelson Lee, Marketing senior director at SiS.
“With Cadence we anticipate greater productivity through enhanced efficiency and fewer iterations, as well as an increased focus on profitability through faster time to market. This relationship will continue to be a crucial element in achieving our performance goals of high-quality technical innovation and customer service.”
“Cadence provides comprehensive solutions that enhance productivity and profitability for our customers who need to deliver high-quality products under shrinking schedule pressures,” said Willis Chang, Country Manager of Taiwan at Cadence. “We look forward to working with SiS as they continue to improve their development process and achieve breakthrough results in design quality and product competitiveness.”
Cadence now provides SiS with a complete digital design-to-signoff methodology for exploring new power-saving strategies and accommodating unique SoC designs. The technologies and methodologies adopted include a full digital flow from logic design to implementation, custom/analog flow, verification flow, and power-saving, power-aware automation capabilities across the entire design.
To meet power-saving requirements for the DTV and multimedia SoC chip design, SiS used Encounter Conformal Low Power for advanced low-power verification, Encounter Digial Implementation System for full-chip implementation, Encounter Power System for accelerating complete power optimization, Encounter RTL Compiler for production-proven synthesis, and Encounter Timing System for high-quality timing analysis.
Additionally, this new broader adoption includes Virtuoso Accelerated Parallel Simulator—part of the Virtuoso Multi-Mode Simulation suite of simulators—to provide fast, and accurate simulation for complex analog, RF and mixed-signal designs.
SiS was particularly impressed with the broad Cadence verification IP portfolio, which includes verification IP for USB-based designs, including USB 3.0 with Compliance Management System, a metric-based approach that uniquely automates protocol compliance verification. SiS adopted the verification IP as an integrated element of the overall Cadence metric-driven verification methodology and technology, aimed at providing cost-effective, zero-defect verification closure.
“As a high-quality DTVand multimedia SoC chip designer, SiS not only provides better designs to customers at the shortest lead time, but also offers outstanding service and support,” said Nelson Lee, Marketing senior director at SiS.
“With Cadence we anticipate greater productivity through enhanced efficiency and fewer iterations, as well as an increased focus on profitability through faster time to market. This relationship will continue to be a crucial element in achieving our performance goals of high-quality technical innovation and customer service.”
“Cadence provides comprehensive solutions that enhance productivity and profitability for our customers who need to deliver high-quality products under shrinking schedule pressures,” said Willis Chang, Country Manager of Taiwan at Cadence. “We look forward to working with SiS as they continue to improve their development process and achieve breakthrough results in design quality and product competitiveness.”
Silicon Labs launches industry’s lowest power touch-sense MCUs
AUSTIN, USA: Expanding its ultra-low-power F9xx MCU family, Silicon Laboratories Inc., a leader in high-performance, analog-intensive, mixed-signal ICs, today introduced the industry’s lowest power capacitive touch-sense microcontrollers (MCUs) delivering wake-on-touch power consumption below one microamp.
The latest additions to Silicon Labs’ C8051F9xx family include F99x MCUs with integrated touch-sense technology for human interface applications and F98x MCUs targeting power- and cost-sensitive applications such as home automation, smart meters, lighting control, security systems, games and toys.
Like other members of the F9xx MCU family, Silicon Labs’ new ultra-low-power F99x and F98x MCUs offer the industry’s lowest power consumption in active mode, sleep mode and deep sleep mode.
In addition to consuming the lowest current per MHz, a common industry specification, the new MCUs contain an integrated low drop-out (LDO) regulator that keeps the current constant at 150 microamps per MHz over the entire operating range of 1.8 to 3.6 V. The on-chip LDO regulator helps reduce the MCU’s drain on the battery by 50 percent compared to competing products, which extends battery life and makes the ultra-low-power F99x and F98x MCUs ideal for battery-powered applications.
“With the introduction of our latest ultra-low-power MCUs, we’ve expanded our industry-leading F9xx family to provide additional feature set and memory size options to meet our customers’ application needs,” said Mark Thompson, vice president of Embedded Mixed-Signal products at Silicon Labs. “As the first IC supplier to achieve sub-microamp wake-on-touch power consumption for touch-sense MCUs, we continue to push the boundaries of extreme power efficiency through mixed-signal innovation.”
The new F99x touch-sense MCUs, a part of Silicon Labs’ QuickSense family of human interface devices, combine ultra-low-power capabilities with fast, accurate capacitive sensing technology to address the rapidly growing touch-sensing market.
The F99x devices feature a patent-pending, high-resolution capacitance-to-digital converter (CDC) with a 40 microsecond acquisition time, enabling the industry’s fastest capacitive touch-sense capability. The CDC offers superior noise immunity for reliable performance in challenging conditions and configurations such as thick laminate overlays, electrical noise or variances in circuit board manufacturing.
Available with up to 14 capacitive sensing inputs, the F99x MCUs support sophisticated and highly responsive touch-sense functions to replace traditional mechanical buttons, sliders and wheels.
By combining the F99x ultra-low-power MCUs with Silicon Labs’ Si11xx QuickSense infrared and ambient light sensors, system designers can develop innovative “touchless” proximity sensing interfaces. These touchless interfaces enable users to control and interact with end products through simple, intuitive gestures, in addition to using direct capacitive touch-sense control.
The new F99x and F98x MCUs integrate a 25 MHz pipelined 8051-compatible core, a precision oscillator, a 12-bit analog-to-digital converter (ADC), a temperature sensor, a voltage reference and four timers. The new low-power MCUs also add 2, 4 and 8 kB flash options to the F9xx family, which offers a broad range of footprint- and software-compatible ultra-low-power MCUs scaling up to 64 kB of flash.
For added board design flexibility, the F99x and F98x MCUs are available in standard 24-pin QFN and 24-pin QSOP packages as well as a new, space-saving 20-pin 3 mm x 3 mm QFN package option that’s ideal for space-constrained applications.
Samples of the new F9xx MCUs are available now with production quantities planned for Q3. Product pricing in 10,000-unit quantities begins at $0.85.
The new F99x and F98x MCUs are supported by the C8051F996DK development kit (available for $99), the ToolStick990DC daughtercard (available for $9.90) and ToolStick programming adapters (priced at $69 USD each) to support the three available package options. The F990SliderEK capacitive touch slider evaluation kit (available for $29) demonstrates the low-power and robust touch-sense capabilities of the F99x MCUs.
The latest additions to Silicon Labs’ C8051F9xx family include F99x MCUs with integrated touch-sense technology for human interface applications and F98x MCUs targeting power- and cost-sensitive applications such as home automation, smart meters, lighting control, security systems, games and toys.
Like other members of the F9xx MCU family, Silicon Labs’ new ultra-low-power F99x and F98x MCUs offer the industry’s lowest power consumption in active mode, sleep mode and deep sleep mode.
In addition to consuming the lowest current per MHz, a common industry specification, the new MCUs contain an integrated low drop-out (LDO) regulator that keeps the current constant at 150 microamps per MHz over the entire operating range of 1.8 to 3.6 V. The on-chip LDO regulator helps reduce the MCU’s drain on the battery by 50 percent compared to competing products, which extends battery life and makes the ultra-low-power F99x and F98x MCUs ideal for battery-powered applications.
“With the introduction of our latest ultra-low-power MCUs, we’ve expanded our industry-leading F9xx family to provide additional feature set and memory size options to meet our customers’ application needs,” said Mark Thompson, vice president of Embedded Mixed-Signal products at Silicon Labs. “As the first IC supplier to achieve sub-microamp wake-on-touch power consumption for touch-sense MCUs, we continue to push the boundaries of extreme power efficiency through mixed-signal innovation.”
The new F99x touch-sense MCUs, a part of Silicon Labs’ QuickSense family of human interface devices, combine ultra-low-power capabilities with fast, accurate capacitive sensing technology to address the rapidly growing touch-sensing market.
The F99x devices feature a patent-pending, high-resolution capacitance-to-digital converter (CDC) with a 40 microsecond acquisition time, enabling the industry’s fastest capacitive touch-sense capability. The CDC offers superior noise immunity for reliable performance in challenging conditions and configurations such as thick laminate overlays, electrical noise or variances in circuit board manufacturing.
Available with up to 14 capacitive sensing inputs, the F99x MCUs support sophisticated and highly responsive touch-sense functions to replace traditional mechanical buttons, sliders and wheels.
By combining the F99x ultra-low-power MCUs with Silicon Labs’ Si11xx QuickSense infrared and ambient light sensors, system designers can develop innovative “touchless” proximity sensing interfaces. These touchless interfaces enable users to control and interact with end products through simple, intuitive gestures, in addition to using direct capacitive touch-sense control.
The new F99x and F98x MCUs integrate a 25 MHz pipelined 8051-compatible core, a precision oscillator, a 12-bit analog-to-digital converter (ADC), a temperature sensor, a voltage reference and four timers. The new low-power MCUs also add 2, 4 and 8 kB flash options to the F9xx family, which offers a broad range of footprint- and software-compatible ultra-low-power MCUs scaling up to 64 kB of flash.
For added board design flexibility, the F99x and F98x MCUs are available in standard 24-pin QFN and 24-pin QSOP packages as well as a new, space-saving 20-pin 3 mm x 3 mm QFN package option that’s ideal for space-constrained applications.
Samples of the new F9xx MCUs are available now with production quantities planned for Q3. Product pricing in 10,000-unit quantities begins at $0.85.
The new F99x and F98x MCUs are supported by the C8051F996DK development kit (available for $99), the ToolStick990DC daughtercard (available for $9.90) and ToolStick programming adapters (priced at $69 USD each) to support the three available package options. The F990SliderEK capacitive touch slider evaluation kit (available for $29) demonstrates the low-power and robust touch-sense capabilities of the F99x MCUs.
European expert panel proposes new analog IC design methodology to counter analog bottleneck
SAN JOSE, USA: Global Semiconductor Alliance (GSA), the voice of the global semiconductor industry, recently hosted a panel of European analogue IC design experts at the GSA & IET International Semiconductor Forum in London on 19 May. The discussion led to a possible solution to the analogue IC design bottleneck.
The Global Semiconductor Alliance together with the UK’s Institution of Engineering & Technology joined forces to highlight and discuss European trends in semiconductor development. This year’s program focused on leveraging and maximising European expertise in analogue/mixed-signal, wireless, low-power applications and quality/reliability to access emerging markets for silicon growth including smart cards, power electronics and home networking.
"The panel addressed the problems facing today's analogue designers, including technology and design issues, which are the cause of the analogue bottleneck," explains panel chair Paul Double, GSA’s European chair of the Analogue/Mixed-Signal Interest Group and founder and managing director of EDA Solutions Limited. "The discussion resulted in a proposed new methodology for IC design which leads to faster layout, allowing early analysis of the extracted design," added Double.
Market research indicates that although analogue circuitry comprises only 20 percent of the area in today’s modern mixed-signal devices, it is likely to account for some 80 percent of yield loss.
Due to the complexity of the design and dramatic increase in process related design rules to be considered, mixed-signal design, and especially full custom design, is leading to more errors and performance related problems. Manual design and layout is no longer viable, yet automation in the analogue design world remains difficult, and is often an anathema to analogue designers. This quandary is often referred to as the analogue bottleneck.
The findings of the panel discussion suggested a new approach to analogue design to help offset this bottleneck. Because analogue layout at the deeper process nodes is heavily dependent on processing effects, it often does not make sense to perform simulation before the layout stage as in a traditional IC design flow.
The solution proposed by the panel to achieve faster layout is to allow early analysis of the extracted design. The flow from schematic to layout has to be accelerated, with simulation only after parasitic extraction. This requires a change in CAD methodology to accelerate the manual layout process.
The existing approach is currently: circuit entry in schematic form, simulation, adjust the schematic, re-simulate, repeat until satisfied with simulation and then on to layout and finally, verification of layout. The new approach proposed by the panel is: schematic, directly to layout, verification including extraction of layout complete with parasitics, simulation, then repeat the entire process until simulations are satisfactory.
To support this new methodology, IC design software must feature robust device layout generators, correct by construction placement tools and an integrated router, to enable early analysis and characterisation.
Present on the GSA and IET analogue panel were Ross Addinall, Europe technical director at Ciranova, Peter Frith, chief technical officer of Wolfson Microelectronics, Doug Pattullo, director of Field Technical Support at TSMC Europe and Ciaran Whyte, co-founder and chief technical officer at IC Mask Design.
The panel was chaired and moderated by Paul Double, GSA’s European chair of the Analogue/Mixed-Signal Interest Group and founder and managing director of EDA Solutions Ltd.
The Global Semiconductor Alliance together with the UK’s Institution of Engineering & Technology joined forces to highlight and discuss European trends in semiconductor development. This year’s program focused on leveraging and maximising European expertise in analogue/mixed-signal, wireless, low-power applications and quality/reliability to access emerging markets for silicon growth including smart cards, power electronics and home networking.
"The panel addressed the problems facing today's analogue designers, including technology and design issues, which are the cause of the analogue bottleneck," explains panel chair Paul Double, GSA’s European chair of the Analogue/Mixed-Signal Interest Group and founder and managing director of EDA Solutions Limited. "The discussion resulted in a proposed new methodology for IC design which leads to faster layout, allowing early analysis of the extracted design," added Double.
Market research indicates that although analogue circuitry comprises only 20 percent of the area in today’s modern mixed-signal devices, it is likely to account for some 80 percent of yield loss.
Due to the complexity of the design and dramatic increase in process related design rules to be considered, mixed-signal design, and especially full custom design, is leading to more errors and performance related problems. Manual design and layout is no longer viable, yet automation in the analogue design world remains difficult, and is often an anathema to analogue designers. This quandary is often referred to as the analogue bottleneck.
The findings of the panel discussion suggested a new approach to analogue design to help offset this bottleneck. Because analogue layout at the deeper process nodes is heavily dependent on processing effects, it often does not make sense to perform simulation before the layout stage as in a traditional IC design flow.
The solution proposed by the panel to achieve faster layout is to allow early analysis of the extracted design. The flow from schematic to layout has to be accelerated, with simulation only after parasitic extraction. This requires a change in CAD methodology to accelerate the manual layout process.
The existing approach is currently: circuit entry in schematic form, simulation, adjust the schematic, re-simulate, repeat until satisfied with simulation and then on to layout and finally, verification of layout. The new approach proposed by the panel is: schematic, directly to layout, verification including extraction of layout complete with parasitics, simulation, then repeat the entire process until simulations are satisfactory.
To support this new methodology, IC design software must feature robust device layout generators, correct by construction placement tools and an integrated router, to enable early analysis and characterisation.
Present on the GSA and IET analogue panel were Ross Addinall, Europe technical director at Ciranova, Peter Frith, chief technical officer of Wolfson Microelectronics, Doug Pattullo, director of Field Technical Support at TSMC Europe and Ciaran Whyte, co-founder and chief technical officer at IC Mask Design.
The panel was chaired and moderated by Paul Double, GSA’s European chair of the Analogue/Mixed-Signal Interest Group and founder and managing director of EDA Solutions Ltd.
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