ST delivers 512-Kbit serial EEPROMs in 2x3mm package outline

SINGAPORE: STMicroelectronics, the world’s largest supplier of serial EEPROMs, has leveraged its advanced non-volatile memory technology to deliver an industry first with two new 512-Kbit devices that offer the highest density memories available in the industry-standard 2x3x0.6mm 8-pin Micro Leadframe Package (MLP).

Pin compatibility with memories of lower density allows designers to upgrade products quickly and efficiently by changing devices without redesigning the board.

Serial EEPROMs deliver non-volatile storage in low-pin-count packages, suitable for many consumer, industrial, medical and communication products. The devices’ built-in byte-mode erasing capability allows easy parameter update; and 128-byte page write, together with 5ms write time, results in rapid programming of assembled boards on the production line.

In addition, with read current as low as 2mA and stand-by current less than 5 microamps, the new memories save energy in power-sensitive equipment such as battery-powered personal media devices or professional portable instruments.

The wide operating-voltage range, from 1.8V to 5.5V, allows the same device to be used across many applications and product variants. Both types are also offered with an operating range of 2.5V to 5.5V.

The new devices are the M95512 featuring a 20MHz SPI port, and the M24512 with an I2C interface supporting 400kHz Fast-mode or 1MHz Fast-mode Plus. With its 20MHz SPI interface, the M95512 achieves data transfer speeds equal to the fastest serial EEPROMs currently available.

Both devices are also available in industry-standard SO-8 and TSSOP-8 packages. These new devices complete a full family of EEPROMs, delivered in MLPs from 2 to 128 and 512-Kbit densities. A 256-Kbit device will be available in Q4 2009.

The M95512 and M24512 in MLP 2x3 packages are available in mass production and are priced from $0.80 for high-volume orders.

TSMC unveils first commercial 65nm multi-time programmable NVM technology

HSINCHU, TAIWAN: Taiwan Semiconductor Manufacturing Co. Ltd announced the foundry segment's first functional 65nm multi-time programmable (MTP) non-volatile memory (NVM) process technology.

The technology incorporates process-qualified MTP IP blocks jointly developed with Virage Logic. The new technology is the first 2.5 volt MTP process, breaking the heretofore 3.3 volt baseline barrier. It eliminates the need for an external EEPROM currently in many systems applications, thereby reducing power, area and costs while increasing data security.

Built on TSMC's 65nm Low Power (LP) process, the new MTP technology features up to 8k bits memory size that is ideal for small memory requirements associated with MP3 music downloadable digital rights management (DRM), fingerprint identification applications, RFID devices and prepaid cash or phone cards.

The 65nm MTP process is built up to 10 metal layers using copper low-k interconnects and nickel silicide transistor interconnects. The technology is fully logic-compatible and the NVM memory requires no additional processes or masks. Devices built using the process will support full read and program operations across temperatures ranging from -40 degrees C to 125 degrees C, with minimum 10-year data retention at 125 degrees C.

"With inputs from customers' design needs, we are convinced this 65nm process is well-suited for applications that require a small memory footprint on a leading edge manufacturing technology," explains Jason Chen, vice president Worldwide Sales and Marketing for TSMC.

"TSMC and Virage Logic have worked together on the 65nm MTP process to bring true multi-time NVM programmability to such market segments as security and wireless where advanced process adoption is crucial," said Dr. Yankin Tanurhan, vice president and general manager, NVM Solutions, Virage Logic.

"Because AEON is based on a standard logic CMOS process, it requires no additional masks or processes which eliminates the costly manufacturing steps normally involved with floating gate memory while reducing the engineering effort and associated costs of integrating NVM into SoC designs."

World's first R/W cross-point memory array from Unity

SUNNYVALE, USA: Unity Semiconductor Corp., a Silicon Valley start-up that will serve the semiconductor data storage memory market as a designer, developer and manufacturer of non-volatile memory products, disclosed its objective to have the smallest die-size and the lowest manufacturing cost per bit in the industry.

The storage-class non-volatile memory (NVM) products company plans to achieve its objective using innovative, multi-layer, memory array architectures and a new breakthrough technology called CMOx, which is based on the use of new materials called conductive metal oxides into the semiconductor process that allows for ionic motion.

“We see ourselves in the 2-year horizon for production volumes of our first product, a 64-gigabit storage-class memory,” said Unity Semiconductor Chairman, President & CEO Darrell Rinerson, a former executive at memory leader Micron Technology and at Advanced Micro Devices.

Unity Semiconductor, founded in 2002, has successfully created the world’s first passive rewritable cross-point memory array that requires no transistors in a memory cell. Unity Semiconductor has been processing 64-kilobit products for two years, 64-megabit products for one year, and is in design of a 64-Gb product that is now close to tape-out and slated for pilot production in 2H 2010, with volume production in 2Q 2011.

Unity Semiconductor is not just looking to develop a NAND flash replacement technology for all the important high-density memory segments. Rather, it also will develop and produce NAND flash “successor” technologies and products that, in time, will extend into high-performance embedded and enterprise applications. “It’s a ‘Technology for Terabits’ that will challenge high-volume rotating magnetic media,” Rinerson stated.

Unity Semiconductor will serve the data storage market as a designer, developer and manufacturer of non-volatile memory products that it will produce in partnership with one or more leading memory integrated device manufacturers (IDMs). In addition to being a products company, Unity Semiconductor will engage in selective intellectual property (IP) licensing.

“Storage-Class Memories (SCM) are currently defined as either memory-based (non-volatile RAM) or storage-centric. CMOx is the first true storage-class memory that meets the performance criteria required for advanced storage. As the first cross-point storage device, CMOx is capable of being scaled below 20 nanometers with a volumetric density better than 4bits/cell NAND. It uses less than 1 microamp of write current per cell, has a 10x write performance and better endurance compared to NAND, and at a much lower cost,” stated Alan Niebel, CEO of Web-Feet Research, Monterey, CA.

Based on forecasts from market researchers, Unity believes the total accessible market (TAM) for its storage class non-volatile memory products will be approximately $15B in 2010, growing to more than $25B in 2013.

The start-up’s value proposition to its target market stems from its proprietary next-generation NVM technology, CMOx. The price/performance of Unity’s CMOx based storage-class memory products will allow Unity to initially target the high-performance NAND flash replacement market.

However, CMOx is designed to address the emerging markets, such as solid-state drives (SSDs) for notebook PCs and netbooks, mobile Internet devices (MIDs) and smart phones, for which some market forecasters believe over 90 percent will have embedded flash by 2012.

CMOx is a next-generation NVM technology based upon a Unity-proprietary switching effect that occurs in certain metal oxide combinations. The switching concept used by Unity in CMOx is different from that used in today’s flash technology. The memory effect of CMOx technology is based upon the movement of ionic charge carriers.

CMOx can be utilized to form a passive cross-point multi-layer memory array, as it does not require a transistor per cell. Other memory technologies, such as phase-change memory (PCM) and magneto-resistive random access memory (MRAM), use a transistor per cell and are not amenable to the cross-point multi-layer chip architecture.

Unity Semiconductor’s multi-layer cross-point array utilizes a resistance change element (although it’s not a Resistive RAM (RRAM) memory cell such as is being developed by a few other companies). Rather, in the CMOx technology, conduction is uniform across the device instead of being filamentary. The cross-point memory array architecture allows for the densest memory devices of all the next-generation NVM technologies. Further, it enables the physical stacking of multiple layers of memory.

Unity Semiconductor’s CMOx based designs use 4 physical layers of multi-level cell (MLC) memory, and is the key to increasing the density of its storage-class memory products. A proprietary next-generation nonvolatile memory technology, CMOx will yield products with 4x the density and 5-10x the write speed of today’s NAND flash.

“We believe only CMOx has the small cell size to beat NAND flash in cost and density,” Rinerson stated.

In addition to its technical innovations, Unity Semiconductor has several unique business concepts. Key among these is the separation of the processing of the front-end-of-line (FEOL) CMOS base wafer from the back-end-of-line (BEOL) memory layer processing. No new process technology is needed in the CMOS base wafer, which can be fabricated at a CMOS logic foundry with existing production capability and capacity on a trailing edge CMOS (90nm) process.

The BEOL Memory concept enables a CMOS logic foundry to be in the memory business without taking significant risks associated with being in the memory business.

Unity Semiconductor’s CMOS FEOL strategy allows it to be a moderate follower in CMOS transistor technology. Its shrink path is unconventional in that a higher density memory core doesn’t require base CMOS technology migration.

Instead, Unity can use the same 90nm base CMOS for multiple generations, as well as use proven design IP to reduce risk and time to market. Unity Semiconductor’s shrink path strategy is unique in that it enables lower base substrate cost of manufacturing, i.e., it can utilize trailing-edge 90nm production lines, enabling older CMOS logic production lines to serve as its FEOL foundry. No new investment in FEOL processing is needed.