MOS-AK/GSA Modeling Working Group holds fall workshop in Helsinki

SAN JOSE, USA: The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, held its annual autumn workshop on September 16, 2011 as part of the European ESSDERC/ESSCIRC Conference in Helsinki, Finland. More than 50 international academic researchers and modeling engineers attended three sessions to hear 13 technical compact modeling keynote addresses and complementary poster presentations.

The Workshop’s three sessions focused on the ITRS’ perspective on compact modeling developments, alternative silicon carbide (SiC) technology, technology computer-aided design (TCAD)/CAD simulations and advanced compact modeling.

Industrial partners presented on advanced modeling of high-voltage (HV) transistors with HiSIM_HV, its benchmarks and new developments (contributed by austriamicrosystems and Hiroshima University) and on enhanced modeling flow and model improvement for I3T ON Semiconductor technologies (contributed by ON Semiconductor CZ). Academic partners shared their experience in modeling drift/diffusion effects in short-channel undoped Schottky barrier DG-MOSFETS (contributed by Technische Hochschule Mittelhessen (D)) as well as the cumulative distribution function-based method for yield optimization of CMOS ICs (contributed by ITE Warsaw (PL)).

The "40th Anniversary of SPICE" panel discussion was the central part of the Workshop. Professor Andrei Vladimirescu of UC Berkeley prefaced the panel discussion with the opening keynote "Semiconductor Device Models – A Key Ingredient of SPICE for 40 Years.” Panelists included university and industry experts Christian Enz, EPFL; Chenming Hu, UC Berkeley; Paolo Nenzi, ngspice, University of Rome; Willy Sansen, ESAT-MICAS (moderator); Ehrenfried Seebacher, austriamicrosystems; and Andrei Vladimirescu, UC Berkeley. This lively, dynamic discussion reviewed the past, present and future of compact/SPICE modeling and set demanding requirements for compact models needed to support device-level nano CMOS designs in the coming decade.

In response to today’s leading-edge and broad compact modeling challenges, professors Chenming Hu and Christian Enz officially announced the BSIM-EKV modeling partnership. BSIM and EKV have agreed to collaborate on the long-term development and support of BSIM6 as a world-class open-source MOSFET SPICE model for the international community for years to come. This is an exciting opportunity to leverage the long experience and widespread adoption of the BSIM model with the long experience and active role of EKV in furthering charge-based compact modeling.

The event ended with high-quality technical poster presentations covering compact model development, implementation, deployment, device-level circuit simulations and model standardization.

The MOS-AK/GSA Modeling Working Group has several upcoming events: a winter MOS-AK/GSA meeting in Washington, DC, USA; Q1 2012 MOS-AK/GSA Modeling Workshop in New Delhi, India; and Q2 2012 MOS-AK/GSA Modeling Workshop in Dresden, Germany.