CEA-Leti reports progress in computing, medical electronics, communications, and other fields at ISSCC 2011

GRENOBLE, FRANCE: CEA-Leti researchers and their partners will report on projects that address fundamental challenges facing next-generation computing, medical diagnosis, communications, and portable electronics at ISSCC 2011, Feb. 20-24, in San Francisco, Calif.

The ISSCC (International Solid-State Circuits Conference) is the premier forum for presenting advances in solid-state circuits and systems-on-a-chip. The conference theme this year is “Electronics for Healthy Living,” highlighting integrated circuits for biomedical systems.

One paper featuring CEA-Leti authors includes work on RF (60GHz) communication chips performed in connection with chipmaker STMicroelectronics to target 60GHz Wireless HD Applications. CEA-Leti demonstrates that it is possible to integrate in standard low-cost CMOS 65nm technology a low-power system-on-chip working in the 60GHz frequency band with a data rate up to 3.8Gbps. The data rate is 70 times higher than traditional 54Mbps WiFi technology. This technology will open new opportunities for fast up-and-down loading applications.

Two of CEA-Leti’s top presentations deal with imaging devices for professional applications: a Thz imager built with a low-cost technology, and an infrared imaging array capable of returning an image with a thermal resolution of 1 to 2 mK at ambient temperature. In keeping with its strategic focus on bringing innovations from the development stage to manufacturability, CEA-Leti has expanded its optronics efforts from the boosting of sensor performance to creating new architectures and design technologies that enable easier integration into system-level products.

In addition to the presentations listed below, two CEA-Leti specialists — Dr. Ahmed Jerraya, head of the Strategic Design Programs; and Michel Durr, Analog and RF IC Design Program manager — will be available for meetings with journalists during the conference. Interviews can be arranged through CEA-Leti’s communications team, to discuss emerging developments in:

60GHz CMOS design: CEA-Leti has designed many circuits in the 60GHz millimeter range in European projects and industrial partnerships with STMicroelectronics and NEC. This work has resulted in several reviews and papers in major international conference proceedings, such as ISSCC, Radio Frequency Integrated Circuits (RFIC) and the Journal of Solid State Circuits (JSSC).

Design for imaging: Current research subjects deal with 3D integration to enable massively parallel image processing, large-area imaging sensors obtained by stitching processing for medical applications (X-rays), and with 3D vision with infrared imaging array derived from a time-of-flight computing.

CEA-Leti research projects include infrared, visible, X-rays and gamma displays and sensors for applications in defense, security, health, cameras, phones and gaming. CEA-Leti’s design emphasis is on ultra-low noise, low-power, enhanced analog-to-digital and digital-to-analog converters, advanced architecture for signal processing and integrated image processing.

Multicore digital chips: CEA-Leti’s Network-on-Chip (NOC) brings a notable improvement over conventional bus systems. As IC complexity increases, more processing elements are used in parallel to improve the computation performance (multi-core processors), and the bus approach with shared connections between all the computing cores limits device performance.

In an NOC, connections are point-to-point links operating simultaneously. This high level of parallelism will greatly improve the scalability of SoCs (adding new computing cores will not lead to re-design of the whole chip), their flexibility (routing possibility between the different cores) and their power efficiency (due to short connections).

The GALS approach developed in CEA-Leti’s NoC implementation is the main differentiating feature with other concurrent teams. An easy Lego-like chip assembly allows a decoupling between the different processing cores of the NoC, thus allowing fine-grain power management, while reducing the time-to-market.

All these developments will be used in next-generation telecom embedded systems such as 3GPP-LTE (Third Generation Partnership Project – Long Term Evolution) and software-defined radio; or in multimedia chips, in image enhancement, for instance.