Camgian Microsystems awarded phase III AFRL SBIR

STARKVILLE, USA: Camgian Microsystems Corp., a provider of advanced electronic systems and semiconductor technologies, has been awarded a three-year, $9.2 million Small Business Innovation Research (SBIR) Phase 3 project by the Air Force Research Laboratory (AFRL) in Dayton, Ohio.

This SBIR project will develop two revolutionary, ultra low power Application Specific Integrated Circuits (ASICs) aimed at providing significant power savings for a range of military electronic sensor systems, such as radar and infrared cameras.

The RF transceiver ASIC will integrate Camgian’s low power radar architecture with intellectual property from AFRL on radar-on-a-chip technology. The DSP architecture will be based on Camgian’s asynchronous NULL Convention Logic, which inherently provides data driven, self-timed circuits and supports advanced power management through sub-threshold transistor operation coupled with power gating plus dynamic power supply control.

“The goal of this program is to radically improve the operational endurance of key ground and airborne ISR sensor assets while increasing both sensor performance and on-board digital signal processing capabilities,” said Gary Butler, President and CEO of Camgian Microsystems. “With this new chip set, we are aiming to drive down the size, weight, power and cost (SWAPC) of the systems while providing an ultra-energy efficient sensor and signal processing platform.”

By minimizing energy consumption in logic circuits during active computation, Camgian has demonstrated the ability to achieve power consumption levels in key digital signal processing operations for infrared imaging systems that are approximately 20 times lower than existing integrated circuit technologies. The first phase of the AFRL research initiative will build on these results and focus on the key architectural components of the test chips, which are expected to tape-out in 2011.