Synfora adds support for Xilinx Virtex-6 and Spartan-6 FPGA devices to PICO algorithmic synthesis tool

MOUNTAIN VIEW, USA: Synfora, Inc., the premier provider of high level synthesis tools for IC and system designers of large, complex processing applications, announced a new version of its PICO Extreme FPGA C synthesis tool with support for the next-generation Xilinx Spartan-6 and Virtex-6 devices as well as seamless integration with the Xilinx Embedded Development Kit (EDK) tool suite.

In addition, the new version of PICO Extreme FPGA provides improved quality of results with area and throughput improvements of up to 15 percent.

“Xilinx FPGAs offer a compelling cost / performance advantage over discrete DSPs for a variety of performance critical signal and video processing applications,” says Tom Hill, Sr. Manager, DSP Platforms at Xilinx.

“Pico Extreme FPGA enables traditional DSP programmers to more easily migrate their existing applications to Xilinx FPGAs and the new integration with the Xilinx embedded environment allows our customers to take advantage of Synfora’s high quality C-to-FPGA design flow when targeting our embedded and video development platforms.”

PICO Extreme FPGA extends high level synthesis technology to FPGA devices, enabling the implementation of dramatically larger and more complex FPGA sub-systems, such as video codecs, wireless modems and imaging pipelines, from untimed C algorithms with quality of results comparable to manual designs.

It is based on an advanced optimizing compiler that transforms a sequential, untimed C algorithm into highly efficient RTL (Register Transfer Language), reducing design and verification time, allowing designers to find the lowest cost implementation and enabling very rapid response to changes in the design specification. Using untimed C as the design entry language decreases design and verification time as well as improves design reuse across multiple device architectures.

The new 09.03 release of the PICO Extreme FPGA supports the next-generation Xilinx Spartan-6 and Virtex-6 devices. Designers can select a specific Spartan-6 or Virtex-6 part as the target device, and PICO Extreme FPGA will generate RTL optimized for that device in terms of area and performance, including optimal use of block RAMs and DSP48 slices, based on a detailed knowledge of the device characteristics.

The new release also supports integration with the Xilinx Embedded Development Kit (EDK) tool suite to enable the design of a complete embedded processor system for implementation in a Xilinx FPGA device.

Designers can direct PICO Extreme FPGA to export designs as custom embedded peripherals that can be easily imported into the Xilinx embedded development environment and integrated with other IPs including a MicroBlaze processor core to create processor-based designs. It also allows users to interface to streaming communication protocols like FSL and LocalLink as well to DDR memory.

The new version of PICO Extreme FPGA also provides improved quality of results based on algorithmic and flow enhancements in the scheduler as well as several new techniques to reduce the number of registers. On a suite of customer FPGA designs, these enhancements to PICO improved design area by 7 percent to 15 percent and throughput by 11 percent to 15 percent.

“The new generation of high level synthesis represented by PICO Extreme FPGA enables more complex algorithms to be created more efficiently, using a more intuitive design style, than our previous solutions,” said Simon Napper, president of Synfora. “Support for the next generation Xilinx devices and seamless integration with EDK is the next step in elevating the FPGA design effort to a C programming task, making Xilinx FPGAs accessible to a wider market.”

Synfora PICO High Level Synthesis Platform
The PICO High Level Synthesis Platform provides productivity gains by creating application accelerators from an untimed C algorithm at the highest level of abstraction.

PICO yields QoR (quality of results) that is competitive with manual design by using a unique parallelizing compiler and multi-level hierarchical abstraction and IP reuse. It offers the highest possible level abstraction for large designs, and has been proven to provide huge productivity gains on the largest production designs, not just on small blocks.

Version 09.03 of PICO Extreme FPGA and PICO Extreme are now available. Xilinx and Synfora are collaborating to ensure that training and support are available for both design creation and RTL integration.