NORWOOD, USA: The European Organization for Nuclear Research (CERN) in Switzerland and the University of Sannio, Benevento, Italy, have collaborated on the design of an advanced instrument for measuring magnetic fields in CERN’s Large Hadron Collider (LHC) superconducting magnets. Called the Fast Digital Integrator (FDI) board, this measurement device uses Analog Devices’ A/D converters, analog multiplexers and DSP components to provide the LHC with the highest possible performance achieved to-date in measuring magnetic fields.
The new FDI board enables 100 times the resolution and frequency bandwidth of the previous generation digital integrator. This significant improvement in dynamic range enables scientists to detect even more minute artifacts that contribute to magnetic field variations, field decay and other time dependent phenomena typical in high-field superconducting accelerator magnets that all negatively affect the quality of particle beams under study. The new FDI boards are used at CERN to measure magnetic flux at 10 revolutions per second through fast-rotating calibrated coils that evaluate the magnetic field produced by the LHC’s 8 Tesla accelerator magnets.
“Prior to the FDI board, the available electronic components were not suitable in terms of accuracy or resolution, which in the case of the Large Hadron Collider easily approaches 10 parts per million,” said Pasquale Arpaia, professor of engineering at the University of Sannio. “We chose to work with Analog Devices because the quality of the company’s products, documentation and support are all very high. This helped make it possible for the FDI to reveal new magnetic investigation regions that we were not able to explore before.”
The LHC is the world’s largest and highest-energy particle accelerator, as well as the biggest machine ever built by humans. Construction started in 2003 and the LHC was operational in 2008. Its mission is to probe some of the most fundamental questions of physics and advance the understanding of the most fundamental laws of nature.
Thursday, October 27, 2011
Arasan Chip Systems appoints VP of worldwide marketing
SAN JOSE, USA: Arasan Chip Systems Inc., a leading provider of Total Semiconductor IP Solutions, announced the appointment of Andrew Haines as VP of Worldwide Marketing. Haines has over 30 years experience in marketing high-technology semiconductor, semiconductor IP and electronic design automation products.
"We are excited to have Andrew accept the position of Vice President of Worldwide Marketing at Arasan." said VP of Sales, Ron Mabry. "He has a proven history of success in the semiconductor and EDA industries, and I am confident that he will make a significant impact in our continuing worldwide efforts of Arasan Chip Systems."
Haines will be responsible for the direction and management of all worldwide marketing. He will also manage the positioning of the company's portfolio of mobile storage, mobile connectivity, and Total IP Solutions.
Haines said: "I welcome the opportunity to join a market-leading company during a phase of aggressive sales channel expansion, coupled with strong growth in Asian markets, and rapid adoption of the MIPI mobile connectivity standards. The company's impressive leadership position in MIPI IP and Mobile Storage IP including SD, SDIO, eMMC, ONFI and UFS enable it to take advantage of the rapid growth in these markets."
"We are excited to have Andrew accept the position of Vice President of Worldwide Marketing at Arasan." said VP of Sales, Ron Mabry. "He has a proven history of success in the semiconductor and EDA industries, and I am confident that he will make a significant impact in our continuing worldwide efforts of Arasan Chip Systems."
Haines will be responsible for the direction and management of all worldwide marketing. He will also manage the positioning of the company's portfolio of mobile storage, mobile connectivity, and Total IP Solutions.
Haines said: "I welcome the opportunity to join a market-leading company during a phase of aggressive sales channel expansion, coupled with strong growth in Asian markets, and rapid adoption of the MIPI mobile connectivity standards. The company's impressive leadership position in MIPI IP and Mobile Storage IP including SD, SDIO, eMMC, ONFI and UFS enable it to take advantage of the rapid growth in these markets."
Mentor Graphics Veloce emulator adopted by ZTE to accelerate time-to-market for next-gen SoCs
WILSONVILLE, USA: Mentor Graphics Corp. announced that ZTE Corp., has adopted the Mentor Veloce product for the complete system-level verification of its next-generation SoC chips for networking applications. ZTE chose the Veloce product due to its superior performance, debug capabilities, accuracy, and extensive portfolio of vertical market solutions for the verification of networking, multimedia designs, and wireless designs.
“ZTE’s goal is to deliver high-quality products to our customers that create value, demonstrate innovation, and that are also very reliable,” said Hengqi Liu, CTO of Datacomm at ZTE. “During the verification stage of a new product, we face significant challenges in meeting this goal and reduce the risks involved in the integration of our advanced SoCs. We chose to use Veloce for the pre-silicon testing and verification of our next-generation SoCs, allowing us to meet the challenges we face in delivering new products on-time and with a high-level of quality that satisfies our customers.”
The Veloce platform, with dual mode accelerator and emulator, provides high performance for both transaction-based verification and traditional in-circuit emulation (ICE). With an extensive portfolio of both physical and virtual solutions for industry standard protocols and interfaces, Veloce is the platform of choice for networking, wireless, multimedia, storage, and embedded systems applications.
“We have worked closely with ZTE to provide a best-in-class emulation solution that meets their needs and addresses the challenges they face in verifying their next-generation telecommunication designs,” said Eric Selosse, Mentor Emulation Division (MED) VP and GM. “We are delighted that ZTE benefits from our latest generation Veloce emulators, and we continue to support them for future success in the verification of their latest products.”
“ZTE’s goal is to deliver high-quality products to our customers that create value, demonstrate innovation, and that are also very reliable,” said Hengqi Liu, CTO of Datacomm at ZTE. “During the verification stage of a new product, we face significant challenges in meeting this goal and reduce the risks involved in the integration of our advanced SoCs. We chose to use Veloce for the pre-silicon testing and verification of our next-generation SoCs, allowing us to meet the challenges we face in delivering new products on-time and with a high-level of quality that satisfies our customers.”
The Veloce platform, with dual mode accelerator and emulator, provides high performance for both transaction-based verification and traditional in-circuit emulation (ICE). With an extensive portfolio of both physical and virtual solutions for industry standard protocols and interfaces, Veloce is the platform of choice for networking, wireless, multimedia, storage, and embedded systems applications.
“We have worked closely with ZTE to provide a best-in-class emulation solution that meets their needs and addresses the challenges they face in verifying their next-generation telecommunication designs,” said Eric Selosse, Mentor Emulation Division (MED) VP and GM. “We are delighted that ZTE benefits from our latest generation Veloce emulators, and we continue to support them for future success in the verification of their latest products.”
Wednesday, October 26, 2011
Broadcom delivers industry’s first SoC to achieve 1.25Gbps for 4G/LTE microwave backhaul
IRVINE, USA: Broadcom Corp. announced its latest innovation for 4G/LTE microwave backhaul, the BCM85620 system-on-a-chip (SoC). Designed specifically to address the need for higher bandwidth in mobile backhaul, the BCM85620 represents the industry’s first solution to deliver Gigabit bandwidth and beyond and is the first SoC to combine a baseband modem and network processor in one chip.
With unparalleled integration, the BCM85620 combines the functionality of up to ten off-the-shelf application-specific standard parts (ASSPs) into one SoC, dramatically lowering power consumption and system costs. Today’s announcement also represents the successful integration of Provigent within just six months post acquisition.
As the number of mobile users, and use of multimedia services such as streaming video continues to rise, mobile operators are investing in next generation mobile backhaul networks that enable them to meet the performance and service expectations of consumers. In order to manage this massive growth in wireless traffic and evolution of 4G/LTE networks, carriers are faced with the challenge of backhauling data from the cell sites to the core network.
With enhanced radio performance and advanced networking capabilities, the BCM85620 provides radio-optimized traffic delivery, including robust clock delivery over packet transport needed for network synchronization. Coupled with 1.25Gbps throughput and 25 percent higher capacity than existing solutions, the BCM85620 enables wireless backhaul systems to support the demanding requirements of 4G/LTE networks.
With unparalleled integration, the BCM85620 combines the functionality of up to ten off-the-shelf application-specific standard parts (ASSPs) into one SoC, dramatically lowering power consumption and system costs. Today’s announcement also represents the successful integration of Provigent within just six months post acquisition.
As the number of mobile users, and use of multimedia services such as streaming video continues to rise, mobile operators are investing in next generation mobile backhaul networks that enable them to meet the performance and service expectations of consumers. In order to manage this massive growth in wireless traffic and evolution of 4G/LTE networks, carriers are faced with the challenge of backhauling data from the cell sites to the core network.
With enhanced radio performance and advanced networking capabilities, the BCM85620 provides radio-optimized traffic delivery, including robust clock delivery over packet transport needed for network synchronization. Coupled with 1.25Gbps throughput and 25 percent higher capacity than existing solutions, the BCM85620 enables wireless backhaul systems to support the demanding requirements of 4G/LTE networks.
ARM Cortex-A9 MPCore fast processor models provided by Imperas and OVP
OXFORD, ENGLAND: Imperas, which is a member of the ARM Connected Community, has released its models of the Cortex-A9 MPCore and Cortex-A5 UP ARM processor cores, including the 1, 2, 3 and 4-core versions of the Cortex-A9 MPCore. Models of the Cortex-A9 MPCore and Cortex-A5 UP are now available from Open Virtual Platforms (OVP), including example virtual platforms incorporating the cores and support for the cores in Imperas’ advanced software development tools.
These OVP Fast Processor Models are in use by customers, an example being the inclusion of the model of the Cortex-A9 MPx2 in the Cadence-developed Virtual Platform of the Xilinx Zynq-7000 Extensible Processing Platform (EPP). The Zynq-7000 EPP Virtual Platform was announced earlier today by Cadence and Xilinx and also discussed in a blog post.
Imperas earlier this week announced the interoperability of its OVP Fast Processor Models and advanced software Multiprocessor/Multicore Verification, Analysis and Profiling (M*VAP) tools with the Cadence Virtual System Platform. Imperas also announced earlier this week the development of the OVP Fast Processor Model of the Xilinx MicroBlaze soft processor core. This model of the Xilinx MicroBlaze will be available with certain versions of the Zynq-7000 EPP Virtual Platform as an extension to the virtual platform.
“ARM’s Cortex processor cores are at the heart of leading edge SoCs and embedded systems,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “And the Imperas OVP Fast Processor Models are at the heart of the virtual platforms of these SoCs and systems.”
The OVP Fast Processor Models and example platforms are available from the Open Virtual Platforms Cortex-A web page. The models of the ARM Cortex-A9 MPCore and Cortex-A5 UP, as well as models of the other ARM processors including the ARM7, ARM9, ARM10, ARM11, Cortex-A and Cortex-M families, work with the Imperas and OVP simulators, and have shown exceptionally fast simulation performance of hundreds of millions of instructions per second. The OVP Fast Processor Models include support for both the 32 and 16-bit instructions, as well as the MMU, MPU, TCM, VFP and NEON features.
Open Virtual Platforms, with over 75 Fast Processor Models, has become the de facto source for instruction accurate models of processor cores. All OVP Fast Processor Models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP processor models employ a state of the art just-in-time code morphing engine to achieve the simulation speed.
Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The native TLM-2.0 interface enables multiple instantiations of the processor models in a single virtual platform, just as any other component would be instantiated. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.
In addition to working with the OVP simulator OVPsim, the OVP Fast Processor Models work with the Imperas Multiprocessor/Multicore/Multithread Software Development Kit (M*SDK). These advanced tools for multicore software verification and analysis include key tools for software development on virtual platforms such as OS and CPU-aware tracing (instruction, function, task, event), hot spot profiling, code coverage and memory and cache analysis. The M*VAP tools utilize the Imperas SlipStreamer patent pending binary interception technology. SlipStreamer enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.
Available OVP fast processor models of ARM cores
The following specific models are available as open source from OVP:
ARM7TDMI, ARM720T, ARM7EJ-S
ARM920T, ARM922T, ARM926EJ-S, ARM940T, ARM946E, ARM966E-S, ARM968E-S
ARM1020E, ARM1022E, ARM1026EJ-S
ARM1136J-S, ARM1156T2-S
Cortex-A5 UP, Cortex-A8, Cortex-A9 UP, Cortex-A9 MPCore
Cortex-M3, Cortex-M4
These OVP Fast Processor Models are in use by customers, an example being the inclusion of the model of the Cortex-A9 MPx2 in the Cadence-developed Virtual Platform of the Xilinx Zynq-7000 Extensible Processing Platform (EPP). The Zynq-7000 EPP Virtual Platform was announced earlier today by Cadence and Xilinx and also discussed in a blog post.
Imperas earlier this week announced the interoperability of its OVP Fast Processor Models and advanced software Multiprocessor/Multicore Verification, Analysis and Profiling (M*VAP) tools with the Cadence Virtual System Platform. Imperas also announced earlier this week the development of the OVP Fast Processor Model of the Xilinx MicroBlaze soft processor core. This model of the Xilinx MicroBlaze will be available with certain versions of the Zynq-7000 EPP Virtual Platform as an extension to the virtual platform.
“ARM’s Cortex processor cores are at the heart of leading edge SoCs and embedded systems,” said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. “And the Imperas OVP Fast Processor Models are at the heart of the virtual platforms of these SoCs and systems.”
The OVP Fast Processor Models and example platforms are available from the Open Virtual Platforms Cortex-A web page. The models of the ARM Cortex-A9 MPCore and Cortex-A5 UP, as well as models of the other ARM processors including the ARM7, ARM9, ARM10, ARM11, Cortex-A and Cortex-M families, work with the Imperas and OVP simulators, and have shown exceptionally fast simulation performance of hundreds of millions of instructions per second. The OVP Fast Processor Models include support for both the 32 and 16-bit instructions, as well as the MMU, MPU, TCM, VFP and NEON features.
Open Virtual Platforms, with over 75 Fast Processor Models, has become the de facto source for instruction accurate models of processor cores. All OVP Fast Processor Models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP processor models employ a state of the art just-in-time code morphing engine to achieve the simulation speed.
Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The native TLM-2.0 interface enables multiple instantiations of the processor models in a single virtual platform, just as any other component would be instantiated. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.
In addition to working with the OVP simulator OVPsim, the OVP Fast Processor Models work with the Imperas Multiprocessor/Multicore/Multithread Software Development Kit (M*SDK). These advanced tools for multicore software verification and analysis include key tools for software development on virtual platforms such as OS and CPU-aware tracing (instruction, function, task, event), hot spot profiling, code coverage and memory and cache analysis. The M*VAP tools utilize the Imperas SlipStreamer patent pending binary interception technology. SlipStreamer enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.
Available OVP fast processor models of ARM cores
The following specific models are available as open source from OVP:
ARM7TDMI, ARM720T, ARM7EJ-S
ARM920T, ARM922T, ARM926EJ-S, ARM940T, ARM946E, ARM966E-S, ARM968E-S
ARM1020E, ARM1022E, ARM1026EJ-S
ARM1136J-S, ARM1156T2-S
Cortex-A5 UP, Cortex-A8, Cortex-A9 UP, Cortex-A9 MPCore
Cortex-M3, Cortex-M4
Xilinx launches Open Source Linux support and developer community for Zynq-7000 EPP
SANTA CLARA, USA: Xilinx Inc. launched its general Open Source Linux support and developer community for developing embedded software applications targeting the Zynq-7000 Extensible Processing Platform (EPP), further building out the development model for the new family of devices.
Linux software developers can begin developing their applications now with a GNU tool chain including C/C++ compilers, NEON optimized runtime libraries, debuggers and a QEMU system model of the Zynq-7000 EPP's dual Cortex-A9 MPCore processor system.
ARM TechCon attendees can see demos of the Zynq-7000 EPP and supporting development tools including the new virtual platform also announced today with Cadence at Xilinx booth #207.
"Linux is by far the most popular operating system in the embedded space and more than 60 percent of our Zynq-7000 EPP early access customers have expressed interest in using Linux as their primary OS for their software," said Lawrence Getman, VP of Processing Platforms at Xilinx. "Of this, 80 percent of the customers are planning to use open source Linux distribution, so it is of great importance that Xilinx offer a great open source Linux distribution to customers."
Much like its long-time support for Open Source Linux for the MicroBlaze soft processor, support for the Zynq-7000 EPP includes a GIT Linux source distribution, a Wiki, forums, and QEMU system model support. This means application-level software developers can start developing their Open Source Linux applications for the Zynq-7000 EPP today, and have a developer community they can rely upon to foster the sharing of ideas and mutual support.
Additionally, Xilinx continues its efforts to offer software developers the tools that they need by expanding Zynq-7000 EPP support to include the popular ARM Development Studio 5 (DS-5) tool chain, which now includes seamless multicore debug and trace on Cortex-A9 processors and system-wide performance analysis of Linux software stacks for the Zynq-7000 EPP.
"Access to open source and professional tools, as well as a vibrant community, ensure developers have all they need to quickly develop Linux-based applications," said John Cornish, GM System Design Division, ARM. "The ARM DS-5 toolchain works seamlessly with Linux and open source tools, simplifying the software development process on the Zynq-7000 platform."
Since April 2010, early access customers have been evaluating the Zynq-7000 Extensible Processing Platform for its ability to support systems targeting end market applications that support multiple functions and require real-time responsiveness that go well beyond what traditional processing solutions are able to implement. A number of these customers have also been able to run their systems in hardware using the Xilinx EPP Emulation platform, which offers a complete hardware model of the Zynq-7000 EPP including the ARM MPCore processor system and programmable logic resources.
For customers immediately requiring a commercially-supported Linux distribution, Xilinx Alliance Program member PetaLogix offers its System Development Kit (SDK) Zynq Edition. It is the only package supporting all phases of the embedded design flow, and providing integration with the Xilinx Embedded Development Kit for hardware design entry and implementation. The PetaLinux SDK delivers a complete Embedded Linux platform solution. The kit includes Linux kernel, standard libraries and applications, system image builder and custom application and device driver templates. Also provided is a QEMU-based dynamic virtual Zynq platform to kick-start software development.
"Today, more than ever, shrinking time-to-market pressures and ever-expanding feature requirements make Embedded Linux and FPGAs a winning embedded systems platform," said Dr John Williams, PetaLogix Founder and CEO. "PetaLinux SDK is the only Embedded Linux distribution specifically targeting FPGA-based system-on-chip designs. The company is focused exclusively on Xilinx FPGA-based Embedded Linux platforms and leverages years of research, development and experience which drives customer success through a range of tools and service offerings."
The Zynq-7000 EPP allows embedded software engineers to perform their development, debug and implementation tasks in a similar fashion to industry-standard embedded design methodologies, which early access customers have been using since early this year. Software application engineers can use the same ARM development tools they have used for previous designs.
In addition, Xilinx provides familiar tools, the Software Development Kit (SDK), an Eclipse environment-based tool suite, for embedded software application projects and Xilinx ISE Design Suite for embedded hardware design which are available in beta form, customers can contact their Xilinx sales representative for more information.
Linux software developers can begin developing their applications now with a GNU tool chain including C/C++ compilers, NEON optimized runtime libraries, debuggers and a QEMU system model of the Zynq-7000 EPP's dual Cortex-A9 MPCore processor system.
ARM TechCon attendees can see demos of the Zynq-7000 EPP and supporting development tools including the new virtual platform also announced today with Cadence at Xilinx booth #207.
"Linux is by far the most popular operating system in the embedded space and more than 60 percent of our Zynq-7000 EPP early access customers have expressed interest in using Linux as their primary OS for their software," said Lawrence Getman, VP of Processing Platforms at Xilinx. "Of this, 80 percent of the customers are planning to use open source Linux distribution, so it is of great importance that Xilinx offer a great open source Linux distribution to customers."
Much like its long-time support for Open Source Linux for the MicroBlaze soft processor, support for the Zynq-7000 EPP includes a GIT Linux source distribution, a Wiki, forums, and QEMU system model support. This means application-level software developers can start developing their Open Source Linux applications for the Zynq-7000 EPP today, and have a developer community they can rely upon to foster the sharing of ideas and mutual support.
Additionally, Xilinx continues its efforts to offer software developers the tools that they need by expanding Zynq-7000 EPP support to include the popular ARM Development Studio 5 (DS-5) tool chain, which now includes seamless multicore debug and trace on Cortex-A9 processors and system-wide performance analysis of Linux software stacks for the Zynq-7000 EPP.
"Access to open source and professional tools, as well as a vibrant community, ensure developers have all they need to quickly develop Linux-based applications," said John Cornish, GM System Design Division, ARM. "The ARM DS-5 toolchain works seamlessly with Linux and open source tools, simplifying the software development process on the Zynq-7000 platform."
Since April 2010, early access customers have been evaluating the Zynq-7000 Extensible Processing Platform for its ability to support systems targeting end market applications that support multiple functions and require real-time responsiveness that go well beyond what traditional processing solutions are able to implement. A number of these customers have also been able to run their systems in hardware using the Xilinx EPP Emulation platform, which offers a complete hardware model of the Zynq-7000 EPP including the ARM MPCore processor system and programmable logic resources.
For customers immediately requiring a commercially-supported Linux distribution, Xilinx Alliance Program member PetaLogix offers its System Development Kit (SDK) Zynq Edition. It is the only package supporting all phases of the embedded design flow, and providing integration with the Xilinx Embedded Development Kit for hardware design entry and implementation. The PetaLinux SDK delivers a complete Embedded Linux platform solution. The kit includes Linux kernel, standard libraries and applications, system image builder and custom application and device driver templates. Also provided is a QEMU-based dynamic virtual Zynq platform to kick-start software development.
"Today, more than ever, shrinking time-to-market pressures and ever-expanding feature requirements make Embedded Linux and FPGAs a winning embedded systems platform," said Dr John Williams, PetaLogix Founder and CEO. "PetaLinux SDK is the only Embedded Linux distribution specifically targeting FPGA-based system-on-chip designs. The company is focused exclusively on Xilinx FPGA-based Embedded Linux platforms and leverages years of research, development and experience which drives customer success through a range of tools and service offerings."
The Zynq-7000 EPP allows embedded software engineers to perform their development, debug and implementation tasks in a similar fashion to industry-standard embedded design methodologies, which early access customers have been using since early this year. Software application engineers can use the same ARM development tools they have used for previous designs.
In addition, Xilinx provides familiar tools, the Software Development Kit (SDK), an Eclipse environment-based tool suite, for embedded software application projects and Xilinx ISE Design Suite for embedded hardware design which are available in beta form, customers can contact their Xilinx sales representative for more information.
Conexant, Stretch join forces for video surveillance apps
NEWPORT BEACH, USA: Conexant Systems Inc., a leading supplier of innovative semiconductor solutions for imaging, audio, embedded modem, and video surveillance applications, has partnered with Stretch Inc., a leader in software configurable processors, to develop video surveillance applications. The two companies have combined for a complete hardware and software reference design for a new eight-channel video surveillance DVR.
Using Conexant’s CX25828, an eight-channel audio/video decoder chip with integrated audio DAC, the design platform demonstrates the power and flexibility of Stretch’s S7000 software configurable processors and the superior video quality provided by the CX25828.
The design features a Linux operating system running on the S7000's embedded ARM processor which, along with high levels of integration, offers the lowest cost per channel and best video quality in the surveillance industry. The software-defined architecture of Stretch’s VRM7008 delivers the ultimate in flexibility and allows users to mix and match encode, decode, intelligent analytics, and display functionality.
“The recently announced CX25828 from Conexant makes the perfect complement to our VRM7008 series, as it was specifically designed for advanced, high-capacity DVR video surveillance products,” noted Bob Beachler, Stretch VP of marketing, operations, and system design. “Our jointly developed reference design delivers true hybrid capability, allowing manufacturers to customize video surveillance and security products to their specific requirements.”
Conexant’s CX25828 is a high quality video and audio decoder specifically designed for surveillance applications. The CX25828 contains eight high-quality NTSC/PAL video decoders, nine audio ADCs, and one audio DAC. The video decoders are designed with 10-bit ADCs and five-line comb filtering for optimal luma-chroma separation to generate the highest-quality digital video output with the lowest possible noise and cross-luma/cross-chroma artifacts.
The CX25828 supports the standard ITU-R BT.656 digital video format and byte- multiplexed output at 27 MHz, 54 MHz, and 108 MHz. In addition, each video decoder includes a motion detection and image analytical engine. The audio processor with nine ADCs and one DAC provides user-friendly audio playback or two-way communications applications.
The CX25828 achieves the industry’s best interface flexibility with various multi-channel H.264 CODECs. The system-on-chip provides bi-directional bridging of video data, through flexible digital video output formats, GPIO and I2C interfaces, as well as audio data, through I2S and DSP style outputs at multiple sample rates with flexible multiplexing configurability.
“Businesses continue to raise security levels throughout their organizations, which increases the demand for high-density video surveillance and security products,” said Sailesh Chittipeddi, president and CEO for Conexant. “With this in mind, Conexant developed the CX25828, the latest in a line of advanced, high-capacity DVR video surveillance products that capture and record multiple video streams simultaneously.”
Conexant's video product portfolio includes decoders and media bridges for surveillance and security products with digital video recording capabilities. The company also offers low-power video encoder solutions that enable visual verification with passive infrared technology sensors used in residential "smart home" and commercial security applications.
Using Conexant’s CX25828, an eight-channel audio/video decoder chip with integrated audio DAC, the design platform demonstrates the power and flexibility of Stretch’s S7000 software configurable processors and the superior video quality provided by the CX25828.
The design features a Linux operating system running on the S7000's embedded ARM processor which, along with high levels of integration, offers the lowest cost per channel and best video quality in the surveillance industry. The software-defined architecture of Stretch’s VRM7008 delivers the ultimate in flexibility and allows users to mix and match encode, decode, intelligent analytics, and display functionality.
“The recently announced CX25828 from Conexant makes the perfect complement to our VRM7008 series, as it was specifically designed for advanced, high-capacity DVR video surveillance products,” noted Bob Beachler, Stretch VP of marketing, operations, and system design. “Our jointly developed reference design delivers true hybrid capability, allowing manufacturers to customize video surveillance and security products to their specific requirements.”
Conexant’s CX25828 is a high quality video and audio decoder specifically designed for surveillance applications. The CX25828 contains eight high-quality NTSC/PAL video decoders, nine audio ADCs, and one audio DAC. The video decoders are designed with 10-bit ADCs and five-line comb filtering for optimal luma-chroma separation to generate the highest-quality digital video output with the lowest possible noise and cross-luma/cross-chroma artifacts.
The CX25828 supports the standard ITU-R BT.656 digital video format and byte- multiplexed output at 27 MHz, 54 MHz, and 108 MHz. In addition, each video decoder includes a motion detection and image analytical engine. The audio processor with nine ADCs and one DAC provides user-friendly audio playback or two-way communications applications.
The CX25828 achieves the industry’s best interface flexibility with various multi-channel H.264 CODECs. The system-on-chip provides bi-directional bridging of video data, through flexible digital video output formats, GPIO and I2C interfaces, as well as audio data, through I2S and DSP style outputs at multiple sample rates with flexible multiplexing configurability.
“Businesses continue to raise security levels throughout their organizations, which increases the demand for high-density video surveillance and security products,” said Sailesh Chittipeddi, president and CEO for Conexant. “With this in mind, Conexant developed the CX25828, the latest in a line of advanced, high-capacity DVR video surveillance products that capture and record multiple video streams simultaneously.”
Conexant's video product portfolio includes decoders and media bridges for surveillance and security products with digital video recording capabilities. The company also offers low-power video encoder solutions that enable visual verification with passive infrared technology sensors used in residential "smart home" and commercial security applications.
Cypress deploys Numetrics to benchmark PSoC development capability
CUPERTINO, USA: Numetrics, the leading provider of fact-based resource and schedule trade-off analysis tools for semiconductor integrated circuit (IC) development projects, announced that Cypress Semiconductor Corp. has deployed Numetrics’ tools and industry database to perform root cause analysis and benchmark its new product development capability against the industry. Cypress’ goal is to ensure its rapidly expanding PSoC product line consistently achieves on-time market delivery and quality within development budget targets.
“We were able to use Numetrics solutions to perform root cause analysis and benchmark key performance indicators, including productivity, cycle time, schedule performance and spin count to drive systematic changes that significantly improve our product development processes,” said Paul Keswick, EVP of New Product Development at Cypress. “The ROI is getting our products to market faster or with fewer resources, or both.”
Cypress adopted Numetrics’ performance benchmarking solution, which includes Numetrics’ IC Industry Database and IC Metrics Tracker products to perform root-cause analysis and benchmark its PSoC development against similar projects in relevant industry categories. PSoC, or Programmable System-on-Chip, is a family of programmable SoC’s that integrate configurable analog and digital peripheral functions, memory and a microcontroller on a single IC.
“As a data-driven company, Cypress understands that fact-based decisions strengthen business processes and execution,” said Ron Collett, president and CEO of Numetrics. “We’re very pleased that Cypress was able to optimize its PSoC development execution using our tools and industry database. The market success of the PSoC product family is a testimonial to Cypress’ R&D execution and effectiveness.”
“We were able to use Numetrics solutions to perform root cause analysis and benchmark key performance indicators, including productivity, cycle time, schedule performance and spin count to drive systematic changes that significantly improve our product development processes,” said Paul Keswick, EVP of New Product Development at Cypress. “The ROI is getting our products to market faster or with fewer resources, or both.”
Cypress adopted Numetrics’ performance benchmarking solution, which includes Numetrics’ IC Industry Database and IC Metrics Tracker products to perform root-cause analysis and benchmark its PSoC development against similar projects in relevant industry categories. PSoC, or Programmable System-on-Chip, is a family of programmable SoC’s that integrate configurable analog and digital peripheral functions, memory and a microcontroller on a single IC.
“As a data-driven company, Cypress understands that fact-based decisions strengthen business processes and execution,” said Ron Collett, president and CEO of Numetrics. “We’re very pleased that Cypress was able to optimize its PSoC development execution using our tools and industry database. The market success of the PSoC product family is a testimonial to Cypress’ R&D execution and effectiveness.”
Xilinx and Cadence intro Extensible Virtual Platform
SANTA CLARA, USA: Xilinx Inc. and Cadence Design Systems Inc. have teamed to develop the industry's first virtual platform to enable system design, software development, and testing of Xilinx Zynq-7000 Extensible Processing Platform (EPP) based systems in advance of hardware availability.
This solution further enhances the development environment being put into place for Xilinx's ARM processor-based processing platform and changes the development flow for embedded designers, enabling software content to drive hardware design. ARM TechCon attendees can see a demonstration of this extensible virtual platform at Xilinx booth #207.
"Since 2008, Xilinx has been building a comprehensive development offering for the Zynq-7000 EPP that includes hardware emulation and early access to software, giving many customers the opportunity to have their systems up and running already," said Lawrence Getman, VP of Processing Platforms at Xilinx., vice president, Processing Platforms at Xilinx. "The Cadence/Xilinx solution takes embedded software development to a whole new level by mapping it to the Zynq-7000 family's unique extensibility without the need for any hardware other than the designers' workstation."
Built upon Cadence Virtual System Platform (VSP) technology, part of the Cadence System Development Suite, the virtual platform provides a stable, feature-rich, fast and functionally accurate model of the Zynq-7000 EPP processor system, its peripherals, memory and I/O, capable of booting Linux and other operating systems.
Complementing this model, and mirroring the programmable capabilities of the EPP hardware, is the ability for developers to extend the virtual platform using transaction-level models (TLM) to support custom devices that will ultimately be instantiated within the Zynq-7000 device's programmable logic.
"This new extensible virtual platform increases productivity for concurrent development of system architecture, hardware and software," said Michal Siwinski, group director of product marketing, System & Software Realization Group, Cadence. "As software content continues to grow, software-driven, system-level development methodologies are critical to the success of embedded systems– a concept detailed in the EDA360 vision."
The Virtual Platform augments the overall development offering Xilinx has been providing to early access Zynq-7000 EPP customers by enhancing the capabilities for software developers to start designing their applications today. Xilinx has been working with members of its Alliance Program and ARM's Connected Community over the course of two years to build a comprehensive development offering for the Zynq-7000 EPP.
The ecosystem of vendors providing tools and operating system support for the Zynq-7000 devices continues to grow as part of a program that began with the availability of FPGA based emulation platforms and a hardware tools early access program. An early access program for the virtual platform is in place and general availability is planned for Q1, 2012.
This solution further enhances the development environment being put into place for Xilinx's ARM processor-based processing platform and changes the development flow for embedded designers, enabling software content to drive hardware design. ARM TechCon attendees can see a demonstration of this extensible virtual platform at Xilinx booth #207.
"Since 2008, Xilinx has been building a comprehensive development offering for the Zynq-7000 EPP that includes hardware emulation and early access to software, giving many customers the opportunity to have their systems up and running already," said Lawrence Getman, VP of Processing Platforms at Xilinx., vice president, Processing Platforms at Xilinx. "The Cadence/Xilinx solution takes embedded software development to a whole new level by mapping it to the Zynq-7000 family's unique extensibility without the need for any hardware other than the designers' workstation."
Built upon Cadence Virtual System Platform (VSP) technology, part of the Cadence System Development Suite, the virtual platform provides a stable, feature-rich, fast and functionally accurate model of the Zynq-7000 EPP processor system, its peripherals, memory and I/O, capable of booting Linux and other operating systems.
Complementing this model, and mirroring the programmable capabilities of the EPP hardware, is the ability for developers to extend the virtual platform using transaction-level models (TLM) to support custom devices that will ultimately be instantiated within the Zynq-7000 device's programmable logic.
"This new extensible virtual platform increases productivity for concurrent development of system architecture, hardware and software," said Michal Siwinski, group director of product marketing, System & Software Realization Group, Cadence. "As software content continues to grow, software-driven, system-level development methodologies are critical to the success of embedded systems– a concept detailed in the EDA360 vision."
The Virtual Platform augments the overall development offering Xilinx has been providing to early access Zynq-7000 EPP customers by enhancing the capabilities for software developers to start designing their applications today. Xilinx has been working with members of its Alliance Program and ARM's Connected Community over the course of two years to build a comprehensive development offering for the Zynq-7000 EPP.
The ecosystem of vendors providing tools and operating system support for the Zynq-7000 devices continues to grow as part of a program that began with the availability of FPGA based emulation platforms and a hardware tools early access program. An early access program for the virtual platform is in place and general availability is planned for Q1, 2012.
The GSA bestows its highest honor to Dr. Henry Samueli
SAN JOSE, USA: The Global Semiconductor Alliance (GSA), the voice of the global semiconductor industry, proudly announced the 2011 winner of the Dr. Morris Chang Exemplary Leadership Award: industry pioneer and co-founder of Broadcom Corp., Dr. Henry Samueli. He will be presented with this lifetime achievement award during the GSA Awards Dinner Celebration on Thursday, Dec. 8, 2011, at the Santa Clara Convention Center in Santa Clara, Calif. Dr. Samueli is currently Broadcom’s Chief Technology Officer.
“Dr. Samueli had the foresight, innovation and belief that a semiconductor company could become highly successful without having to fabricate their own chips,” said Jodi Shelton, co-founder and president of GSA. “There are very few individuals in the semiconductor industry whose contribution and vision has benefited the fabless industry in such a profound way.”
Established in 1999, the first GSA “Exemplary Leadership Award” was given to Dr. Morris Chang, chairman and CEO of Taiwan Semiconductor Manufacturing Corp. (TSMC). Today, the Dr. Morris Chang Exemplary Leadership Award recognizes individuals for their exceptional contributions, exemplifying how their vision and global leadership have transformed and elevated the entire semiconductor industry.
“I am truly honored to receive this year’s Dr. Morris Chang Exemplary Leadership Award from the GSA. I attribute much of my success to the exceptional engineering talent I have been fortunate enough to work with and mentor over the years,” said Dr. Samueli. “It is indeed humbling to be selected as one of this esteemed group of industry pioneers who have truly changed the landscape of the semiconductor industry. I eagerly look forward to continuing my contributions to such a robust industry that is enhancing the quality of life of every person on the planet.”
After earning his Ph.D. degree from UCLA in 1980, Dr. Samueli spent his early career designing military broadband communications systems at TRW Inc. He subsequently moved on, in 1985, to become an electrical engineering professor at UCLA, where he led a research program in the area of advanced digital communications architectures and circuits. His team achieved many breakthrough developments by proving that low-cost CMOS technologies (1.0um in those days) could be used to implement all the key digital, analog and RF building blocks to enable multi-hundred Mbit/sec digital communications transceivers operating at GHz RF frequencies.
Dr. Samueli subsequently founded Broadcom in 1991 with one of his Ph.D. students, Henry Nicholas. In the early days the company pioneered the US cable industry’s transition to digital television by creating the world’s first broadband digital cable transmission solution, which ultimately expanded and evolved into one of Broadcom’s major business areas today, encompassing a complete portfolio of technologies for the digital home. Another early project involved the development of the industry’s first all-digital CMOS implementation of a Fast Ethernet transceiver.
This pioneering work launched Broadcom into its second major business segment, which today encompasses a complete portfolio of transmission and switching technologies for the infrastructure and networking market.
Another significant innovation that was leveraged from the UCLA research program was the development of high-performance Radio Frequency (RF) technology produced using standard bulk digital CMOS and, more importantly, demonstrating the ability to integrate these sensitive RF circuits on the same substrate as high-speed digital basebands. This pioneering work enabled Broadcom to introduce the world’s first true single-chip all-CMOS implementations of both Bluetooth and Wi-Fi wireless transceivers, which has evolved into Broadcom’s third major business segment today, encompassing a complete portfolio of RF and baseband technologies for the cellular and wireless connectivity markets.
Dr. Samueli’s dedication and leadership extends well beyond Broadcom, with his service and influence being felt throughout the research, university and start-up communities. Although full-time at Broadcom since 1995, Dr. Samueli has maintained his professorship (on-leave) in electrical engineering at UCLA, and a distinguished adjunct professorship in electrical engineering and computer science at UC Irvine.
He also serves on the UC President’s Board on Science and Innovation and is on the Chancellor’s Advisory Councils at both UCLA and UC Irvine. He also chairs the Dean’s Advisory Councils of both the Henry Samueli School of Engineering and Applied Science at UCLA and the Henry Samueli School of Engineering at UC Irvine.
In 2000, Dr. Samueli was awarded the University of California Presidential Medal, the UC Irvine Medal, the IEEE Circuits and Systems Society Industrial Pioneer Award, as well as the UCLA School of Engineering and Applied Science Alumnus of the Year. Dr. Samueli was elected a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2000, a member of the National Academy of Engineering in 2003, and a Fellow of the American Academy of Arts and Sciences in 2004. In 2005, he was awarded an Honorary Doctor of Science degree from the Technion-Israel Institute of Technology, and the Edward A. Dickson Alumnus of the Year from UCLA. In 2006, he received the IEEE Communications Society Distinguished Industry Leaders Award, and in 2010 he received the UCLA Medal.
Henry and his wife Susan are active philanthropists, having created the Samueli Foundation after Broadcom’s IPO in 1998. The Samueli’s also own the Anaheim Ducks National Hockey League club, which won the Stanley Cup Championship in 2007.
Broadcom has previously won 15 GSA awards and is nominated for two awards at this year’s GSA Awards Dinner Celebration.
The dinner is made possible by title sponsor TSMC, VIP sponsor NASDAQ OMX and networking reception sponsor GLOBALFOUNDRIES, as well as general sponsors Advantest, Amkor, ARM, ASE Group, Barclays, Broadcom, Cadence Design Systems, CSR, Dialog Semiconductor, GLOBALFOUNDRIES, IBM, Integrated Device Technology, J.P. Morgan, KPMG, Magnachip, Marvell, Model N, Morgan Stanley, Needham, NVIDIA, NetLogic Microsystems, PWC, QUALCOMM CDMA Technologies, Samsung and UMC.
“Dr. Samueli had the foresight, innovation and belief that a semiconductor company could become highly successful without having to fabricate their own chips,” said Jodi Shelton, co-founder and president of GSA. “There are very few individuals in the semiconductor industry whose contribution and vision has benefited the fabless industry in such a profound way.”
Established in 1999, the first GSA “Exemplary Leadership Award” was given to Dr. Morris Chang, chairman and CEO of Taiwan Semiconductor Manufacturing Corp. (TSMC). Today, the Dr. Morris Chang Exemplary Leadership Award recognizes individuals for their exceptional contributions, exemplifying how their vision and global leadership have transformed and elevated the entire semiconductor industry.
“I am truly honored to receive this year’s Dr. Morris Chang Exemplary Leadership Award from the GSA. I attribute much of my success to the exceptional engineering talent I have been fortunate enough to work with and mentor over the years,” said Dr. Samueli. “It is indeed humbling to be selected as one of this esteemed group of industry pioneers who have truly changed the landscape of the semiconductor industry. I eagerly look forward to continuing my contributions to such a robust industry that is enhancing the quality of life of every person on the planet.”
After earning his Ph.D. degree from UCLA in 1980, Dr. Samueli spent his early career designing military broadband communications systems at TRW Inc. He subsequently moved on, in 1985, to become an electrical engineering professor at UCLA, where he led a research program in the area of advanced digital communications architectures and circuits. His team achieved many breakthrough developments by proving that low-cost CMOS technologies (1.0um in those days) could be used to implement all the key digital, analog and RF building blocks to enable multi-hundred Mbit/sec digital communications transceivers operating at GHz RF frequencies.
Dr. Samueli subsequently founded Broadcom in 1991 with one of his Ph.D. students, Henry Nicholas. In the early days the company pioneered the US cable industry’s transition to digital television by creating the world’s first broadband digital cable transmission solution, which ultimately expanded and evolved into one of Broadcom’s major business areas today, encompassing a complete portfolio of technologies for the digital home. Another early project involved the development of the industry’s first all-digital CMOS implementation of a Fast Ethernet transceiver.
This pioneering work launched Broadcom into its second major business segment, which today encompasses a complete portfolio of transmission and switching technologies for the infrastructure and networking market.
Another significant innovation that was leveraged from the UCLA research program was the development of high-performance Radio Frequency (RF) technology produced using standard bulk digital CMOS and, more importantly, demonstrating the ability to integrate these sensitive RF circuits on the same substrate as high-speed digital basebands. This pioneering work enabled Broadcom to introduce the world’s first true single-chip all-CMOS implementations of both Bluetooth and Wi-Fi wireless transceivers, which has evolved into Broadcom’s third major business segment today, encompassing a complete portfolio of RF and baseband technologies for the cellular and wireless connectivity markets.
Dr. Samueli’s dedication and leadership extends well beyond Broadcom, with his service and influence being felt throughout the research, university and start-up communities. Although full-time at Broadcom since 1995, Dr. Samueli has maintained his professorship (on-leave) in electrical engineering at UCLA, and a distinguished adjunct professorship in electrical engineering and computer science at UC Irvine.
He also serves on the UC President’s Board on Science and Innovation and is on the Chancellor’s Advisory Councils at both UCLA and UC Irvine. He also chairs the Dean’s Advisory Councils of both the Henry Samueli School of Engineering and Applied Science at UCLA and the Henry Samueli School of Engineering at UC Irvine.
In 2000, Dr. Samueli was awarded the University of California Presidential Medal, the UC Irvine Medal, the IEEE Circuits and Systems Society Industrial Pioneer Award, as well as the UCLA School of Engineering and Applied Science Alumnus of the Year. Dr. Samueli was elected a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2000, a member of the National Academy of Engineering in 2003, and a Fellow of the American Academy of Arts and Sciences in 2004. In 2005, he was awarded an Honorary Doctor of Science degree from the Technion-Israel Institute of Technology, and the Edward A. Dickson Alumnus of the Year from UCLA. In 2006, he received the IEEE Communications Society Distinguished Industry Leaders Award, and in 2010 he received the UCLA Medal.
Henry and his wife Susan are active philanthropists, having created the Samueli Foundation after Broadcom’s IPO in 1998. The Samueli’s also own the Anaheim Ducks National Hockey League club, which won the Stanley Cup Championship in 2007.
Broadcom has previously won 15 GSA awards and is nominated for two awards at this year’s GSA Awards Dinner Celebration.
The dinner is made possible by title sponsor TSMC, VIP sponsor NASDAQ OMX and networking reception sponsor GLOBALFOUNDRIES, as well as general sponsors Advantest, Amkor, ARM, ASE Group, Barclays, Broadcom, Cadence Design Systems, CSR, Dialog Semiconductor, GLOBALFOUNDRIES, IBM, Integrated Device Technology, J.P. Morgan, KPMG, Magnachip, Marvell, Model N, Morgan Stanley, Needham, NVIDIA, NetLogic Microsystems, PWC, QUALCOMM CDMA Technologies, Samsung and UMC.
NFC Forum chooses Broadcom's NFC solutions to validate certification test bed
CHICAGO, USA: Broadcom Corp. announced a partnership with the NFC Forum to help develop a new NFC certification test suite based on Broadcom technology. NFC Forum's official certified test tools will leverage Broadcom's recently introduced BCM2079x NFC family of products as the benchmark for validation.
The NFC Forum Certification Program provides device manufacturers with a means of establishing that their products conform to the NFC Forum's published specifications. The NFC Forum test tools will be used to ensure compliance and interoperability of future NFC products and solutions. In addition, companies can place the NFC Forum N-Mark on the device indicating the touch point to trigger NFC services, can be included in the NFC Forum's certified product register, and gain global credibility.
To further educate the mobile ecosystem on the importance of standards and the NFC Forum certification process, Mohamed Awad, member of the NFC Forum board of directors and associate product line director for NFC products at Broadcom, will participate in a session, NFC Forum Certification: The Key to Interoperable Innovation, at the NFC Summit at 4G World 2011. His session will address common questions including what certification is, what it entails, why it matters and the benefits of being certified.
The NFC Forum Certification Program provides device manufacturers with a means of establishing that their products conform to the NFC Forum's published specifications. The NFC Forum test tools will be used to ensure compliance and interoperability of future NFC products and solutions. In addition, companies can place the NFC Forum N-Mark on the device indicating the touch point to trigger NFC services, can be included in the NFC Forum's certified product register, and gain global credibility.
To further educate the mobile ecosystem on the importance of standards and the NFC Forum certification process, Mohamed Awad, member of the NFC Forum board of directors and associate product line director for NFC products at Broadcom, will participate in a session, NFC Forum Certification: The Key to Interoperable Innovation, at the NFC Summit at 4G World 2011. His session will address common questions including what certification is, what it entails, why it matters and the benefits of being certified.
EV Group launches ZoneBOND capable equipment and open platform for temporary bonding materials
ST. FLORIAN, AUSTRIA: EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, has launched a suite of groundbreaking temporary bonding and debonding (TB/DB) equipment modules that support ZoneBOND technology.
In parallel, EVG has opened its TB/DB equipment platform to enable the use of a wide range of adhesives from various suppliers to give customers the most flexible choice of bonding materials. The announcement comes on the heels of last week's agreement between EV Group and Brewer Science, which allows both companies to commercialize ZoneBOND technology.
EVG's new EZR and EZD modules can be easily integrated in EVG's high-volume manufacturing equipment platforms such as the EVG®850 Series automated temporary bonding and debonding systems. The new EVG EZR (Edge Zone Release) and EZD (Edge Zone Debond) modules will begin shipping to industrial customers before the end of 2011.
Fraunhofer IZM ASSID (All Silicon System Integration Dresden), a world leader in advanced semiconductor R&D, already received EZR and EZD modules earlier this year for ZoneBOND processes and materials qualification as part of a joint development agreement with EVG.
In an equally important move, EVG will, through an open materials platform approach, establish a stronger supply chain for its market leading TB/DB technologies. EVG plans to qualify a wide range of adhesives from various materials suppliers for the ZoneBOND process. In support of this effort, EVG has defined standard test procedures that allow for fast and reliable qualification of additional adhesives.
EVG will disclose the initial, new materials suppliers supporting the ZoneBOND process shortly.
"Integrating ZoneBOND technology into our field-proven, high-volume temporary bonding/debonding platform is an important part of EVG's efforts to not only ensure our customers have access to the most advanced technology available, but also to continue driving the commercialization of 3D ICs," stated Markus Wimplinger, corporate technology development and IP director for EVG. "A key advantage of our EZR and EZD modules is their ability to support a variety of adhesive materials, which in turn, provides our customers with increased flexibility during thin wafer processing."
In parallel, EVG has opened its TB/DB equipment platform to enable the use of a wide range of adhesives from various suppliers to give customers the most flexible choice of bonding materials. The announcement comes on the heels of last week's agreement between EV Group and Brewer Science, which allows both companies to commercialize ZoneBOND technology.
EVG's new EZR and EZD modules can be easily integrated in EVG's high-volume manufacturing equipment platforms such as the EVG®850 Series automated temporary bonding and debonding systems. The new EVG EZR (Edge Zone Release) and EZD (Edge Zone Debond) modules will begin shipping to industrial customers before the end of 2011.
Fraunhofer IZM ASSID (All Silicon System Integration Dresden), a world leader in advanced semiconductor R&D, already received EZR and EZD modules earlier this year for ZoneBOND processes and materials qualification as part of a joint development agreement with EVG.
In an equally important move, EVG will, through an open materials platform approach, establish a stronger supply chain for its market leading TB/DB technologies. EVG plans to qualify a wide range of adhesives from various materials suppliers for the ZoneBOND process. In support of this effort, EVG has defined standard test procedures that allow for fast and reliable qualification of additional adhesives.
EVG will disclose the initial, new materials suppliers supporting the ZoneBOND process shortly.
"Integrating ZoneBOND technology into our field-proven, high-volume temporary bonding/debonding platform is an important part of EVG's efforts to not only ensure our customers have access to the most advanced technology available, but also to continue driving the commercialization of 3D ICs," stated Markus Wimplinger, corporate technology development and IP director for EVG. "A key advantage of our EZR and EZD modules is their ability to support a variety of adhesive materials, which in turn, provides our customers with increased flexibility during thin wafer processing."
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