Xilinx Vivado design suite available in WebPACK edition

USA: Xilinx Inc. announced that its Vivado Design Suite is available in WebPACK Edition, giving designers immediate access to a no cost, device-limited version of the industry’s first SoC strength design environment.

Offered with the 2012.4 release of the Vivado Design Suite, WebPACK Edition provides the same IP and system-centric design flows of the Vivado Design Suite Design edition that enables up to 4x faster time to integration and implementation over alternatives.

“The WebPACK edition of Xilinx tools we’ve delivered over the years has proven to be very popular with design teams and universities with over 20,000 downloads per quarter,” said Tom Feist, Xilinx’s senior marketing director of design methodology.

“With the Vivado Design Suite 2012.4 release, we are now offering the enhanced productivity of the Vivado Design Suite to these customers and educational departments around the world.”

The Vivado Design Suite, WebPACK Edition is a free download that provides support for Artix-7 100T and 200T and Kintex-7 70T and 160T devices. The Vivado Design Suite, Design Edition is available at no additional cost to in warranty ISE Design Suite, Logic Edition and Embedded Edition customers, and Vivado Design Suite, System Edition with Vivado High-Level Synthesis is available at no additional cost to ISE Design Suite DSP and System Edition customers.

ON Semiconductor intros high-efficiency stepper motor driver IC for office automation equipment

USA: ON Semiconductor has introduced the LV8702V, a new stepper motor driver IC that delivers significantly improved efficiency versus existing products on the market. The device has been specifically designed for office automation equipment applications such as copiers, scanners and multi-function printers.

“The poor energy efficiency of stepper motors utilized in a wide range of electronics applications has for some time been an area of concern to communities the world over and a challenge to power system design engineers,” said Tsutomu Shimazaki, GM of power products for ON Semiconductor’s SANYO division.

“The LV8702V meets this challenge by providing a unique driving system that enables it to achieve no-load power consumption savings of up to 80 percent and a reduction in peak motor current of approximately 77 percent. This solution greatly assists our customers in the development of office automation electronics that meet the global demand for better energy efficiency.”

In addition to reducing overall power consumption, the LV8702V helps reduce heat generation, vibration and noise from the motor in applications such as positioning control in printers. Due to the increased efficiency, the surface temperature of the driver IC and the motor are decreased by up to 46ºC and 28ºC, respectively.

This can overcome the need for cooling fans with the corresponding space and cost savings and enhanced system reliability. The LV8702V stepper motor driver IC detects motor condition through driver waveform monitoring; power consumption is reduced by automatically reducing the current value according to the rotation speed or load of the motor. The new device has an operating voltage range of 9 volts (V) to 32 V. Protection features include output short protection, a thermal shutdown function and a step-out detection function.

The LV8702V joins ON Semiconductor’s AMIS30542/43/22/12 family of highly intelligent stepper motor control solutions with sensor-less motor feedback. This portfolio of product offerings provide designers with cost effective, leading edge performance for a broad range of applications and drive current.  Advanced functions such as stall detection, step-loss, and current drive optimization are now simple to integrate into applications where cost may have previously precluded ‘high-end’ motor control.

The LV8702V is offered in a SSOP44J package measuring 5.6 mm by 15 mm. The device is budgetary priced at $6 per unit for orders in quantities of 2,000 units.

MOS-AK/GSA modeling working group holds winter workshop in San Francisco

USA: The MOS-AK/GSA Working Group, a global compact modeling standardization forum, has delivered their 5th international compact modeling workshop, organized on Dec. 12, 2012 in the time frame of the IEDM Conference in San Francisco.

The event was organized at swissnex receiving full sponsorship provided by leaders in electronic design automation including Agilent Technologies and Mentor Graphics. The FP7 COMMON Project, Eurotraining, and MOSIS Services were among the workshop technical program promoters. More than 40 international academic researchers and modeling engineers attended two sessions to hear 11 technical compact modeling talks.

The workshop’s two sessions focused on the advances in compact modeling for analog/RF IC design application, computer-aided design (CAD), EDA simulations highlighting recent developments of Verilog-A compact models and its standardization.

The speakers discussed: “Scaling Challenges of Analog Electronics” (Mustafa Badaroglu, IMEC); “Interactive Modeling and Online Simulation Platform” (Mansun Chan, HKUST); “Nonlinear Device Modeling With Scalable X-Parameters” (David E. Root, Agilent), “PSP Model Update” (Gert-Jan Smit, NXP); “Global Geometrical Scaling in BSIM6” (Yogesh S. Chauhan, IIT Kanpur); “KLU and PSS Implementations in NGSPICE” (Francesco Lannutti, NGSPICE), “GCC Front-End of Compact Modeling Verilog-AMS Language” (Laurent Lemaitre, Noovela); “SPICE Modeling of STT-RAM for Resilient Design” (Zihan Xu, ASU); “Modeling and Parameter Extraction of Zero-VT MOSFETs for Ultra-low-Voltage Operation” (Carlos Galup-Montoro, FUSC); “Charge Trapping Phenomena in MOSFETs” (Gilson Wirth, UFRGS), and “Consistent Parameter Extraction Using Different MOSFET Models” (Luiz Alberto Pasini Melek, FUSC).

The compact modeling panel discussion moderated by Larry Nagel concluded the MOS-AK/GSA workshop. Invited international academic researchers and modeling engineers reviewed the status of compact modeling standardization and agreed that the Verilog-A standard offers a unique platform for compact model developments, validation, exchange and implementation into commercial as well as open source CAD/EDA tools.

The panelists also pointed out the needs of further Verilog-A standard extensions and broader Verilog-AMS language definitions to better support compact device modeling, in particular focusing on Analog/RF noise applications. It is also expected that open source developers will actively contribute to standards promotion, addressing the challenges of related CAD/EDA software developments, such as Verilog-AMS debuggers supporting new model validations; and full featured, integral Verilog-AMS simulators for semiconductor device model benchmarking.

Worldwide wafer fab equipment spending to decline 9.7 percent in 2013

USA: Worldwide wafer fab equipment (WFE) spending is forecast to total $27 billion in 2013, a 9.7 percent decline from 2012, according to Gartner Inc. In 2012, WFE spending is on pace to reach $29.9 billion, a decrease of 17.4 percent from 2011 spending. The market is projected to return to growth in 2014.

Gartner said that the outlook for semiconductor equipment markets has softened due to macroeconomic weakness and that capital investment is expected to remain flat over the forecast period as memory and logic segments invest countercyclically to each other.

"In 2012, wafer fab equipment started off the year strong, as foundries and other logic manufacturers ramped up sub-30-nanometer production. The need for new equipment was stronger than originally anticipated, because strengthening demand for leading-edge devices required higher production volumes as yields had yet to reach mature levels," said Bob Johnson, research vice president at Gartner.
"However, demand for new equipment for logic production will soften as yields improve, leading to declining shipment volumes as the industry heads into 2013."

Gartner predicts that wafer fab manufacturing capacity utilization will decline below 80 percent by the end of 2012 before slowly increasing to about 85 percent by the end of 2013. Leading-edge utilization declined to the mid-80-percent range by the second half of 2012 and will move into the low-90-percent range by the end of 2013, providing for a somewhat positive capital investment environment.

Memory will continue to be weak through 2013, with maintenance-level investments for DRAM and a slightly down NAND market until supply and demand are in balance. 2014 begins a WFE growth cycle that is expected to last through 2016.

"Although a period of inventory correction that led to lowered production levels in the first half of 2012 appears to be over, inventories remain at critical levels. High inventories, combined with overall market weakness, will continue to depress utilization rates into the first half of 2013," said Johnson.

"While demand from smartphones and media tablets is producing leading-edge demand for logic production, it is not enough to bring total utilization levels up to desired levels," Johnson said. "Utilization rates will begin to climb upward again in the second quarter of 2013, as demand for chip production returns and capital spending restraints in the second half of 2012 and first half of 2013 slow new capacity additions. Overall utilization rates will return to normal levels by the end of 2013, providing continued impetus for capital investment."

The capital spending outlook has softened significantly since earlier forecasts as the rapidly decelerating macroeconomy has taken its toll on consumer spending and the resulting trickle-down effect has impacted capital spending. Gartner now expects 2012 capital spending to decline 10.7 percent, compared with a 9.3 percent drop forecast in the third quarter of 2012. Capital spending is expected to drop an additional 14.7 percent in 2013 as semiconductor manufacturers deal with excess capacity and a slow macroeconomy.

The foundry segment will see an increase in spending of about 7.4 percent next year, as both integrated device manufacturers (IDMs) and semiconductor assembly and test services (SATS) providers realize significant spending declines. Beyond 2013, memory and logic spending are expected to align, with substantial increases in 2014 followed by a flat to slightly positive 2015.

Driven by the increase in mobile devices, logic spending is the only positive driver for capital investment in 2012, increasing about 3 percent over 2011. This is driven by aggressive investment of the few top players, which are ramping up production at the sub-30-nanometer nodes.

North American semiconductor equipment industry posts Nov. 2012 book-to-bill ratio of 0.79

USA: North America-based manufacturers of semiconductor equipment posted $720.4 million in orders worldwide in November 2012 (three-month average basis) and a book-to-bill ratio of 0.79, according to the November Book-to-Bill Report published today by SEMI. A book-to-bill of 0.79 means that $79 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in November 2012 was $720.4 million. The bookings figure is 3.0 percent lower than the revised October 2012 level of $742.8 million, and is 26.3 percent lower than the November 2011 order level of $977.2 million.

The three-month average of worldwide billings in November 2012 was $911.9 million. The billings figure is 7.5 percent lower than the revised October 2012 level of $985.5 million, and is 22.5 percent less than the November 2011 billings level of $1.18 billion.

"Economic headwinds, higher chip inventory levels, and soft PC demand are among the factors tempering chip makers’ investment in additional manufacturing capacity," said Denny McGuirk, president and CEO of SEMI. "Softening in the market for new semiconductor manufacturing equipment has persisted through the second half of 2012 and the November equipment billings are at a three-year low."

HDL Design House MIPI M-PHY and D-PHY solutions available in 40nm and 65nm

SERBIA: HDL Design House, provider of high performance digital and analog IP cores and SoC design and verification services, today announced availability of MIPI M-PHY and D-PHY solutions in advanced technology nodes.

MIPI M-PHY and D-PHY solutions are fully compliant with the MIPI Alliance M-PHY and D-PHY specifications version 1.0, as the latest addition to HDL Design House FlexIP core library. These IP solutions can be combined with HDL Design House MIPI DSI and CSI-2 IP cores. As a MIPI Alliance Contributor member since 2010, HDL Design House offers high quality, silicon proven M-PHY and D-PHY solutions, available in 40nm and 60nm.

HDL Design House MIPI D-PHY is a high speed serial interface used for communication between components inside a mobile device. MIPI D-PHY can be used for point-to-point serial communications in high speed links like serial display interfaces (DSI), serial camera interfaces (CSI) and MIPI UniPro based module.

The D-PHY Link includes a high speed signaling mode for both fast data traffic and low power signaling mode for control signal purposes. The D-PHY configuration consists of one Clock Lane and up to 4 Data Lanes, and the number of Data Lanes is configurable.

Each Lane consists of an analog front end to generate electrical levels, detects signals from interconnects and translates them into digital values and control and interface logic to control I/O functions. It supports PPI (PHY Protocol Interface), and bandwidth ranges from 800 Mbps to 1 Gbps per lane depending on the process node.

HDL Design House MIPI M-PHY is a high frequency, low power IP compliant with the MIPI Alliance Standard for M-PHY version 1.0. It can be used as Physical Layer for interfaces such as camera, display, audio, video, power management and communication between BB (Base Band) and RFIC.

MIPI M-PHY supports two modes: HS (High Speed) and PWM LS (Pulse Width Modulation Low Speed), and power efficiency throughput is ensured by using burst mode. It supports both optical and electrical interfaces and multiple power saving modes. HDL Design House MIPI M-PHY can ensure data rates from 10Mbps up to 6Gbps.

HDL Design House D-PHY IP core can be used in tandem with MIPI DSI and CSI IP cores. HDL Design House MIPI M-PHY IP core can be combined with UniPro, LLI and DigRF digital controllers, also available from HDL Design House FlexIP core library.

Mentor's Nucleus Innovate program adds boards from ST to accelerate start-up development

USA: Mentor Graphics Corp. announced its Mentor Embedded Nucleus® Innovate Program has added board support for STMicroelectronics devices.

The Nucleus Innovate Program is designed to help businesses with less than $1 million in annual revenue kick-start their embedded development projects. Qualified companies can accelerate their embedded system development with software provided at no cost, including the Nucleus Real Time Operating System (RTOS), the popular Sourcery CodeBench GNU toolchain, and now, ARM-based board support packages (BSPs) for STMicroelectronics devices.

Mentor’s board support packages suit the STMicroelectronics STM32F103, STM32F105/7, STM32F205/7 and STM32L152 device families. This broad range of microcontrollers, from a global semiconductor leader and top supplier of ARM Cortex-M MCUs, target applications such as metering, audio, medical, gaming, telecommunications and networking. When combined with the Nucleus ReadyStart platform, embedded developers have a complete embedded environment to develop their system designs with greater efficiency and productivity.

“STMicroelectronics appreciates Mentor’s investment in technology start-ups and we are pleased that Mentor has chosen to include the outstanding STM32 family of MCUs in its Nucleus Innovate Program,” stated Michel Buffa, GM, Microcontroller Division, STMicroelectronics.
“We are proud to help Mentor so they can provide entrepreneurs with free embedded development software and BSPs to help these companies launch new and innovative products. This partnership is part of our global Ecosystem development fostering innovation and the spread of ST solutions.”

The Nucleus Innovate Program is ideal for applications where small footprint, high-performance, and low power matter. Customers using 32-bit MCUs, as well as single or dual-core processors, can use the Nucleus RTOS and Mentor Embedded tool capabilities. Easy-to-use demonstrations and configurations help shorten development time for medical, industrial, automotive and consumer applications—from days to minutes.

“The Nucleus Innovate Program demonstrates our shared commitment with ST for embedded product innovation targeting start-ups and other small companies,” said Scot Morrison, GM of runtime solutions, Mentor Graphics Embedded Software Division. “By offering our proven technologies to these companies at no cost, we are facilitating growth in embedded development to help our customers compete in today’s global economy.”

Dual-supply, high-precision opamp for front-end amplifier apps

USA: Analog Devices Inc. (ADI) introduced a high precision amplifier offering the industry’s best combination of offset voltage, voltage thermal drift, bandwidth, slew rate and voltage noise for front-end amplifier circuits.

The ADA4077-2 operational amplifier is specifically suited for applications in process control, chemical and environmental monitoring, motor control and electronic test and instrumentation due to its high DC precision with noise, speed and supply current applicable for the designs.

The ADA4077-2 has a typical bandwidth of 3.9 MHz and 7-nV/ÖHz voltage noise at 1 kHz while consuming only 400 µA typical at 25°C with ±15-Vdc nominal power supplies. Available in two grades for offset and thermal drift, the device provides design engineers with the flexibility to meet budget and packaging requirements.

Compared to its closest competition, the ADA4077-2 offers higher speed with lower noise, offset and drift while consuming less power, making the ADA4077-2 an ideal, cost-effective op amp for use in front end sensor interfaces in applications such as process control input modules, where high accuracy, precision, and linearity are critical to accurate measurement of sensor output.

ADA4077-2 Precision Operational Amplifier Key Features:
• Low offset voltage: 25µV maximum (B-Grade).
• Low offset voltage drift: 0.25 µV/°C maximum (B-Grade).
• Low input bias current: <1 .0=".0" maximum.="maximum." na="na" p="p">• Input voltage range: V- +1.2 V to V+ -2 V.
• Low noise: 7 nV/√Hz typical.
• Low supply current: 400 µA per amplifier typical.
• Specified for dual voltage supply operation from ±5 V to ±15 V.

Sitara ARM processors launch support for Android 4.1.2 Jelly Bean

USA: Texas Instruments Inc. (TI) announced the availability of a new development kit that brings Android 4.1.2 ("Jelly Bean") to TI's Sitara ARM AM335x Cortex-A8 processors.

This complete software offering allows innovators to fully evaluate Android 4.1.2 on embedded applications running on TI's Sitara processors for easier navigation that is up to two times faster than the previous version of Android.

Sitara ARM developers can now take advantage of Android 4.1.2 for feature-rich, low-power applications, including wearable gadgets such as watches, goggles, display panels for home appliances and automation, enterprise tablets, point-of-sale terminals, portable navigation devices and industrial automation.

Faster, smoother and more responsive
Complete with pre-integrated connectivity and 3D graphics capabilities, the Android 4.1.2 Development Kit provides a stable software foundation for Sitara AM335x processor-based products.

To help developers quickly and easily integrate and evaluate Android-based applications, the development kit is fully tested using the Android compatibility test suite on the AM335x evaluation module (EVM), AM335x Starter Kit and BeagleBone development boards, and a number of BeagleBone Cape Plug-in Boards such as the LCD7 Cape, DVI-D Cape and Camera Cape.

TI's Android 4.1.2 Development Kit also features:
* Integrated Android Open Accessory protocol support, allowing connectivity to any Android-based accessory with AM335x products.
* Haptics feedback, accelerometer, and ambient light sensors.
* Soft navigation keys, supported on landscape displays to help customers build products without any mechanical keys on-board.
* Multiple USB features, including USB pen drive support and USB-based camera capture and preview.
* 3D graphics using Imagination Technologies' POWERVR SGX OpenGL accelerator drivers and libraries.
* Application notes, guides and test results to help developers with their designs.

"Android 4.1.2 offers a faster and easier interface that makes transitions between applications smoother and the latest graphics effects stand out," said Adrian Valenzuela , marketing director, Sitara ARM processors, TI. "This enables developers who are leveraging Sitara's AM335x processors to create robust embedded applications for better user experiences."

The Android 4.1.2 Development Kit for TI's Sitara ARM Cortex-A8 processors is available for free download today, with no development or production restrictions.

Renesas releases USB-IF certified USB 3.0 hub controller

JAPAN & USA: Renesas Electronics Corp. announced that its latest Universal Serial Bus 3.0 (USB 3.0) hub controller (part number uPD720210) has passed USB 3.0 compliance and certification testing by the USB Implementers Forum (USB-IF).

It is one of the world’s first USB 3.0 hub controllers to achieve this recognition, following Renesas’ world’s first USB 3.0 host controller certification in 2009.

The “Certified SuperSpeed USB (USB 3.0)” certification from the USB-IF offers manufacturers and consumers the assurance that the device will function in accordance with the specification and will interoperate with the billions of USB-enabled devices that exist in the market today.

Renesas has continued its effort to create USB certified devices, including its world's first certified USB 3.0 xHCI (eXtensive Host Controller Interface) controller (part number uPD720200), its three descendants, and a USB 3.0 SATA bridge (part number uPD720230). Renesas Electronics now offers six USB-IF-certified USB 3.0 products, which will pave the way for the swell of industry support for the USB 3.0 standard.

Samples of Renesas Electronics' USB-IF-certified uPD720210 hub controller are available now, priced at $3.50 per unit.

1HDec NAND flash prices drop by 1-2 percent, mild downtrend to continue to January

TAIWAN: According to DRAMeXchange, a research division of TrendForce, although the year-end peak replenishment period for system products has passed, with NAND Flash manufacturers continuing to undertake production cuts for retail markets,1HDec NAND Flash contract prices have dipped by approximately1-2 percent compared to the amount in 2HNov.

While SK Hynix experienced a temporary power shortage on 12/11, the company's NAND Flash business and production, on the whole, remain unaffected. The spot prices, as such, experienced a mild increase, although overall demand for NAND Flash is still relatively weak. With regards to the market, given that most of the smartphone and tablet makers' peak replenishment efforts for Christmas took place during late November and early December, and factoring in the potential effects of the year-end settlement and inventory-related issues, buyer momentum and demand within the market have been relatively tepid.

Prices, on the other hand, are stable in 1HDec, given that NAND Flash manufacturers have been increasing the proportion of system products shipped, and that shipments related to retail market products are continuing to undergo reductions.

Looking ahead, numerous NAND Flash clients are displaying a bearish attitude towards the sales performance of the Chinese New Year, and plan to remain conservative until the European and US market results are revealed.

As market demand gradually weakens following December, even with the NAND Flash vendors' cautious supply control strategies, TrendForce predicts the partially stable, partially mild downtrend associated with NAND Flash prices to remain unchanged.

Conexant launches high-definition voice capture IC

USA: Conexant Systems Inc. announced the CX20810, its new high-performance, high-definition voice capture IC targeted to voice interactive products, voice conferencing systems, Skype TV/STB webcam, and surveillance.

The CX20810 is the industry’s first high-performance audio analog to digital converter (ADC) with pre-amp, which maximizes the signal-to-noise ratio of a microphone’s input path with a constant, low gain across a long range (up to five meters).

This latest offering from Conexant complements its portfolio of turnkey Far-Field Voice Input Processor SoC solutions. For designers with existing systems running voice processing algorithms, the CX20810 helps them unleash the system’s true performance potential.

Traditional microphone ADCs with limited dynamic range require dynamic adjustment of the PGA gain to avoid either saturation of the speech signal, or degradation of its signal-to-noise ratio (SNR) due to the high ADC self-noise floor. Addressing this issue, the CX20810 has a significant dynamic range of 106dB and maximizes the signal quality to avoid saturation while maintaining the SNR from the microphone.

When used in an acoustic echo cancellation (AEC) system, the CX20810 maintains the SNR of a low-level voice signal while avoiding echo saturation and therefore captures the full scale speech signal without the saturation caused by high echo feedback.

“There are a broad range of voice interactive and audio capturing devices entering the consumer electronics market,” noted Saleel Awsare, VP and GM, Conexant.

“In light of this, designers must carefully select the A to D converter that best matches their particular system in order to deliver the intended user experience. Our new high-performance audio ADC with pre-amp removes system bottlenecks and eliminates audio signal artifacts caused by saturation.”

Conexant’s CX20810 features high resolution digital and analog gain control over a wide range – allowing for the selection of an optimum operating point for microphones with a wide range of sensitivity. A smooth gain ramping circuit enables the dynamic adjustment of microphone gain. The CX20810 supports a microphone array with up to four synchronized ADCs and programmable preamplifiers, each with a dedicated microphone bias supply to eliminate crosstalk.