SANTA CLARA & BOISE, USA: Intel Corp. and Micron Technology, Inc. announced the world's first 25-nanometer (nm) NAND technology, which provides a more cost-effective path for increasing storage capacity in such popular consumer gadgets as smartphones, personal music and media players (PMPs), as well as the new high-performance class of solid-state drives (SSDs).
NAND flash memory stores data and other media contained in consumer electronics products, retaining information even when the power is turned off. The drive toward smaller NAND processes enables the continued development and introduction of new uses for the technology. Not only is the 25nm process the smallest NAND technology, it is also the smallest semiconductor technology in the world – a technological accomplishment that continues the advancement of more music, video, and other data in today's consumer electronics and computing applications.
Manufactured by IM Flash Technologies (IMFT), Intel and Micron's NAND flash joint venture, the 25nm process produces 8 gigabytes (GB) of storage in a single NAND device, creating a high-capacity storage solution for today's tiny consumer gadgets. It measures just 167mm2 -- small enough to fit through the hole in the middle of a compact disc (CD), yet packs more than 10 times the data capacity of that CD (a standard CD holds 700 megabytes of data).
With a committed focus and investment in NAND research and development, Intel and Micron have doubled NAND density roughly every 18 months, which leads to smaller, more cost-efficient and higher capacity products. Intel and Micron formed IMFT in 2006, starting production with a 50nm process, followed by a 34nm process in 2008.
With today's 25nm process, the companies are extending their process and fabrication leadership further with the introduction of the smallest semiconductor lithography available in the industry.
"To lead the entire semiconductor industry with the most advanced process technology is a phenomenal feat for Intel and Micron, and we look forward to further pushing the scaling limits," said Brian Shirley, vice president of Micron's memory group. "This production technology will enable significant benefits to our customers through higher density media solutions."
"Through our continued investment in IMFT, we're delivering leadership technology and manufacturing that enable the most cost-effective and reliable NAND memory," said Tom Rampone, vice president and general manager, Intel NAND Solutions Group. "This will help speed the adoption of solid-state drive solutions for computing."
The 25nm, 8GB device is sampling now and is expected to enter mass production in the second quarter of 2010. For consumer electronics manufacturers, the device provides the highest-density in a single 2 bits-per-cell multi-level cell (MLC) die that will fit an industry-standard, thin small-outline package (TSOP). Multiple 8GB devices can be stacked in a package to increase storage capacity.
The new 25nm 8GB device reduces chip count by 50 percent compared to previous process generations, allowing for smaller, yet higher density designs and greater cost efficiencies. For example, a 256GB solid-state drive (SSD) can now be enabled with just 32 of these devices (versus 64 previously), a 32GB smartphone needs just four, and a 16GB flash card requires only two.
Monday, February 1, 2010
Virage Logic’s 45nm and 28nm SiWare memory compilers automatically support Calypto’s PowerPro MG tool
SANTA CLARA, USA: Calypto Design Systems Inc., the leader in sequential analysis technology, announced that Virage Logic’s 45-nanometer (nm) and 28nm SiWare Memory compilers now automatically generate PowerPro MG power optimization models for reducing System-on-Chip (SoC) embedded memory power.
This support is the result of a close, ongoing collaboration between the two companies to dramatically reduce on-chip SoC memory power. Using PowerPro MG, designers can reduce both dynamic and leakage memory power, resulting in up to 80 percent memory power reduction compared to previous implementations.
“We are working with Calypto to maximize the opportunity for on-chip memory power savings and enable designers to very easily take advantage of the low-power modes offered by Virage Logic’s industry-leading SiWare Memory compilers,” said Brani Buric, executive vice president, marketing and sales, of Virage Logic.
“The combination of PowerPro MG and our SiWare Memory products allows us to deliver a fully automated, world-class solution to our customers, enabling them to produce the most power-efficient designs possible in the most advanced process nodes available.”
Virage Logic delivers memory compilers that enable SoC designers to explore the tradeoffs between performance, area, power and statistical yield to generate optimal memory configurations. The latest release of the 45nm and 28nm SiWare Memory compliers will now automatically generate PowerPro MG models. This enables design teams to easily integrate PowerPro MG into their fully automated design flows to reduce both dynamic and leakage memory power.
“Power remains the number one SoC design consideration today and on-chip memory power can account for up to 70 percent of the power consumed in an SoC,” said Tom Sandoval, chief executive officer of Calypto. “The automatic creation of the PowerPro MG memory model by Virage Logic’s SiWare Memory compilers is a great example of how innovative companies are working together to solve some of the most difficult problems SoC designers face.”
Using Calypto’s patented sequential analysis technology, PowerPro MG constructs new memory gating logic that works in conjunction with the low-power memory modes to produce the lowest power memory implementation possible.
PowerPro MG then generates new power-optimized RTL that looks identical to the original RTL except for the addition of the new memory gating logic. PowerPro MG reduces dynamic power by automatically generating logic that controls the memory enable signal and eliminates unnecessary memory accesses. PowerPro MG reduces leakage power by automatically generating logic that controls the sleep modes of individual embedded memories.
Available now, Calypto’s PowerPro MG runs on PC platforms running Linux and is priced at $295K for a one year time based license.
This support is the result of a close, ongoing collaboration between the two companies to dramatically reduce on-chip SoC memory power. Using PowerPro MG, designers can reduce both dynamic and leakage memory power, resulting in up to 80 percent memory power reduction compared to previous implementations.
“We are working with Calypto to maximize the opportunity for on-chip memory power savings and enable designers to very easily take advantage of the low-power modes offered by Virage Logic’s industry-leading SiWare Memory compilers,” said Brani Buric, executive vice president, marketing and sales, of Virage Logic.
“The combination of PowerPro MG and our SiWare Memory products allows us to deliver a fully automated, world-class solution to our customers, enabling them to produce the most power-efficient designs possible in the most advanced process nodes available.”
Virage Logic delivers memory compilers that enable SoC designers to explore the tradeoffs between performance, area, power and statistical yield to generate optimal memory configurations. The latest release of the 45nm and 28nm SiWare Memory compliers will now automatically generate PowerPro MG models. This enables design teams to easily integrate PowerPro MG into their fully automated design flows to reduce both dynamic and leakage memory power.
“Power remains the number one SoC design consideration today and on-chip memory power can account for up to 70 percent of the power consumed in an SoC,” said Tom Sandoval, chief executive officer of Calypto. “The automatic creation of the PowerPro MG memory model by Virage Logic’s SiWare Memory compilers is a great example of how innovative companies are working together to solve some of the most difficult problems SoC designers face.”
Using Calypto’s patented sequential analysis technology, PowerPro MG constructs new memory gating logic that works in conjunction with the low-power memory modes to produce the lowest power memory implementation possible.
PowerPro MG then generates new power-optimized RTL that looks identical to the original RTL except for the addition of the new memory gating logic. PowerPro MG reduces dynamic power by automatically generating logic that controls the memory enable signal and eliminates unnecessary memory accesses. PowerPro MG reduces leakage power by automatically generating logic that controls the sleep modes of individual embedded memories.
Available now, Calypto’s PowerPro MG runs on PC platforms running Linux and is priced at $295K for a one year time based license.
Samsung develops most advanced green DDR3 DRAM using 30nm-class technology
SEOUL, SOUTH KOREA: Samsung Electronics Co. Ltd, the world leader in advanced semiconductor technology solutions, announced that the industry’s first 30nm class DRAM has just successfully completed customer evaluations, in two gigabit (Gb) densities.
With DDR3 SDRAM becoming the predominant main memory this quarter, Samsung’s aggressive advancement in process technology will raise productivity and expedite dissemination of high performance, 1.5V and 1.35V DDR3 for servers, desktops and notebook PCs.
“Our accelerated development of next generation 30nm-class DRAM should keep us in the most competitive position in the memory market,” said Soo-In Cho, president, Memory Division, Samsung Electronics.
He added, “Our 30nm-class process technology will provide the most advanced low-power DDR3 available today and therein the most efficient DRAM solutions anywhere for the introduction of consumer electronics devices and server systems.”
The 30nm-class process when applied to DDR3 mass production raises productivity by 60 percent over 40nm-class DDR3. This will result in a doubling of production cost-efficiency compared to DRAM produced using 50nm to 60nm-class technology.
The 30nm-class 2Gb, Green DRAM reduces power consumption by up to 30 percent over 50nm-class DRAM. A 4-Gigabyte (GB), 30nm module when used in a new-generation notebook will consume only three watts per hour, which is just three percent of the total power usage of a notebook.
The new DDR3 will be used in a broader range of products, from servers to notebooks, desktops, and future versions of netbooks and mobile devices.
The 30nm-class DDR3 is scheduled for mass production in the second half of this year.
With DDR3 SDRAM becoming the predominant main memory this quarter, Samsung’s aggressive advancement in process technology will raise productivity and expedite dissemination of high performance, 1.5V and 1.35V DDR3 for servers, desktops and notebook PCs.
“Our accelerated development of next generation 30nm-class DRAM should keep us in the most competitive position in the memory market,” said Soo-In Cho, president, Memory Division, Samsung Electronics.
He added, “Our 30nm-class process technology will provide the most advanced low-power DDR3 available today and therein the most efficient DRAM solutions anywhere for the introduction of consumer electronics devices and server systems.”
The 30nm-class process when applied to DDR3 mass production raises productivity by 60 percent over 40nm-class DDR3. This will result in a doubling of production cost-efficiency compared to DRAM produced using 50nm to 60nm-class technology.
The 30nm-class 2Gb, Green DRAM reduces power consumption by up to 30 percent over 50nm-class DRAM. A 4-Gigabyte (GB), 30nm module when used in a new-generation notebook will consume only three watts per hour, which is just three percent of the total power usage of a notebook.
The new DDR3 will be used in a broader range of products, from servers to notebooks, desktops, and future versions of netbooks and mobile devices.
The 30nm-class DDR3 is scheduled for mass production in the second half of this year.
NEC and Renesas announce new executive team following merger
KAWASAKI & TOKYO, JAPAN: NEC Electronics Corp. and Renesas Technology Corp. announced candidates of the executive team that will be in place following the business integration on April 1, 2010 (scheduled). All candidates of the new executive team at the new integrated company, to be called Renesas Electronics Corporation, are listed in Exhibit 1.
Susumu Furukawa, who is well-versed in the high-tech field and has extensive experience in global business, has been newly appointed to take the role of the remaining outside director position of Renesas Electronics, effective as of April 1, 2010. Please see Exhibit 2 for a brief biography of the newly appointed outside director, Furukawa.
NEC Electronics and Renesas Technology also announced their plan to consolidate the companies’ domestic sales operations into Renesas Technology Sales Co. Ltd, whose name will change to Renesas Electronics Sales Co. Ltd in accordance with the merger. Please see Exhibit 3 for a list of the newly appointed executives of Renesas Electronics Sales Co. Ltd, scheduled to launch April 1, 2010.
In addition to the above, NEC Electronics and Renesas Technology appointed the representatives and announced the names of the foreign sales subsidiaries of Renesas Electronics Corporation (effective as of April 1, 2010) to coincide with the Merger. Please refer to Exhibit 4 for more details.
Finally, the names of the existing foreign manufacturing subsidiaries of NEC Electronics will be changed following the Merger. Please refer to Exhibit 5 for more details.
Note: The Business Integration will become effective following the adoption of the resolutions at the Extraordinary General Meetings of Shareholders of both NEC Electronics and Renesas Technology and approval by relevant authorities of NEC Electronics and Renesas Technology.
Susumu Furukawa, who is well-versed in the high-tech field and has extensive experience in global business, has been newly appointed to take the role of the remaining outside director position of Renesas Electronics, effective as of April 1, 2010. Please see Exhibit 2 for a brief biography of the newly appointed outside director, Furukawa.
NEC Electronics and Renesas Technology also announced their plan to consolidate the companies’ domestic sales operations into Renesas Technology Sales Co. Ltd, whose name will change to Renesas Electronics Sales Co. Ltd in accordance with the merger. Please see Exhibit 3 for a list of the newly appointed executives of Renesas Electronics Sales Co. Ltd, scheduled to launch April 1, 2010.
In addition to the above, NEC Electronics and Renesas Technology appointed the representatives and announced the names of the foreign sales subsidiaries of Renesas Electronics Corporation (effective as of April 1, 2010) to coincide with the Merger. Please refer to Exhibit 4 for more details.
Finally, the names of the existing foreign manufacturing subsidiaries of NEC Electronics will be changed following the Merger. Please refer to Exhibit 5 for more details.
Note: The Business Integration will become effective following the adoption of the resolutions at the Extraordinary General Meetings of Shareholders of both NEC Electronics and Renesas Technology and approval by relevant authorities of NEC Electronics and Renesas Technology.
EPIC and Freescale enter into agreements to settle pending litigation
WOBURN, USA: EPIC Technologies Inc., a leading innovator of ChipsFirst semiconductor packaging technology, announced that EPIC and Freescale have entered into agreements to settle pending litigation that EPIC had brought against Freescale.
Under the parties’ confidential agreements, Freescale and EPIC have licensed each other’s patents, and Freescale has taken a license to EPIC’s ChipsFirst know-how. In addition, to facilitate widespread adoption of EPIC’s ChipsFirst technology and Freescale’s Redistributed Chip Packaging (RCP) technology, EPIC and Freescale have agreed to enable a combined patent licensing approach for semiconductor packaging subcontractors.
Under this approach, semiconductor packaging subcontractors can obtain through EPIC license rights to both EPIC’s ChipsFirst and Freescale’s RCP patents. EPIC's ChipsFirst technology may also be independently and exclusively licensed from EPIC.
Freescale’s RCP and EPIC’s ChipsFirst technologies are each covered by product and process patents, as well as several pending patent applications. The technologies are designed for use in rigorous and demanding semiconductor packaging applications.
EPIC’s CEO, James Kohl, commented, “We are pleased to have resolved this litigation, and we look forward to further licensing activity in the coming months."
Under the parties’ confidential agreements, Freescale and EPIC have licensed each other’s patents, and Freescale has taken a license to EPIC’s ChipsFirst know-how. In addition, to facilitate widespread adoption of EPIC’s ChipsFirst technology and Freescale’s Redistributed Chip Packaging (RCP) technology, EPIC and Freescale have agreed to enable a combined patent licensing approach for semiconductor packaging subcontractors.
Under this approach, semiconductor packaging subcontractors can obtain through EPIC license rights to both EPIC’s ChipsFirst and Freescale’s RCP patents. EPIC's ChipsFirst technology may also be independently and exclusively licensed from EPIC.
Freescale’s RCP and EPIC’s ChipsFirst technologies are each covered by product and process patents, as well as several pending patent applications. The technologies are designed for use in rigorous and demanding semiconductor packaging applications.
EPIC’s CEO, James Kohl, commented, “We are pleased to have resolved this litigation, and we look forward to further licensing activity in the coming months."
Applied Materials joins ISMI’s ESH Technology Center
AUSTIN, USA: The International SEMATECH Manufacturing Initiative (ISMI) announced that Applied Materials Inc. has become the newest member of the award-winning Environment, Safety and Health (ESH) Technology Center.
Applied will join leading semiconductor manufacturers in cooperative projects for sustainable manufacturing, industry environmental standards and green practices in chip-making.
“We’re pleased to welcome one of the leading equipment manufacturers to the world’s first world-wide R&D center dedicated to cost-effective, environmentally friendly semiconductor manufacturing,” said Ron Remke, ISMI’s ESH program manager and head of the Center. “We appreciate Applied Materials’ many contributions to the industry, and share its commitment to do what is good for business and the environment.”
“Applied Materials is excited about expanding our collaboration with ISMI and its member companies to enhance the industry’s sustainability initiatives,” said Bruce Klafter, senior director for EHS and Sustainability at Applied Materials. “Using technological innovation, action and commitment, we can work together to find solutions to improving the environmental performance of our products and processes.”
The EHS Technology Center was formed in 2009 to provide a broad-based, collaborative platform for developing better environmental practices for the industry, with goals of increasing efficiency and reducing costs in semiconductor operations. Open to all chipmakers and equipment and materials manufacturers, the Center’s membership currently represents more than half of the world’s semiconductor production.
Within the Center, hundreds of ESH experts and consultants from around the world will work closely with Applied Materials to develop data-driven solutions in areas such as energy and resource conservation, chemical management, and industry response to climate change.
“The Center is a prime example of ISMI’s collaborative model in which leading chipmakers and equipment and materials manufacturers can participate in a broad consortium-industry-university partnership to develop environmentally sustainable semiconductor manufacturing processes,” said Scott Kramer, vice president of manufacturing technology at SEMATECH.
Kramer added: “We’re bringing together world-class researchers and engineers from Applied Materials, ISMI, and the ESH Technology Center to find green solutions that improve productivity and lower costs while significantly reducing the environmental footprint of manufacturing operations.”
The Center is the industry’s first global collaborative research effort dedicated to finding and implementing the most cost-effective, environmentally friendly manufacturing processes and procedures. Participating companies share ideas and resources, while directing, evaluating, and refreshing the program portfolio.
Specific focus areas include:
* Energy and resource conservation
* Climate change and environmental impact
* Supply chain ESH alignment
* Chemical management and evolving regulatory initiatives
* ESH impacts of semiconductor materials, equipment, and processes
Last year, the Center received the 2009 CleanTech Award for green and clean technology, and the 2009 Lunar New Year Award from the Texas Asian Chamber of Commerce for pioneering eco-friendly industry standards.
Applied will join leading semiconductor manufacturers in cooperative projects for sustainable manufacturing, industry environmental standards and green practices in chip-making.
“We’re pleased to welcome one of the leading equipment manufacturers to the world’s first world-wide R&D center dedicated to cost-effective, environmentally friendly semiconductor manufacturing,” said Ron Remke, ISMI’s ESH program manager and head of the Center. “We appreciate Applied Materials’ many contributions to the industry, and share its commitment to do what is good for business and the environment.”
“Applied Materials is excited about expanding our collaboration with ISMI and its member companies to enhance the industry’s sustainability initiatives,” said Bruce Klafter, senior director for EHS and Sustainability at Applied Materials. “Using technological innovation, action and commitment, we can work together to find solutions to improving the environmental performance of our products and processes.”
The EHS Technology Center was formed in 2009 to provide a broad-based, collaborative platform for developing better environmental practices for the industry, with goals of increasing efficiency and reducing costs in semiconductor operations. Open to all chipmakers and equipment and materials manufacturers, the Center’s membership currently represents more than half of the world’s semiconductor production.
Within the Center, hundreds of ESH experts and consultants from around the world will work closely with Applied Materials to develop data-driven solutions in areas such as energy and resource conservation, chemical management, and industry response to climate change.
“The Center is a prime example of ISMI’s collaborative model in which leading chipmakers and equipment and materials manufacturers can participate in a broad consortium-industry-university partnership to develop environmentally sustainable semiconductor manufacturing processes,” said Scott Kramer, vice president of manufacturing technology at SEMATECH.
Kramer added: “We’re bringing together world-class researchers and engineers from Applied Materials, ISMI, and the ESH Technology Center to find green solutions that improve productivity and lower costs while significantly reducing the environmental footprint of manufacturing operations.”
The Center is the industry’s first global collaborative research effort dedicated to finding and implementing the most cost-effective, environmentally friendly manufacturing processes and procedures. Participating companies share ideas and resources, while directing, evaluating, and refreshing the program portfolio.
Specific focus areas include:
* Energy and resource conservation
* Climate change and environmental impact
* Supply chain ESH alignment
* Chemical management and evolving regulatory initiatives
* ESH impacts of semiconductor materials, equipment, and processes
Last year, the Center received the 2009 CleanTech Award for green and clean technology, and the 2009 Lunar New Year Award from the Texas Asian Chamber of Commerce for pioneering eco-friendly industry standards.
Analog Devices intros iCoupler digital isolation products
BANGALORE, INDIA: The growing popularity of electric and hybrid-electric vehicles (HEVs) is placing new emphasis on the need for battery management to monitor voltage levels and provide car makers with the means to reduce battery weight, size and cost. Because HEV batteries operate at high voltages of up to 600 V, isolation is required for safe and reliable operation.
Analog Devices Inc. (ADI) is addressing these needs by expanding its portfolio of AEC-Q100 products with the introduction of quad-channel digital isolators with integrated, isolated power.
The new ADuM540xW family is designed using Analog Devices’ proprietary iCoupler chip-scale micro-transformer technology, which has been used in more than 300 million channels of isolation shipped into a wide array of applications including automotive, industrial, medical, power supply, and consumer systems.
The new digital isolators incorporate ADI’s proprietary isoPower integrated, isolated dc-to-dc converter technology, which provides up to 500 mW of regulated, isolated power at 5-V output.
In an HEV application, this level of integrated isolation allows for power to be transferred across an isolation barrier ensuring monitoring of the battery without drawing from the battery’s power.
The ADuM540xW devices are a better choice over discrete solutions, such as optocouplers paired with external dc-to-dc converters, because their small 10-mm x 10-mm surface mount packages reduce the component count of discrete solutions to a single component, reducing board space by up to 70 percent and cutting costs by as much as 50 percent.
“Advances in battery technology for hybrid/electric vehicles require isolated power technology with higher levels of integration, temperature resistance and a digital interface that eliminates the need for external signal conditioning,” said Bill Riedel, director automotive signal processing, Automotive Segment Group, Analog Devices. “ADI’s iCoupler digital isolators with isolated power are not only smaller, they reduce power consumption by 50 percent compared to optocoupler solutions, which helps car manufacturers build even more environmentally sound vehicles.”
Qualified for an AEC-Q100–40°C to +105°C automotive temperature rating, the ADuM540xW family is designed for HEV motor drives and battery management systems. The new AEC-Q100 isoPower isolators provide multiple isolation channels in a variety of channel configurations and supports data rates up to 25 Mbps. The CMOS-based ADuM540xW family operates with the supply voltage on either side ranging from 4.5 V to 5.5 V.
The ADuM540xW isoPower digital isolators are well suited to operate with other Analog Devices’ components, including AD7280 lithium-ion battery monitoring system and ADuM120xW, ADuM130xW and ADuM140xW digital isolators.
Analog Devices Inc. (ADI) is addressing these needs by expanding its portfolio of AEC-Q100 products with the introduction of quad-channel digital isolators with integrated, isolated power.The new ADuM540xW family is designed using Analog Devices’ proprietary iCoupler chip-scale micro-transformer technology, which has been used in more than 300 million channels of isolation shipped into a wide array of applications including automotive, industrial, medical, power supply, and consumer systems.
The new digital isolators incorporate ADI’s proprietary isoPower integrated, isolated dc-to-dc converter technology, which provides up to 500 mW of regulated, isolated power at 5-V output.
In an HEV application, this level of integrated isolation allows for power to be transferred across an isolation barrier ensuring monitoring of the battery without drawing from the battery’s power.
The ADuM540xW devices are a better choice over discrete solutions, such as optocouplers paired with external dc-to-dc converters, because their small 10-mm x 10-mm surface mount packages reduce the component count of discrete solutions to a single component, reducing board space by up to 70 percent and cutting costs by as much as 50 percent.
“Advances in battery technology for hybrid/electric vehicles require isolated power technology with higher levels of integration, temperature resistance and a digital interface that eliminates the need for external signal conditioning,” said Bill Riedel, director automotive signal processing, Automotive Segment Group, Analog Devices. “ADI’s iCoupler digital isolators with isolated power are not only smaller, they reduce power consumption by 50 percent compared to optocoupler solutions, which helps car manufacturers build even more environmentally sound vehicles.”
Qualified for an AEC-Q100–40°C to +105°C automotive temperature rating, the ADuM540xW family is designed for HEV motor drives and battery management systems. The new AEC-Q100 isoPower isolators provide multiple isolation channels in a variety of channel configurations and supports data rates up to 25 Mbps. The CMOS-based ADuM540xW family operates with the supply voltage on either side ranging from 4.5 V to 5.5 V.
The ADuM540xW isoPower digital isolators are well suited to operate with other Analog Devices’ components, including AD7280 lithium-ion battery monitoring system and ADuM120xW, ADuM130xW and ADuM140xW digital isolators.
Aeroflex realizes 60x performance improvement using Synopsys CustomSim solution
MOUNTAIN VIEW, USA: Synopsys Inc. announced that Aeroflex Colorado Springs Inc., a global provider of high-technology solutions to the aerospace, defense and broadband communications markets, has successfully deployed Synopsys' CustomSim unified circuit simulation solution for the development and verification of its high-reliability ICs.
The CustomSim solution delivers performance improvements of up to 60x over SPICE, increasing designer productivity and confidence by enabling more corners to be run for transistor-level verification of large blocks. In addition, taking advantage of the Discovery Verification Platform by using the CustomSim solution with Synopsys' VCS functional verification solution enables full-chip, mixed-signal simulations that were not possible with previous-generation simulators, allowing Aeroflex to reduce design cycle times.
"Our customers require high-reliability products and solutions that need to operate for many years in harsh and often remote environments. Verifying that our designs will meet specifications over a broad range of conditions and remain within budgeted power is essential for mission-critical products," said John Pfeil, senior mixed-signal design engineer for the Aeroflex Standard Products Group.
"CustomSim is the only solution we've found that delivers the capability and performance to enable us to run hundreds of corners on large blocks before tapeout, and reduce product development cycle times by running mixed-signal simulations at the full-chip level."
Synopsys offers a comprehensive suite of circuit simulation solutions. The HSPICE simulator is widely recognized as the "gold standard" for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms.
The CustomSim solution unifies the best-in-class simulation technologies of NanoSim, HSIM and XA with added multi-threading capabilities for high-capacity, high-performance circuit simulation. For full-chip mixed-signal verification, the CustomSim solution is tightly coupled to VCS through a Direct Kernel Integration and is integrated into a unified analog/mixed-signal (AMS) verification environment, which simplifies usability through a common set of inputs, outputs and device models.
"Using CustomSim to verify its high-reliability ICs is testimony to the confidence Aeroflex has in Synopsys' circuit simulation solution," said Farhad Hayat, senior director of product marketing, Analog/Mixed-Signal Group at Synopsys. "CustomSim delivers high-performance circuit simulation technologies that enable companies like Aeroflex to ensure that their products meet the most stringent design requirements."
The CustomSim solution delivers performance improvements of up to 60x over SPICE, increasing designer productivity and confidence by enabling more corners to be run for transistor-level verification of large blocks. In addition, taking advantage of the Discovery Verification Platform by using the CustomSim solution with Synopsys' VCS functional verification solution enables full-chip, mixed-signal simulations that were not possible with previous-generation simulators, allowing Aeroflex to reduce design cycle times.
"Our customers require high-reliability products and solutions that need to operate for many years in harsh and often remote environments. Verifying that our designs will meet specifications over a broad range of conditions and remain within budgeted power is essential for mission-critical products," said John Pfeil, senior mixed-signal design engineer for the Aeroflex Standard Products Group.
"CustomSim is the only solution we've found that delivers the capability and performance to enable us to run hundreds of corners on large blocks before tapeout, and reduce product development cycle times by running mixed-signal simulations at the full-chip level."
Synopsys offers a comprehensive suite of circuit simulation solutions. The HSPICE simulator is widely recognized as the "gold standard" for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms.
The CustomSim solution unifies the best-in-class simulation technologies of NanoSim, HSIM and XA with added multi-threading capabilities for high-capacity, high-performance circuit simulation. For full-chip mixed-signal verification, the CustomSim solution is tightly coupled to VCS through a Direct Kernel Integration and is integrated into a unified analog/mixed-signal (AMS) verification environment, which simplifies usability through a common set of inputs, outputs and device models.
"Using CustomSim to verify its high-reliability ICs is testimony to the confidence Aeroflex has in Synopsys' circuit simulation solution," said Farhad Hayat, senior director of product marketing, Analog/Mixed-Signal Group at Synopsys. "CustomSim delivers high-performance circuit simulation technologies that enable companies like Aeroflex to ensure that their products meet the most stringent design requirements."
Cypress, Keil to deliver high-performance compiler options for Cypress's new PSoC 3 and PSoC 5 architectures
SAN JOSE, USA: Cypress Semiconductor Corp. has teamed up with Keil, the tools division of ARM, to deliver high-performance compiler options for the PSoC Creator IDE for the PSoC 3 and PSoC 5 programmable system-on-chip architectures.
PSoC Creator enables engineers to design the way they think, using schematic-based design capture along with certified, pre-packaged peripherals to keep system creation independent of the target PSoC device. It includes free compilers from ARM— the Keil CA51 Compiler for PSoC 3 and the GNU GCC-ARM Compiler for PSoC 5 are both bundled with the PSoC Creator distribution.
In addition, the new Keil µVision4 IDE and Debugger are available for use with the Cypress PSoC 3 and PSoC 5 devices. The environment has been designed to enhance developers' productivity, enabling faster, more efficient program development and verification. The flexible window management system introduced in µVision4 enables developers to use multiple monitors and provides complete control over window placement anywhere on the visual surface.
For the new Cypress PSoC 5 devices based on the ARM Cortex-M3 processor, Keil offers an upgrade to the full version of their Microcontroller Development kit, MDK-ARM. MDK-ARM features the industry-standard compiler from ARM and sophisticated debug and trace capabilities that use the advanced features of the Cortex-M3 processor in the PSoC 5 device.
For the Cypress PSoC 3 devices based on the industry standard 8051, Keil offers an upgrade to the full version of their Professional Development Kit for the 8051 architecture, PK51. The PK51 kit provides a complete software development solution for Cypress PSoC 3 customers.
“We’re pleased to provide support for the revolutionary new PSoC 3 and PSoC 5 architectures,” said Ken Havens, North America Marketing Manager, Systems Design Division, ARM. “We look forward to seeing the results designers can achieve using Keil’s industry-leading compiler technology with these exciting new devices.”
“Offering world-class compiler support was an important objective in introducing PSoC Creator,” said Butch Griffin, senior director of Cypress’s PSoC Tools Business Unit. “We have achieved that through the combination of free compilers in PSoC Creator and the µVision4 IDE support.”
PSoC Creator enables engineers to design the way they think, using schematic-based design capture along with certified, pre-packaged peripherals to keep system creation independent of the target PSoC device. It includes free compilers from ARM— the Keil CA51 Compiler for PSoC 3 and the GNU GCC-ARM Compiler for PSoC 5 are both bundled with the PSoC Creator distribution.
In addition, the new Keil µVision4 IDE and Debugger are available for use with the Cypress PSoC 3 and PSoC 5 devices. The environment has been designed to enhance developers' productivity, enabling faster, more efficient program development and verification. The flexible window management system introduced in µVision4 enables developers to use multiple monitors and provides complete control over window placement anywhere on the visual surface.
For the new Cypress PSoC 5 devices based on the ARM Cortex-M3 processor, Keil offers an upgrade to the full version of their Microcontroller Development kit, MDK-ARM. MDK-ARM features the industry-standard compiler from ARM and sophisticated debug and trace capabilities that use the advanced features of the Cortex-M3 processor in the PSoC 5 device.
For the Cypress PSoC 3 devices based on the industry standard 8051, Keil offers an upgrade to the full version of their Professional Development Kit for the 8051 architecture, PK51. The PK51 kit provides a complete software development solution for Cypress PSoC 3 customers.
“We’re pleased to provide support for the revolutionary new PSoC 3 and PSoC 5 architectures,” said Ken Havens, North America Marketing Manager, Systems Design Division, ARM. “We look forward to seeing the results designers can achieve using Keil’s industry-leading compiler technology with these exciting new devices.”
“Offering world-class compiler support was an important objective in introducing PSoC Creator,” said Butch Griffin, senior director of Cypress’s PSoC Tools Business Unit. “We have achieved that through the combination of free compilers in PSoC Creator and the µVision4 IDE support.”
NXP powers DIRECTV’s new generation high-definition DVR
SINGAPORE: NXP Semiconductors announced that its complete High Definition (HD) digital video recorder (DVR) satellite system on chip (SoC) solution has been adopted by DIRECTV, the world’s most popular television service, to develop the next generation of HD DVR satellite receivers.
The new HR24 DVR enables DIRECTV customers to easily share high-quality, high-definition digital entertainment and data throughout the home over the existing coax cable infrastructure.
“Along with HD, providing our customers with the ability to easily and reliably distribute content throughout the home, is an integral part of our strategy to deliver an unparalleled television experience,” said Romulo Pontual, CTO, DIRECTV. “We remain committed to create a reliable video distribution system for our customers who want to enjoy a connected home lifestyle.”
“NXP is focused on offering a best-in class HD viewing experience to set-top box operators and OEMs, while simultaneously helping them accelerate time to market at optimized costs,” said Lewis Brewster, senior vice president, business line STB, NXP Semiconductors. “Launching our first HD platform at DIRECTV is the result of several years of development and stringent testing, and our collaboration bolsters NXP’s leadership in the TV ecosystem.”
This is the first deployment of NXP’s HD solution in the DIRECTV network, following several years of successfully supplying solutions for standard definition receivers and DVRs. The development includes all key silicon components in addition to DIRECTV specific software drivers. This is also the first DIRECTV set-top box to offer home networking support with MoCA.
With increasing demand for multi-room DVRs, NXP is collaborating with industry leaders like Entropic Communications to develop home-networked set top box solutions that support MoCA technology.
The new HR24 DVR enables DIRECTV customers to easily share high-quality, high-definition digital entertainment and data throughout the home over the existing coax cable infrastructure.
“Along with HD, providing our customers with the ability to easily and reliably distribute content throughout the home, is an integral part of our strategy to deliver an unparalleled television experience,” said Romulo Pontual, CTO, DIRECTV. “We remain committed to create a reliable video distribution system for our customers who want to enjoy a connected home lifestyle.”
“NXP is focused on offering a best-in class HD viewing experience to set-top box operators and OEMs, while simultaneously helping them accelerate time to market at optimized costs,” said Lewis Brewster, senior vice president, business line STB, NXP Semiconductors. “Launching our first HD platform at DIRECTV is the result of several years of development and stringent testing, and our collaboration bolsters NXP’s leadership in the TV ecosystem.”
This is the first deployment of NXP’s HD solution in the DIRECTV network, following several years of successfully supplying solutions for standard definition receivers and DVRs. The development includes all key silicon components in addition to DIRECTV specific software drivers. This is also the first DIRECTV set-top box to offer home networking support with MoCA.
With increasing demand for multi-room DVRs, NXP is collaborating with industry leaders like Entropic Communications to develop home-networked set top box solutions that support MoCA technology.
Atmel updates progress on pursuing strategic alternatives for ASIC business
SAN JOSE, USA: Atmel Corp., a leader in MCU and touch solutions, announced that following a comprehensive review of alternatives for its ASIC business, it will continue to explore the potential sale of the company's Smart Card (SMS) business located in Rousset, France and East Kilbride, UK and that it intends to discontinue potential sale discussions for its Customer Specific Products (CSP) and Aerospace businesses.
Atmel's ASIC business is a leading provider of high performance customer specific integrated circuits and security solutions to the industrial, aerospace and consumer markets operating in three distinct business segments: Smart Cards (SMS), Customer Specific Products (CSP) and Aerospace. In addition, the ASIC business includes an advanced semiconductor wafer fabrication business located in Rousset, France.
As previously announced, Atmel has entered into an exclusivity agreement with LFoundry GmbH for the potential sale of this fab business. Atmel has been pursuing strategic alternatives for the ASIC business and related manufacturing assets as part of its transformation plan, which is aimed at focusing on the Company's high-growth and high-margin businesses.
"We are pleased with the progress we are making with the strategic alternatives process for the ASIC business and related manufacturing assets," said Steven Laub, Atmel's President and Chief Executive Officer. "The proposed sale of the wafer fabrication business in Rousset remains on track, and we continue to discuss the potential sale of the SMS business segment with interested parties. As part of our review, we have also determined that shareholders' interests are best served by Atmel retaining the CSP and Aerospace business segments."
Atmel confirmed that it continues to expect the Works Council in Rousset to render its opinion on the proposed LFoundry transaction in the first quarter of 2010. If Atmel receives the approval of the Works Council, Atmel will seek authorization from its Board of Directors to enter into a definitive agreement with LFoundry.
Atmel has informed the employee representatives of the Works Council in Rousset that it proposes to sell the SMS business in addition to the wafer fabrication business as part of the Company's pursuit of strategic alternatives for its ASIC business and related manufacturing assets, subject to, among other things, continued discussion with interested parties and consultation with the Rousset Works Council.
Atmel's ASIC business is a leading provider of high performance customer specific integrated circuits and security solutions to the industrial, aerospace and consumer markets operating in three distinct business segments: Smart Cards (SMS), Customer Specific Products (CSP) and Aerospace. In addition, the ASIC business includes an advanced semiconductor wafer fabrication business located in Rousset, France.
As previously announced, Atmel has entered into an exclusivity agreement with LFoundry GmbH for the potential sale of this fab business. Atmel has been pursuing strategic alternatives for the ASIC business and related manufacturing assets as part of its transformation plan, which is aimed at focusing on the Company's high-growth and high-margin businesses.
"We are pleased with the progress we are making with the strategic alternatives process for the ASIC business and related manufacturing assets," said Steven Laub, Atmel's President and Chief Executive Officer. "The proposed sale of the wafer fabrication business in Rousset remains on track, and we continue to discuss the potential sale of the SMS business segment with interested parties. As part of our review, we have also determined that shareholders' interests are best served by Atmel retaining the CSP and Aerospace business segments."
Atmel confirmed that it continues to expect the Works Council in Rousset to render its opinion on the proposed LFoundry transaction in the first quarter of 2010. If Atmel receives the approval of the Works Council, Atmel will seek authorization from its Board of Directors to enter into a definitive agreement with LFoundry.
Atmel has informed the employee representatives of the Works Council in Rousset that it proposes to sell the SMS business in addition to the wafer fabrication business as part of the Company's pursuit of strategic alternatives for its ASIC business and related manufacturing assets, subject to, among other things, continued discussion with interested parties and consultation with the Rousset Works Council.
Actel announces compliance with Quality Management standards SAE/AS9100 and ISO 9001
MOUNTAIN VIEW, USA: Actel Corp. has established ongoing compliance with both the rigorous SAE/AS9100 Aerospace Certification and the prestigious ISO 9001:2000 quality standards. These milestones demonstrate Actel’s ongoing commitment to management principles and control of product development and operational activities.
"The continued achievement of this certification allows our customers to purchase Actel products with the confidence that they are getting the highest quality and reliability while ensuring their cost of ownership goals are met or exceeded" said Ken O’Neill, director, military and aerospace product marketing at Actel.
The AS9100 standard was developed by Working Group 11 of ISO TC20 and was supported by the International Aerospace Quality Group in order to satisfy internal, government, and regulatory requirements.
The aerospace industry is rapidly adopting commercial off-the-shelf (COTS) products for cost savings while still requiring extreme high-reliability standards. The AS9100 and ISO 9001standards reduce costs and improve reliability by consolidating the quality requirements and quality systems employed by aerospace and avionics suppliers.
By continuing to demonstrate certification in AS9100 and ISO 9001, Actel remains the go-to vendor for reducing costs and improving reliability for its customers.
With more than 20 years of flight-proven reliability and tens of thousands of high-reliability FPGAs in space and aviation applications, Actel offers low-power flash- and antifuse-based FPGAs for use in military and aerospace applications.
Long committed to designing and manufacturing high-quality FPGAs, Actel has received several other important certifications recognizing the company’s dedication to quality and reliability, including PURE and TS16949:2002.
"The continued achievement of this certification allows our customers to purchase Actel products with the confidence that they are getting the highest quality and reliability while ensuring their cost of ownership goals are met or exceeded" said Ken O’Neill, director, military and aerospace product marketing at Actel.
The AS9100 standard was developed by Working Group 11 of ISO TC20 and was supported by the International Aerospace Quality Group in order to satisfy internal, government, and regulatory requirements.
The aerospace industry is rapidly adopting commercial off-the-shelf (COTS) products for cost savings while still requiring extreme high-reliability standards. The AS9100 and ISO 9001standards reduce costs and improve reliability by consolidating the quality requirements and quality systems employed by aerospace and avionics suppliers.
By continuing to demonstrate certification in AS9100 and ISO 9001, Actel remains the go-to vendor for reducing costs and improving reliability for its customers.
With more than 20 years of flight-proven reliability and tens of thousands of high-reliability FPGAs in space and aviation applications, Actel offers low-power flash- and antifuse-based FPGAs for use in military and aerospace applications.
Long committed to designing and manufacturing high-quality FPGAs, Actel has received several other important certifications recognizing the company’s dedication to quality and reliability, including PURE and TS16949:2002.
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