Wednesday, April 28, 2010

Abatron joins eNsemble Multi-Core Alliance to promote development tools for multi-core processors

ROTKREUZ, SWITZERLAND: Abatron AG has become a member of the eNsemble Multi-Core Alliance, a premier industry organization founded to drive best-in-class innovations in multi-core parallel processing platforms and software development.

Supported by a broad base of world-class hardware and software providers, the eNsemble Multi-Core Alliance serves as the foundation upon which original equipment manufacturers (OEMs) can more effectively and more efficiently develop high-performance networking equipment using industry-leading multi-core processors.

”We are pleased to be a part of the eNsemble Multi-Core Alliance and to support continued innovations in multi-core processing platforms,” said Max Vock, President of Abatron AG.

Abatron AG offers full on-chip development support for multi-core processors. The BDI3000 high-speed JTAG debug interface and its associated applications for development support multi-core and multi threaded development and control of the high performance NetLogic Microsystems XLR® and XLS® processors. This enables customers to perform low-level hardware development, Linux kernel development, as well as in-circuit flash programming.

”Abatron provides tools that are important to the development of multi-core systems, and we welcome Abatron as a valuable member of the eNsemble Multi-Core Alliance,” said Behrooz Abdi, executive vice president and general manager at NetLogic Microsystems, a founding member of the eNsemble Multi-Core Alliance.

“By having a community of technology innovators who are respective leaders in their areas of expertise, the Alliance creates a platform on which these developers can innovate to create new, breakthrough applications and solutions that can take full advantage of the superior performance and functionality of multi-core processors.”

As a founding member of the eNsemble Multi-Core Alliance, NetLogic Microsystems is committed to an open programming model for its family of market-leading multi-core, multi-threaded processors to allow the tighter coupling between networking software and the XLR, XLS and XLP multi-core processors.

This enables significant improvements in the application development efficiency of software code and overall system performance. In addition, this enables the development of new enhanced services and applications for next-generation Internet networks that are highly optimized for multi-core, multi-threaded processors.

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